xref: /freebsd/lib/libc/powerpc/gen/syncicache.c (revision e9ac41698b2f322d55ccf9da50a3596edb2c1800)
1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
3  *
4  * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
5  * Copyright (C) 1995-1997, 1999 TooLs GmbH.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by TooLs GmbH.
19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $
34  */
35 
36 #include <sys/param.h>
37 #if	defined(_KERNEL) || defined(_STANDALONE)
38 #include <sys/time.h>
39 #include <sys/proc.h>
40 #include <vm/vm.h>
41 #endif
42 #include <sys/sysctl.h>
43 
44 #include <machine/cpu.h>
45 #include <machine/md_var.h>
46 
47 #ifdef _STANDALONE
48 int cacheline_size = 32;
49 #endif
50 
51 #if	!defined(_KERNEL) && !defined(_STANDALONE)
52 #include <stdlib.h>
53 
54 int cacheline_size = 0;
55 
56 static void getcachelinesize(void);
57 
58 static void
59 getcachelinesize()
60 {
61 	static int	cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
62 	int		clen;
63 
64 	clen = sizeof(cacheline_size);
65 
66 	if (sysctl(cachemib, nitems(cachemib), &cacheline_size, &clen,
67 	    NULL, 0) < 0 || !cacheline_size) {
68 		abort();
69 	}
70 }
71 #endif
72 
73 void
74 __syncicache(void *from, int len)
75 {
76 	int	l, off;
77 	char	*p;
78 
79 #if	!defined(_KERNEL) && !defined(_STANDALONE)
80 	if (!cacheline_size)
81 		getcachelinesize();
82 #endif
83 
84 	off = (u_int)from & (cacheline_size - 1);
85 	l = len += off;
86 	p = (char *)from - off;
87 
88 	do {
89 		__asm __volatile ("dcbst 0,%0" :: "r"(p));
90 		p += cacheline_size;
91 	} while ((l -= cacheline_size) > 0);
92 	__asm __volatile ("sync");
93 	p = (char *)from - off;
94 	do {
95 		__asm __volatile ("icbi 0,%0" :: "r"(p));
96 		p += cacheline_size;
97 	} while ((len -= cacheline_size) > 0);
98 	__asm __volatile ("sync; isync");
99 }
100 
101