1.\" Copyright (c) 2019 Ian Lepore <ian@FreeBSD.org> 2.\" 3.\" Redistribution and use in source and binary forms, with or without 4.\" modification, are permitted provided that the following conditions 5.\" are met: 6.\" 1. Redistributions of source code must retain the above copyright 7.\" notice, this list of conditions and the following disclaimer. 8.\" 2. Redistributions in binary form must reproduce the above copyright 9.\" notice, this list of conditions and the following disclaimer in the 10.\" documentation and/or other materials provided with the distribution. 11.\" 12.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 13.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 14.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 15.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE 16.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 17.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 18.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 19.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 20.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 21.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 22.\" SUCH DAMAGE. 23.\" 24.Dd July 10, 2019 25.Dt ARM_sync_icache 2 26.Os 27.Sh NAME 28.Nm arm_sync_icache 29.Nd synchronize the data and instruction caches 30.Sh LIBRARY 31.Lb libc 32.Sh SYNOPSIS 33.In machine/sysarch.h 34.Ft int 35.Fn arm_sync_icache "u_int addr" "int len" 36.Sh DESCRIPTION 37The 38.Nm 39system call synchronizes the contents of any data and instructions caches 40with the contents of main memory for the given range. 41Use this after loading executable code or modifying existing code in memory, 42before attempting to execute that code. 43.Pp 44The 45.Va addr 46and 47.Va len 48arguments do not need to be aligned to any particular boundary, but 49cache operations will affect entire cache lines, even those which are only 50partially overlapped by the given range. 51.Pp 52This takes one or more of the following actions, depending on the requirements 53of the hardware: 54.Bl -bullet 55.It 56Write dirty data cache lines within the range back to main memory. 57.It 58Invalidate existing instruction cache contents for the range. 59.It 60Invalidate branch prediction caches for the range. 61.El 62.Pp 63On hardware which supports multiple synchronization points for cache 64operations, the caches are maintained to the point of unification, 65making the data in the range coherent amongst all cores. 66.Sh RETURN VALUES 67The 68.Nm 69system call always returns 0. 70.Sh ERRORS 71If a call refers to memory which the calling process does not have rights 72to access, or if the 73.Va len 74argument is negative, a SIGSEGV signal is delivered to the calling thread. 75.Sh AUTHORS 76This man page was written by 77.An Ian Lepore . 78