1*805eb13aSIan Lepore.\" Copyright (c) 2019 Ian Lepore <ian@FreeBSD.org> 2*805eb13aSIan Lepore.\" 3*805eb13aSIan Lepore.\" Redistribution and use in source and binary forms, with or without 4*805eb13aSIan Lepore.\" modification, are permitted provided that the following conditions 5*805eb13aSIan Lepore.\" are met: 6*805eb13aSIan Lepore.\" 1. Redistributions of source code must retain the above copyright 7*805eb13aSIan Lepore.\" notice, this list of conditions and the following disclaimer. 8*805eb13aSIan Lepore.\" 2. Redistributions in binary form must reproduce the above copyright 9*805eb13aSIan Lepore.\" notice, this list of conditions and the following disclaimer in the 10*805eb13aSIan Lepore.\" documentation and/or other materials provided with the distribution. 11*805eb13aSIan Lepore.\" 12*805eb13aSIan Lepore.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 13*805eb13aSIan Lepore.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 14*805eb13aSIan Lepore.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 15*805eb13aSIan Lepore.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE 16*805eb13aSIan Lepore.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 17*805eb13aSIan Lepore.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 18*805eb13aSIan Lepore.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 19*805eb13aSIan Lepore.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 20*805eb13aSIan Lepore.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 21*805eb13aSIan Lepore.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 22*805eb13aSIan Lepore.\" SUCH DAMAGE. 23*805eb13aSIan Lepore.\" 24*805eb13aSIan Lepore.\" $FreeBSD$ 25*805eb13aSIan Lepore.\" 26*805eb13aSIan Lepore.Dd July 10, 2019 27*805eb13aSIan Lepore.Dt ARM_sync_icache 2 28*805eb13aSIan Lepore.Os 29*805eb13aSIan Lepore.Sh NAME 30*805eb13aSIan Lepore.Nm arm_sync_icache 31*805eb13aSIan Lepore.Nd synchronize the data and instruction caches 32*805eb13aSIan Lepore.Sh LIBRARY 33*805eb13aSIan Lepore.Lb libc 34*805eb13aSIan Lepore.Sh SYNOPSIS 35*805eb13aSIan Lepore.In machine/sysarch.h 36*805eb13aSIan Lepore.Ft int 37*805eb13aSIan Lepore.Fn arm_sync_icache "u_int addr" "int len" 38*805eb13aSIan Lepore.Sh DESCRIPTION 39*805eb13aSIan LeporeThe 40*805eb13aSIan Lepore.Nm 41*805eb13aSIan Leporesystem call synchronizes the contents of any data and instructions caches 42*805eb13aSIan Leporewith the contents of main memory for the given range. 43*805eb13aSIan LeporeUse this after loading executable code or modifying existing code in memory, 44*805eb13aSIan Leporebefore attempting to execute that code. 45*805eb13aSIan Lepore.Pp 46*805eb13aSIan LeporeThe 47*805eb13aSIan Lepore.Va addr 48*805eb13aSIan Leporeand 49*805eb13aSIan Lepore.Va len 50*805eb13aSIan Leporearguments do not need to be aligned to any particular boundary, but 51*805eb13aSIan Leporecache operations will affect entire cache lines, even those which are only 52*805eb13aSIan Leporepartially overlapped by the given range. 53*805eb13aSIan Lepore.Pp 54*805eb13aSIan LeporeThis takes one or more of the following actions, depending on the requirements 55*805eb13aSIan Leporeof the hardware: 56*805eb13aSIan Lepore.Bl -bullet 57*805eb13aSIan Lepore.It 58*805eb13aSIan LeporeWrite dirty data cache lines within the range back to main memory. 59*805eb13aSIan Lepore.It 60*805eb13aSIan LeporeInvalidate existing instruction cache contents for the range. 61*805eb13aSIan Lepore.It 62*805eb13aSIan LeporeInvalidate branch prediction caches for the range. 63*805eb13aSIan Lepore.El 64*805eb13aSIan Lepore.Pp 65*805eb13aSIan LeporeOn hardware which supports multiple synchronization points for cache 66*805eb13aSIan Leporeoperations, the caches are maintained to the point of unification, 67*805eb13aSIan Leporemaking the data in the range coherent amongst all cores. 68*805eb13aSIan Lepore.Sh RETURN VALUES 69*805eb13aSIan LeporeThe 70*805eb13aSIan Lepore.Nm 71*805eb13aSIan Leporesystem call always returns 0. 72*805eb13aSIan Lepore.Sh ERRORS 73*805eb13aSIan LeporeIf a call refers to memory which the calling process does not have rights 74*805eb13aSIan Leporeto access, or if the 75*805eb13aSIan Lepore.Va len 76*805eb13aSIan Leporeargument is negative, a SIGSEGV signal is delivered to the calling thread. 77*805eb13aSIan Lepore.Sh AUTHORS 78*805eb13aSIan LeporeThis man page was written by 79*805eb13aSIan Lepore.An Ian Lepore . 80