xref: /freebsd/lib/libc/arm/gen/_setjmp.S (revision 40a8ac8f62b535d30349faf28cf47106b7041b83)
1/*	$NetBSD: _setjmp.S,v 1.12 2013/04/19 13:45:45 matt Exp $	*/
2
3/*
4 * Copyright (c) 1997 Mark Brinicombe
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed by Mark Brinicombe
18 * 4. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35#if !defined(__SOFTFP__) && !defined(__VFP_FP__) && !defined(__ARM_PCS)
36#error FPA is not supported anymore
37#endif
38
39#if defined(__ARM_EABI__) && !defined(_STANDALONE)
40	.fpu	vfp
41#endif
42
43#include <machine/asm.h>
44#include <machine/setjmp.h>
45
46__FBSDID("$FreeBSD$");
47
48/*
49 * C library -- _setjmp, _longjmp
50 *
51 *	_longjmp(a,v)
52 * will generate a "return(v)" from the last call to
53 *	_setjmp(a)
54 * by restoring registers from the stack.
55 * The previous signal state is NOT restored.
56 *
57 * Note: r0 is the return value
58 *       r1-r3,ip are scratch registers in functions
59 */
60
61ENTRY(_setjmp)
62	ldr	r1, .L_setjmp_magic
63
64#if defined(__ARM_EABI__) && !defined(_STANDALONE)
65	ldr	r2, .Lfpu_present
66#ifdef PIC
67	GOT_INIT(r3, .L_setjmp_got, .L_setjmp_gotinit)
68	ldr	r2, [r2, r3]
69#else
70	ldr	r2, [r2]
71#endif
72	teq	r2, #0		/* do we have a FPU? */
73	beq	1f		/*   no, don't save VFP registers */
74
75	orr	r1, r1, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
76				/* change magic to VFP magic */
77	add	r2, r0, #(_JB_REG_D8 * 4)
78	vstmia	r2, {d8-d15}
79	vmrs	r2, fpscr
80	str	r2, [r0, #(_JB_REG_FPSCR * 4)]
811:
82#endif /* __ARM_EABI__ */
83
84	str	r1, [r0]
85
86	add	r0, r0, #(_JB_REG_R4 * 4)
87	/* Store integer registers */
88        stmia	r0, {r4-r14}
89
90        mov	r0, #0x00000000
91	RET
92END(_setjmp)
93
94.L_setjmp_magic:
95	.word	_JB_MAGIC__SETJMP
96#if defined(__ARM_EABI__) && !defined(_STANDALONE)
97	GOT_INITSYM(.L_setjmp_got, .L_setjmp_gotinit)
98.Lfpu_present:
99	.word	PIC_SYM(_libc_arm_fpu_present, GOTOFF)
100#endif /* __ARM_EABI__ */
101
102WEAK_ALIAS(___longjmp, _longjmp)
103ENTRY(_longjmp)
104	ldr	r2, [r0]			/* get magic from jmp_buf */
105	bic	r3, r2, #(_JB_MAGIC__SETJMP ^ _JB_MAGIC__SETJMP_VFP)
106						/* ignore VFP-ness of magic */
107	ldr	ip, .L_setjmp_magic		/* load magic */
108	teq	ip, r3				/* magic correct? */
109	bne	botch				/*   no, botch */
110
111#if defined(__ARM_EABI__) && !defined(_STANDALONE)
112	teq	r3, r2				/* did magic change? */
113	beq	1f				/*   no, don't restore VFP */
114	add	ip, r0, #(_JB_REG_D8 * 4)
115	vldmia	ip, {d8-d15}
116	ldr	ip, [r0, #(_JB_REG_FPSCR * 4)]
117	vmsr	fpscr, ip
1181:
119#endif /* __ARM_EABI__ */
120
121	add	r0, r0, #(_JB_REG_R4 * 4)
122       	/* Restore integer registers */
123        ldmia	r0, {r4-r14}
124
125	/* Validate sp and r14 */
126	teq	sp, #0
127	teqne	r14, #0
128	beq	botch
129
130	/* Set return value */
131	movs	r0, r1
132	moveq	r0, #0x00000001
133	RET
134
135	/* validation failed, die die die. */
136botch:
137#if !defined(_STANDALONE)
138	bl	PIC_SYM(_C_LABEL(longjmperror), PLT)
139	bl	PIC_SYM(_C_LABEL(abort), PLT)
140	b	. - 8		/* Cannot get here */
141#else
142	b	.
143#endif
144END(_longjmp)
145