xref: /freebsd/lib/clang/libllvm/Makefile (revision 986e05bc2a18e58ffe5ad5c944e4c188d01a4462)
1*986e05bcSDimitry Andric# $FreeBSD$
2*986e05bcSDimitry Andric
3*986e05bcSDimitry Andric.include <src.opts.mk>
4*986e05bcSDimitry Andric.include "../llvm.pre.mk"
5*986e05bcSDimitry Andric
6*986e05bcSDimitry AndricLIB=		llvm
7*986e05bcSDimitry AndricINTERNALLIB=
8*986e05bcSDimitry Andric
9*986e05bcSDimitry AndricCFLAGS+=	-I${.OBJDIR}
10*986e05bcSDimitry Andric.for arch in AArch64 ARM Mips PowerPC Sparc X86
11*986e05bcSDimitry AndricCFLAGS+=	-I${LLVM_SRCS}/lib/Target/${arch}
12*986e05bcSDimitry Andric.endfor
13*986e05bcSDimitry Andric
14*986e05bcSDimitry AndricSRCDIR=		lib
15*986e05bcSDimitry Andric
16*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/AliasAnalysis.cpp
17*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/AliasAnalysisEvaluator.cpp
18*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/AliasAnalysisSummary.cpp
19*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/AliasSetTracker.cpp
20*986e05bcSDimitry AndricSRCS_EXT+=	Analysis/Analysis.cpp
21*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/AssumptionCache.cpp
22*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/BasicAliasAnalysis.cpp
23*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/BlockFrequencyInfo.cpp
24*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/BlockFrequencyInfoImpl.cpp
25*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/BranchProbabilityInfo.cpp
26*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CFG.cpp
27*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CFGPrinter.cpp
28*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CFLAndersAliasAnalysis.cpp
29*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CFLSteensAliasAnalysis.cpp
30*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CGSCCPassManager.cpp
31*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CallGraph.cpp
32*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CallGraphSCCPass.cpp
33*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CallPrinter.cpp
34*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CaptureTracking.cpp
35*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CodeMetrics.cpp
36*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ConstantFolding.cpp
37*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/CostModel.cpp
38*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/Delinearization.cpp
39*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/DemandedBits.cpp
40*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/DependenceAnalysis.cpp
41*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/DivergenceAnalysis.cpp
42*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/DomPrinter.cpp
43*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/DominanceFrontier.cpp
44*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/EHPersonalities.cpp
45*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/GlobalsModRef.cpp
46*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/IVUsers.cpp
47*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/IndirectCallPromotionAnalysis.cpp
48*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/InlineCost.cpp
49*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/InstCount.cpp
50*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/InstructionSimplify.cpp
51*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/Interval.cpp
52*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/IntervalPartition.cpp
53*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/IteratedDominanceFrontier.cpp
54*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/LazyBlockFrequencyInfo.cpp
55*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/LazyCallGraph.cpp
56*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/LazyValueInfo.cpp
57*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/Lint.cpp
58*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/Loads.cpp
59*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/LoopAccessAnalysis.cpp
60*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/LoopInfo.cpp
61*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/LoopPass.cpp
62*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/LoopPassManager.cpp
63*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/LoopUnrollAnalyzer.cpp
64*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/MemDepPrinter.cpp
65*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/MemDerefPrinter.cpp
66*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/MemoryBuiltins.cpp
67*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/MemoryDependenceAnalysis.cpp
68*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/MemoryLocation.cpp
69*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ModuleDebugInfoPrinter.cpp
70*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ModuleSummaryAnalysis.cpp
71*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ObjCARCAliasAnalysis.cpp
72*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ObjCARCAnalysisUtils.cpp
73*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ObjCARCInstKind.cpp
74*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/OptimizationDiagnosticInfo.cpp
75*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/OrderedBasicBlock.cpp
76*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/PHITransAddr.cpp
77*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/PostDominators.cpp
78*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ProfileSummaryInfo.cpp
79*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/PtrUseVisitor.cpp
80*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/RegionInfo.cpp
81*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/RegionPass.cpp
82*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/RegionPrinter.cpp
83*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ScalarEvolution.cpp
84*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ScalarEvolutionAliasAnalysis.cpp
85*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ScalarEvolutionExpander.cpp
86*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ScalarEvolutionNormalization.cpp
87*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ScopedNoAliasAA.cpp
88*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/SparsePropagation.cpp
89*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/TargetLibraryInfo.cpp
90*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/TargetTransformInfo.cpp
91*986e05bcSDimitry Andric#SRCS_EXT+=	Analysis/Trace.cpp
92*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/TypeBasedAliasAnalysis.cpp
93*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/TypeMetadataUtils.cpp
94*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/ValueTracking.cpp
95*986e05bcSDimitry AndricSRCS_MIN+=	Analysis/VectorUtils.cpp
96*986e05bcSDimitry AndricSRCS_MIN+=	AsmParser/LLLexer.cpp
97*986e05bcSDimitry AndricSRCS_MIN+=	AsmParser/LLParser.cpp
98*986e05bcSDimitry AndricSRCS_MIN+=	AsmParser/Parser.cpp
99*986e05bcSDimitry Andric#SRCS_EXT+=	Bitcode/Reader/BitReader.cpp
100*986e05bcSDimitry AndricSRCS_MIN+=	Bitcode/Reader/BitcodeReader.cpp
101*986e05bcSDimitry AndricSRCS_MIN+=	Bitcode/Reader/BitstreamReader.cpp
102*986e05bcSDimitry Andric#SRCS_EXT+=	Bitcode/Writer/BitWriter.cpp
103*986e05bcSDimitry AndricSRCS_MIN+=	Bitcode/Writer/BitcodeWriter.cpp
104*986e05bcSDimitry AndricSRCS_MIN+=	Bitcode/Writer/BitcodeWriterPass.cpp
105*986e05bcSDimitry AndricSRCS_MIN+=	Bitcode/Writer/ValueEnumerator.cpp
106*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AggressiveAntiDepBreaker.cpp
107*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AllocationOrder.cpp
108*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/Analysis.cpp
109*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/ARMException.cpp
110*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/AddressPool.cpp
111*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/AsmPrinter.cpp
112*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
113*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
114*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/CodeViewDebug.cpp
115*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DIE.cpp
116*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DIEHash.cpp
117*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
118*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DebugHandlerBase.cpp
119*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DebugLocStream.cpp
120*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DwarfAccelTable.cpp
121*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DwarfCFIException.cpp
122*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DwarfCompileUnit.cpp
123*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DwarfDebug.cpp
124*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DwarfExpression.cpp
125*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DwarfFile.cpp
126*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DwarfStringPool.cpp
127*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/DwarfUnit.cpp
128*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/EHStreamer.cpp
129*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/ErlangGCPrinter.cpp
130*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/OcamlGCPrinter.cpp
131*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AsmPrinter/WinException.cpp
132*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/AtomicExpandPass.cpp
133*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/BasicTargetTransformInfo.cpp
134*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/BranchFolding.cpp
135*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/BuiltinGCs.cpp
136*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/CalcSpillWeights.cpp
137*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/CallingConvLower.cpp
138*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/CodeGen.cpp
139*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/CodeGenPrepare.cpp
140*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/CriticalAntiDepBreaker.cpp
141*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/DFAPacketizer.cpp
142*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/DeadMachineInstructionElim.cpp
143*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/DetectDeadLanes.cpp
144*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/DwarfEHPrepare.cpp
145*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/EarlyIfConversion.cpp
146*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/EdgeBundles.cpp
147*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ExecutionDepsFix.cpp
148*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ExpandISelPseudos.cpp
149*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ExpandPostRAPseudos.cpp
150*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/FaultMaps.cpp
151*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/FuncletLayout.cpp
152*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/GCMetadata.cpp
153*986e05bcSDimitry AndricSRCS_EXT+=	CodeGen/GCMetadataPrinter.cpp
154*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/GCRootLowering.cpp
155*986e05bcSDimitry AndricSRCS_EXT+=	CodeGen/GCStrategy.cpp
156*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/GlobalISel/GlobalISel.cpp
157*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/GlobalMerge.cpp
158*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/IfConversion.cpp
159*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ImplicitNullChecks.cpp
160*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/InlineSpiller.cpp
161*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/InterferenceCache.cpp
162*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/InterleavedAccessPass.cpp
163*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/IntrinsicLowering.cpp
164*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LLVMTargetMachine.cpp
165*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LatencyPriorityQueue.cpp
166*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LexicalScopes.cpp
167*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveDebugValues.cpp
168*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveDebugVariables.cpp
169*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveInterval.cpp
170*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveIntervalAnalysis.cpp
171*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveIntervalUnion.cpp
172*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LivePhysRegs.cpp
173*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveRangeCalc.cpp
174*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveRangeEdit.cpp
175*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveRegMatrix.cpp
176*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveStackAnalysis.cpp
177*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LiveVariables.cpp
178*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LocalStackSlotAllocation.cpp
179*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/LowerEmuTLS.cpp
180*986e05bcSDimitry AndricSRCS_EXT+=	CodeGen/MIRParser/MILexer.cpp
181*986e05bcSDimitry AndricSRCS_EXT+=	CodeGen/MIRParser/MIParser.cpp
182*986e05bcSDimitry AndricSRCS_EXT+=	CodeGen/MIRParser/MIRParser.cpp
183*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MIRPrinter.cpp
184*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MIRPrintingPass.cpp
185*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineBasicBlock.cpp
186*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineBlockFrequencyInfo.cpp
187*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineBlockPlacement.cpp
188*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineBranchProbabilityInfo.cpp
189*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineCSE.cpp
190*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineCombiner.cpp
191*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineCopyPropagation.cpp
192*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineDominanceFrontier.cpp
193*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineDominators.cpp
194*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineFunction.cpp
195*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineFunctionAnalysis.cpp
196*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineFunctionPass.cpp
197*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineFunctionPrinterPass.cpp
198*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineInstr.cpp
199*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineInstrBundle.cpp
200*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineLICM.cpp
201*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineLoopInfo.cpp
202*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineModuleInfo.cpp
203*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineModuleInfoImpls.cpp
204*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachinePassRegistry.cpp
205*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachinePostDominators.cpp
206*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineRegionInfo.cpp
207*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineRegisterInfo.cpp
208*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineSSAUpdater.cpp
209*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineScheduler.cpp
210*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineSink.cpp
211*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineTraceMetrics.cpp
212*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/MachineVerifier.cpp
213*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/OptimizePHIs.cpp
214*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PHIElimination.cpp
215*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PHIEliminationUtils.cpp
216*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ParallelCG.cpp
217*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PatchableFunction.cpp
218*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PeepholeOptimizer.cpp
219*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PostRAHazardRecognizer.cpp
220*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PostRASchedulerList.cpp
221*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PreISelIntrinsicLowering.cpp
222*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ProcessImplicitDefs.cpp
223*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PrologEpilogInserter.cpp
224*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/PseudoSourceValue.cpp
225*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegAllocBase.cpp
226*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegAllocBasic.cpp
227*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegAllocFast.cpp
228*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegAllocGreedy.cpp
229*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegAllocPBQP.cpp
230*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegUsageInfoCollector.cpp
231*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegUsageInfoPropagate.cpp
232*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegisterClassInfo.cpp
233*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegisterCoalescer.cpp
234*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegisterPressure.cpp
235*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegisterScavenging.cpp
236*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RegisterUsageInfo.cpp
237*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/RenameIndependentSubregs.cpp
238*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SafeStack.cpp
239*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SafeStackColoring.cpp
240*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SafeStackLayout.cpp
241*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ScheduleDAG.cpp
242*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ScheduleDAGInstrs.cpp
243*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ScheduleDAGPrinter.cpp
244*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ScoreboardHazardRecognizer.cpp
245*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/DAGCombiner.cpp
246*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/FastISel.cpp
247*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
248*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/InstrEmitter.cpp
249*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/LegalizeDAG.cpp
250*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
251*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
252*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/LegalizeTypes.cpp
253*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
254*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/LegalizeVectorOps.cpp
255*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
256*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
257*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/ScheduleDAGFast.cpp
258*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
259*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
260*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
261*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/SelectionDAG.cpp
262*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
263*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/SelectionDAGDumper.cpp
264*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/SelectionDAGISel.cpp
265*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
266*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/SelectionDAGTargetInfo.cpp
267*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/StatepointLowering.cpp
268*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SelectionDAG/TargetLowering.cpp
269*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ShadowStackGCLowering.cpp
270*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/ShrinkWrap.cpp
271*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SjLjEHPrepare.cpp
272*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SlotIndexes.cpp
273*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SpillPlacement.cpp
274*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/SplitKit.cpp
275*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/StackColoring.cpp
276*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/StackMapLivenessAnalysis.cpp
277*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/StackMaps.cpp
278*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/StackProtector.cpp
279*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/StackSlotColoring.cpp
280*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TailDuplication.cpp
281*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TailDuplicator.cpp
282*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TargetFrameLoweringImpl.cpp
283*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TargetInstrInfo.cpp
284*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TargetLoweringBase.cpp
285*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TargetLoweringObjectFileImpl.cpp
286*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TargetOptionsImpl.cpp
287*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TargetPassConfig.cpp
288*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TargetRegisterInfo.cpp
289*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TargetSchedule.cpp
290*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/TwoAddressInstructionPass.cpp
291*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/UnreachableBlockElim.cpp
292*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/VirtRegMap.cpp
293*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/WinEHPrepare.cpp
294*986e05bcSDimitry AndricSRCS_MIN+=	CodeGen/XRayInstrumentation.cpp
295*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/ByteStream.cpp
296*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/CVTypeVisitor.cpp
297*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/CodeViewError.cpp
298*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/CodeView/EnumTables.cpp
299*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/FieldListRecordBuilder.cpp
300*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/Line.cpp
301*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/ListRecordBuilder.cpp
302*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/MemoryTypeTableBuilder.cpp
303*986e05bcSDimitry Andric#SRCS_EXT+=	DebugInfo/CodeView/MethodListRecordBuilder.cpp
304*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/ModuleSubstream.cpp
305*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/ModuleSubstreamVisitor.cpp
306*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/RecordSerialization.cpp
307*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/StreamReader.cpp
308*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/StreamWriter.cpp
309*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/SymbolDumper.cpp
310*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/TypeDumper.cpp
311*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/TypeRecord.cpp
312*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/TypeRecordBuilder.cpp
313*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/TypeStreamMerger.cpp
314*986e05bcSDimitry AndricSRCS_MIN+=	DebugInfo/CodeView/TypeTableBuilder.cpp
315*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFAbbreviationDeclaration.cpp
316*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFAcceleratorTable.cpp
317*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFCompileUnit.cpp
318*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFContext.cpp
319*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugAbbrev.cpp
320*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugArangeSet.cpp
321*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugAranges.cpp
322*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugFrame.cpp
323*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugInfoEntry.cpp
324*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugLine.cpp
325*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugLoc.cpp
326*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugMacro.cpp
327*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFDebugRangeList.cpp
328*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFFormValue.cpp
329*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFTypeUnit.cpp
330*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFUnit.cpp
331*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/DWARFUnitIndex.cpp
332*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/DWARF/SyntaxHighlighting.cpp
333*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/GenericError.cpp
334*986e05bcSDimitry Andric#SRCS_EXT+=	DebugInfo/PDB/IPDBSourceFile.cpp
335*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDB.cpp
336*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBContext.cpp
337*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBExtras.cpp
338*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBInterfaceAnchors.cpp
339*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymDumper.cpp
340*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbol.cpp
341*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolAnnotation.cpp
342*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolBlock.cpp
343*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolCompiland.cpp
344*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolCompilandDetails.cpp
345*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolCompilandEnv.cpp
346*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolCustom.cpp
347*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolData.cpp
348*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolExe.cpp
349*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolFunc.cpp
350*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolFuncDebugEnd.cpp
351*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp
352*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolLabel.cpp
353*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolPublicSymbol.cpp
354*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolThunk.cpp
355*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeArray.cpp
356*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp
357*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeBuiltin.cpp
358*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeCustom.cpp
359*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeDimension.cpp
360*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeEnum.cpp
361*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeFriend.cpp
362*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeFunctionArg.cpp
363*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeFunctionSig.cpp
364*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeManaged.cpp
365*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypePointer.cpp
366*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeTypedef.cpp
367*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeUDT.cpp
368*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeVTable.cpp
369*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolTypeVTableShape.cpp
370*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolUnknown.cpp
371*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/PDBSymbolUsingNamespace.cpp
372*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/DbiStream.cpp
373*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/DbiStreamBuilder.cpp
374*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/EnumTables.cpp
375*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/Hash.cpp
376*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/IndexedStreamData.cpp
377*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/InfoStream.cpp
378*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/InfoStreamBuilder.cpp
379*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/MappedBlockStream.cpp
380*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/ModInfo.cpp
381*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/ModStream.cpp
382*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/MsfBuilder.cpp
383*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/MsfCommon.cpp
384*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/NameHashTable.cpp
385*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/NameMap.cpp
386*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/NameMapBuilder.cpp
387*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/PDBFile.cpp
388*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/PDBFileBuilder.cpp
389*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/PublicsStream.cpp
390*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/RawError.cpp
391*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/RawSession.cpp
392*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/SymbolStream.cpp
393*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/PDB/Raw/TpiStream.cpp
394*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/Symbolize/DIPrinter.cpp
395*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/Symbolize/SymbolizableObjectFile.cpp
396*986e05bcSDimitry AndricSRCS_EXT+=	DebugInfo/Symbolize/Symbolize.cpp
397*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/ExecutionEngine.cpp
398*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/ExecutionEngineBindings.cpp
399*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/GDBRegistrationListener.cpp
400*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/Interpreter/Execution.cpp
401*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/Interpreter/ExternalFunctions.cpp
402*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/Interpreter/Interpreter.cpp
403*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/MCJIT/MCJIT.cpp
404*986e05bcSDimitry AndricSRCS_EXT+=	ExecutionEngine/Orc/ExecutionUtils.cpp
405*986e05bcSDimitry AndricSRCS_EXT+=	ExecutionEngine/Orc/IndirectionUtils.cpp
406*986e05bcSDimitry AndricSRCS_EXT+=	ExecutionEngine/Orc/NullResolver.cpp
407*986e05bcSDimitry AndricSRCS_EXT+=	ExecutionEngine/Orc/OrcABISupport.cpp
408*986e05bcSDimitry AndricSRCS_EXT+=	ExecutionEngine/Orc/OrcCBindings.cpp
409*986e05bcSDimitry AndricSRCS_EXT+=	ExecutionEngine/Orc/OrcError.cpp
410*986e05bcSDimitry AndricSRCS_EXT+=	ExecutionEngine/Orc/OrcMCJITReplacement.cpp
411*986e05bcSDimitry Andric#SRCS_EXT+=	ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.cpp
412*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
413*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
414*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
415*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
416*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
417*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp
418*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/SectionMemoryManager.cpp
419*986e05bcSDimitry AndricSRCS_XDB+=	ExecutionEngine/TargetSelect.cpp
420*986e05bcSDimitry AndricSRCS_MIN+=	IR/AsmWriter.cpp
421*986e05bcSDimitry AndricSRCS_MIN+=	IR/Attributes.cpp
422*986e05bcSDimitry AndricSRCS_MIN+=	IR/AutoUpgrade.cpp
423*986e05bcSDimitry AndricSRCS_MIN+=	IR/BasicBlock.cpp
424*986e05bcSDimitry AndricSRCS_MIN+=	IR/Comdat.cpp
425*986e05bcSDimitry AndricSRCS_MIN+=	IR/ConstantFold.cpp
426*986e05bcSDimitry AndricSRCS_MIN+=	IR/ConstantRange.cpp
427*986e05bcSDimitry AndricSRCS_MIN+=	IR/Constants.cpp
428*986e05bcSDimitry AndricSRCS_MIN+=	IR/Core.cpp
429*986e05bcSDimitry AndricSRCS_MIN+=	IR/DIBuilder.cpp
430*986e05bcSDimitry AndricSRCS_MIN+=	IR/DataLayout.cpp
431*986e05bcSDimitry AndricSRCS_MIN+=	IR/DebugInfo.cpp
432*986e05bcSDimitry AndricSRCS_MIN+=	IR/DebugInfoMetadata.cpp
433*986e05bcSDimitry AndricSRCS_MIN+=	IR/DebugLoc.cpp
434*986e05bcSDimitry AndricSRCS_MIN+=	IR/DiagnosticInfo.cpp
435*986e05bcSDimitry AndricSRCS_MIN+=	IR/DiagnosticPrinter.cpp
436*986e05bcSDimitry AndricSRCS_MIN+=	IR/Dominators.cpp
437*986e05bcSDimitry AndricSRCS_MIN+=	IR/Function.cpp
438*986e05bcSDimitry AndricSRCS_MIN+=	IR/GCOV.cpp
439*986e05bcSDimitry AndricSRCS_MIN+=	IR/GVMaterializer.cpp
440*986e05bcSDimitry AndricSRCS_MIN+=	IR/Globals.cpp
441*986e05bcSDimitry AndricSRCS_MIN+=	IR/IRBuilder.cpp
442*986e05bcSDimitry AndricSRCS_MIN+=	IR/IRPrintingPasses.cpp
443*986e05bcSDimitry AndricSRCS_MIN+=	IR/InlineAsm.cpp
444*986e05bcSDimitry AndricSRCS_MIN+=	IR/Instruction.cpp
445*986e05bcSDimitry AndricSRCS_MIN+=	IR/Instructions.cpp
446*986e05bcSDimitry AndricSRCS_MIN+=	IR/IntrinsicInst.cpp
447*986e05bcSDimitry AndricSRCS_MIN+=	IR/LLVMContext.cpp
448*986e05bcSDimitry AndricSRCS_MIN+=	IR/LLVMContextImpl.cpp
449*986e05bcSDimitry AndricSRCS_MIN+=	IR/LegacyPassManager.cpp
450*986e05bcSDimitry AndricSRCS_MIN+=	IR/MDBuilder.cpp
451*986e05bcSDimitry AndricSRCS_MIN+=	IR/Mangler.cpp
452*986e05bcSDimitry AndricSRCS_MIN+=	IR/Metadata.cpp
453*986e05bcSDimitry AndricSRCS_MIN+=	IR/Module.cpp
454*986e05bcSDimitry AndricSRCS_MIN+=	IR/ModuleSummaryIndex.cpp
455*986e05bcSDimitry AndricSRCS_MIN+=	IR/Operator.cpp
456*986e05bcSDimitry AndricSRCS_MIN+=	IR/OptBisect.cpp
457*986e05bcSDimitry AndricSRCS_MIN+=	IR/Pass.cpp
458*986e05bcSDimitry AndricSRCS_MIN+=	IR/PassManager.cpp
459*986e05bcSDimitry AndricSRCS_MIN+=	IR/PassRegistry.cpp
460*986e05bcSDimitry AndricSRCS_MIN+=	IR/ProfileSummary.cpp
461*986e05bcSDimitry AndricSRCS_MIN+=	IR/Statepoint.cpp
462*986e05bcSDimitry AndricSRCS_MIN+=	IR/Type.cpp
463*986e05bcSDimitry AndricSRCS_MIN+=	IR/TypeFinder.cpp
464*986e05bcSDimitry AndricSRCS_MIN+=	IR/Use.cpp
465*986e05bcSDimitry AndricSRCS_MIN+=	IR/User.cpp
466*986e05bcSDimitry AndricSRCS_MIN+=	IR/Value.cpp
467*986e05bcSDimitry AndricSRCS_MIN+=	IR/ValueSymbolTable.cpp
468*986e05bcSDimitry AndricSRCS_MIN+=	IR/ValueTypes.cpp
469*986e05bcSDimitry AndricSRCS_MIN+=	IR/Verifier.cpp
470*986e05bcSDimitry AndricSRCS_MIN+=	IRReader/IRReader.cpp
471*986e05bcSDimitry AndricSRCS_EXT+=	LTO/LTO.cpp
472*986e05bcSDimitry AndricSRCS_EXT+=	LTO/LTOCodeGenerator.cpp
473*986e05bcSDimitry AndricSRCS_EXT+=	LTO/LTOModule.cpp
474*986e05bcSDimitry AndricSRCS_EXT+=	LTO/ThinLTOCodeGenerator.cpp
475*986e05bcSDimitry AndricSRCS_EXT+=	LTO/UpdateCompilerUsed.cpp
476*986e05bcSDimitry AndricSRCS_EXT+=	LibDriver/LibDriver.cpp
477*986e05bcSDimitry AndricSRCS_MIN+=	LineEditor/LineEditor.cpp
478*986e05bcSDimitry AndricSRCS_MIN+=	Linker/IRMover.cpp
479*986e05bcSDimitry AndricSRCS_MIN+=	Linker/LinkModules.cpp
480*986e05bcSDimitry AndricSRCS_MIN+=	MC/ConstantPools.cpp
481*986e05bcSDimitry AndricSRCS_MIN+=	MC/ELFObjectWriter.cpp
482*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCAsmBackend.cpp
483*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCAsmInfo.cpp
484*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCAsmInfoCOFF.cpp
485*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCAsmInfoDarwin.cpp
486*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCAsmInfoELF.cpp
487*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCAsmStreamer.cpp
488*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCAssembler.cpp
489*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCCodeEmitter.cpp
490*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCCodeView.cpp
491*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCContext.cpp
492*986e05bcSDimitry AndricSRCS_XDB+=	MC/MCDisassembler/Disassembler.cpp
493*986e05bcSDimitry AndricSRCS_XDB+=	MC/MCDisassembler/MCDisassembler.cpp
494*986e05bcSDimitry AndricSRCS_XDB+=	MC/MCDisassembler/MCExternalSymbolizer.cpp
495*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCDisassembler/MCRelocationInfo.cpp
496*986e05bcSDimitry AndricSRCS_XDB+=	MC/MCDisassembler/MCSymbolizer.cpp
497*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCDwarf.cpp
498*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCELFObjectTargetWriter.cpp
499*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCELFStreamer.cpp
500*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCExpr.cpp
501*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCFragment.cpp
502*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCInst.cpp
503*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCInstPrinter.cpp
504*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCInstrAnalysis.cpp
505*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCInstrDesc.cpp
506*986e05bcSDimitry Andric#SRCS_EXT+=	MC/MCLabel.cpp
507*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCLinkerOptimizationHint.cpp
508*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCMachOStreamer.cpp
509*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCMachObjectTargetWriter.cpp
510*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCNullStreamer.cpp
511*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCObjectFileInfo.cpp
512*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCObjectStreamer.cpp
513*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCObjectWriter.cpp
514*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/AsmLexer.cpp
515*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/AsmParser.cpp
516*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/COFFAsmParser.cpp
517*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/DarwinAsmParser.cpp
518*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/ELFAsmParser.cpp
519*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/MCAsmLexer.cpp
520*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/MCAsmParser.cpp
521*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/MCAsmParserExtension.cpp
522*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCParser/MCTargetAsmParser.cpp
523*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCRegisterInfo.cpp
524*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCSchedule.cpp
525*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCSection.cpp
526*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCSectionCOFF.cpp
527*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCSectionELF.cpp
528*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCSectionMachO.cpp
529*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCStreamer.cpp
530*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCSubtargetInfo.cpp
531*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCSymbol.cpp
532*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCSymbolELF.cpp
533*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCTargetOptions.cpp
534*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCValue.cpp
535*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCWin64EH.cpp
536*986e05bcSDimitry AndricSRCS_MIN+=	MC/MCWinEH.cpp
537*986e05bcSDimitry AndricSRCS_MIN+=	MC/MachObjectWriter.cpp
538*986e05bcSDimitry AndricSRCS_MIN+=	MC/StringTableBuilder.cpp
539*986e05bcSDimitry AndricSRCS_MIN+=	MC/SubtargetFeature.cpp
540*986e05bcSDimitry AndricSRCS_MIN+=	MC/WinCOFFObjectWriter.cpp
541*986e05bcSDimitry AndricSRCS_MIN+=	MC/WinCOFFStreamer.cpp
542*986e05bcSDimitry AndricSRCS_MIN+=	Object/Archive.cpp
543*986e05bcSDimitry AndricSRCS_MIN+=	Object/ArchiveWriter.cpp
544*986e05bcSDimitry AndricSRCS_MIN+=	Object/Binary.cpp
545*986e05bcSDimitry AndricSRCS_MIN+=	Object/COFFObjectFile.cpp
546*986e05bcSDimitry AndricSRCS_MIN+=	Object/ELF.cpp
547*986e05bcSDimitry AndricSRCS_MIN+=	Object/ELFObjectFile.cpp
548*986e05bcSDimitry AndricSRCS_MIN+=	Object/Error.cpp
549*986e05bcSDimitry AndricSRCS_MIN+=	Object/IRObjectFile.cpp
550*986e05bcSDimitry AndricSRCS_MIN+=	Object/MachOObjectFile.cpp
551*986e05bcSDimitry AndricSRCS_MIN+=	Object/MachOUniversal.cpp
552*986e05bcSDimitry AndricSRCS_MIN+=	Object/ModuleSummaryIndexObjectFile.cpp
553*986e05bcSDimitry AndricSRCS_EXT+=	Object/Object.cpp
554*986e05bcSDimitry AndricSRCS_MIN+=	Object/ObjectFile.cpp
555*986e05bcSDimitry AndricSRCS_MIN+=	Object/RecordStreamer.cpp
556*986e05bcSDimitry AndricSRCS_EXT+=	Object/SymbolSize.cpp
557*986e05bcSDimitry AndricSRCS_MIN+=	Object/SymbolicFile.cpp
558*986e05bcSDimitry AndricSRCS_MIN+=	ObjectYAML/COFFYAML.cpp
559*986e05bcSDimitry AndricSRCS_MIN+=	ObjectYAML/ELFYAML.cpp
560*986e05bcSDimitry AndricSRCS_MIN+=	ObjectYAML/MachOYAML.cpp
561*986e05bcSDimitry Andric#SRCS_EXT+=	ObjectYAML/ObjectYAML.cpp
562*986e05bcSDimitry Andric#SRCS_EXT+=	ObjectYAML/YAML.cpp
563*986e05bcSDimitry AndricSRCS_MIN+=	Option/Arg.cpp
564*986e05bcSDimitry AndricSRCS_MIN+=	Option/ArgList.cpp
565*986e05bcSDimitry AndricSRCS_MIN+=	Option/OptTable.cpp
566*986e05bcSDimitry AndricSRCS_MIN+=	Option/Option.cpp
567*986e05bcSDimitry AndricSRCS_EXT+=	Passes/PassBuilder.cpp
568*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/Coverage/CoverageMapping.cpp
569*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/Coverage/CoverageMappingReader.cpp
570*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/Coverage/CoverageMappingWriter.cpp
571*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/InstrProf.cpp
572*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/InstrProfReader.cpp
573*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/InstrProfWriter.cpp
574*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/ProfileSummaryBuilder.cpp
575*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/SampleProf.cpp
576*986e05bcSDimitry AndricSRCS_MIN+=	ProfileData/SampleProfReader.cpp
577*986e05bcSDimitry AndricSRCS_EXT+=	ProfileData/SampleProfWriter.cpp
578*986e05bcSDimitry AndricSRCS_MIN+=	Support/APFloat.cpp
579*986e05bcSDimitry AndricSRCS_MIN+=	Support/APInt.cpp
580*986e05bcSDimitry AndricSRCS_MIN+=	Support/APSInt.cpp
581*986e05bcSDimitry AndricSRCS_MIN+=	Support/ARMBuildAttrs.cpp
582*986e05bcSDimitry Andric#SRCS_EXT+=	Support/ARMWinEH.cpp
583*986e05bcSDimitry AndricSRCS_MIN+=	Support/Allocator.cpp
584*986e05bcSDimitry AndricSRCS_MIN+=	Support/Atomic.cpp
585*986e05bcSDimitry AndricSRCS_MIN+=	Support/BlockFrequency.cpp
586*986e05bcSDimitry AndricSRCS_MIN+=	Support/BranchProbability.cpp
587*986e05bcSDimitry AndricSRCS_EXT+=	Support/COM.cpp
588*986e05bcSDimitry AndricSRCS_MIN+=	Support/CachePruning.cpp
589*986e05bcSDimitry AndricSRCS_MIN+=	Support/CommandLine.cpp
590*986e05bcSDimitry AndricSRCS_MIN+=	Support/Compression.cpp
591*986e05bcSDimitry AndricSRCS_MIN+=	Support/ConvertUTF.c
592*986e05bcSDimitry AndricSRCS_MIN+=	Support/ConvertUTFWrapper.cpp
593*986e05bcSDimitry AndricSRCS_MIN+=	Support/CrashRecoveryContext.cpp
594*986e05bcSDimitry AndricSRCS_MIN+=	Support/DAGDeltaAlgorithm.cpp
595*986e05bcSDimitry AndricSRCS_MIN+=	Support/DataExtractor.cpp
596*986e05bcSDimitry AndricSRCS_EXT+=	Support/DataStream.cpp
597*986e05bcSDimitry AndricSRCS_MIN+=	Support/Debug.cpp
598*986e05bcSDimitry AndricSRCS_MIN+=	Support/DeltaAlgorithm.cpp
599*986e05bcSDimitry AndricSRCS_MIN+=	Support/Dwarf.cpp
600*986e05bcSDimitry AndricSRCS_MIN+=	Support/DynamicLibrary.cpp
601*986e05bcSDimitry AndricSRCS_MIN+=	Support/Errno.cpp
602*986e05bcSDimitry AndricSRCS_MIN+=	Support/Error.cpp
603*986e05bcSDimitry AndricSRCS_MIN+=	Support/ErrorHandling.cpp
604*986e05bcSDimitry AndricSRCS_EXT+=	Support/FileOutputBuffer.cpp
605*986e05bcSDimitry AndricSRCS_EXT+=	Support/FileUtilities.cpp
606*986e05bcSDimitry AndricSRCS_MIN+=	Support/FoldingSet.cpp
607*986e05bcSDimitry AndricSRCS_MIN+=	Support/FormattedStream.cpp
608*986e05bcSDimitry AndricSRCS_MIN+=	Support/GraphWriter.cpp
609*986e05bcSDimitry AndricSRCS_MIN+=	Support/Hashing.cpp
610*986e05bcSDimitry AndricSRCS_MIN+=	Support/Host.cpp
611*986e05bcSDimitry AndricSRCS_MIN+=	Support/IntEqClasses.cpp
612*986e05bcSDimitry AndricSRCS_MIN+=	Support/IntervalMap.cpp
613*986e05bcSDimitry AndricSRCS_FUL+=	Support/IntrusiveRefCntPtr.cpp
614*986e05bcSDimitry AndricSRCS_MIN+=	Support/JamCRC.cpp
615*986e05bcSDimitry AndricSRCS_MIN+=	Support/LEB128.cpp
616*986e05bcSDimitry AndricSRCS_MIN+=	Support/LineIterator.cpp
617*986e05bcSDimitry AndricSRCS_MIN+=	Support/Locale.cpp
618*986e05bcSDimitry AndricSRCS_MIN+=	Support/LockFileManager.cpp
619*986e05bcSDimitry AndricSRCS_MIN+=	Support/MD5.cpp
620*986e05bcSDimitry AndricSRCS_MIN+=	Support/ManagedStatic.cpp
621*986e05bcSDimitry AndricSRCS_MIN+=	Support/MathExtras.cpp
622*986e05bcSDimitry AndricSRCS_XDB+=	Support/Memory.cpp
623*986e05bcSDimitry AndricSRCS_MIN+=	Support/MemoryBuffer.cpp
624*986e05bcSDimitry AndricSRCS_MIN+=	Support/MemoryObject.cpp
625*986e05bcSDimitry AndricSRCS_MIN+=	Support/Mutex.cpp
626*986e05bcSDimitry AndricSRCS_MIN+=	Support/Options.cpp
627*986e05bcSDimitry AndricSRCS_MIN+=	Support/Path.cpp
628*986e05bcSDimitry AndricSRCS_MIN+=	Support/PluginLoader.cpp
629*986e05bcSDimitry AndricSRCS_MIN+=	Support/PrettyStackTrace.cpp
630*986e05bcSDimitry AndricSRCS_MIN+=	Support/Process.cpp
631*986e05bcSDimitry AndricSRCS_MIN+=	Support/Program.cpp
632*986e05bcSDimitry AndricSRCS_MIN+=	Support/RWMutex.cpp
633*986e05bcSDimitry AndricSRCS_MIN+=	Support/RandomNumberGenerator.cpp
634*986e05bcSDimitry AndricSRCS_MIN+=	Support/Regex.cpp
635*986e05bcSDimitry AndricSRCS_MIN+=	Support/SHA1.cpp
636*986e05bcSDimitry AndricSRCS_MIN+=	Support/ScaledNumber.cpp
637*986e05bcSDimitry AndricSRCS_MIN+=	Support/ScopedPrinter.cpp
638*986e05bcSDimitry AndricSRCS_MIN+=	Support/SearchForAddressOfSpecialSymbol.cpp
639*986e05bcSDimitry AndricSRCS_MIN+=	Support/Signals.cpp
640*986e05bcSDimitry AndricSRCS_MIN+=	Support/SmallPtrSet.cpp
641*986e05bcSDimitry AndricSRCS_MIN+=	Support/SmallVector.cpp
642*986e05bcSDimitry AndricSRCS_MIN+=	Support/SourceMgr.cpp
643*986e05bcSDimitry AndricSRCS_MIN+=	Support/SpecialCaseList.cpp
644*986e05bcSDimitry AndricSRCS_MIN+=	Support/Statistic.cpp
645*986e05bcSDimitry AndricSRCS_MIN+=	Support/StreamingMemoryObject.cpp
646*986e05bcSDimitry AndricSRCS_MIN+=	Support/StringExtras.cpp
647*986e05bcSDimitry AndricSRCS_MIN+=	Support/StringMap.cpp
648*986e05bcSDimitry AndricSRCS_MIN+=	Support/StringRef.cpp
649*986e05bcSDimitry AndricSRCS_MIN+=	Support/StringSaver.cpp
650*986e05bcSDimitry AndricSRCS_EXT+=	Support/SystemUtils.cpp
651*986e05bcSDimitry AndricSRCS_MIN+=	Support/TargetParser.cpp
652*986e05bcSDimitry AndricSRCS_MIN+=	Support/TargetRegistry.cpp
653*986e05bcSDimitry AndricSRCS_MIN+=	Support/ThreadLocal.cpp
654*986e05bcSDimitry AndricSRCS_EXT+=	Support/ThreadPool.cpp
655*986e05bcSDimitry AndricSRCS_MIN+=	Support/Threading.cpp
656*986e05bcSDimitry AndricSRCS_MIN+=	Support/TimeValue.cpp
657*986e05bcSDimitry AndricSRCS_MIN+=	Support/Timer.cpp
658*986e05bcSDimitry AndricSRCS_MIN+=	Support/ToolOutputFile.cpp
659*986e05bcSDimitry AndricSRCS_MIN+=	Support/Triple.cpp
660*986e05bcSDimitry AndricSRCS_MIN+=	Support/Twine.cpp
661*986e05bcSDimitry AndricSRCS_MIN+=	Support/Unicode.cpp
662*986e05bcSDimitry AndricSRCS_MIN+=	Support/Valgrind.cpp
663*986e05bcSDimitry Andric#SRCS_EXT+=	Support/Watchdog.cpp
664*986e05bcSDimitry AndricSRCS_MIN+=	Support/YAMLParser.cpp
665*986e05bcSDimitry AndricSRCS_MIN+=	Support/YAMLTraits.cpp
666*986e05bcSDimitry AndricSRCS_MIN+=	Support/circular_raw_ostream.cpp
667*986e05bcSDimitry AndricSRCS_MIN+=	Support/raw_os_ostream.cpp
668*986e05bcSDimitry AndricSRCS_MIN+=	Support/raw_ostream.cpp
669*986e05bcSDimitry AndricSRCS_MIN+=	Support/regcomp.c
670*986e05bcSDimitry AndricSRCS_MIN+=	Support/regerror.c
671*986e05bcSDimitry AndricSRCS_MIN+=	Support/regexec.c
672*986e05bcSDimitry AndricSRCS_MIN+=	Support/regfree.c
673*986e05bcSDimitry AndricSRCS_MIN+=	Support/regstrlcpy.c
674*986e05bcSDimitry AndricSRCS_MIN+=	TableGen/Error.cpp
675*986e05bcSDimitry AndricSRCS_MIN+=	TableGen/Main.cpp
676*986e05bcSDimitry AndricSRCS_MIN+=	TableGen/Record.cpp
677*986e05bcSDimitry AndricSRCS_MIN+=	TableGen/SetTheory.cpp
678*986e05bcSDimitry AndricSRCS_MIN+=	TableGen/StringMatcher.cpp
679*986e05bcSDimitry AndricSRCS_MIN+=	TableGen/TGLexer.cpp
680*986e05bcSDimitry AndricSRCS_MIN+=	TableGen/TGParser.cpp
681*986e05bcSDimitry AndricSRCS_MIN+=	TableGen/TableGenBackend.cpp
682*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64A53Fix835769.cpp
683*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64A57FPLoadBalancing.cpp
684*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64AddressTypePromotion.cpp
685*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64AdvSIMDScalarPass.cpp
686*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64AsmPrinter.cpp
687*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64BranchRelaxation.cpp
688*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
689*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64CollectLOH.cpp
690*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64ConditionOptimizer.cpp
691*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64ConditionalCompares.cpp
692*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
693*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64ExpandPseudoInsts.cpp
694*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64FastISel.cpp
695*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64FrameLowering.cpp
696*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64ISelDAGToDAG.cpp
697*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64ISelLowering.cpp
698*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64InstrInfo.cpp
699*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64LoadStoreOptimizer.cpp
700*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64MCInstLower.cpp
701*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64PBQPRegAlloc.cpp
702*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64PromoteConstant.cpp
703*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64RedundantCopyElimination.cpp
704*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64RegisterInfo.cpp
705*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64SelectionDAGInfo.cpp
706*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64StorePairSuppress.cpp
707*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64Subtarget.cpp
708*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64TargetMachine.cpp
709*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64TargetObjectFile.cpp
710*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AArch64TargetTransformInfo.cpp
711*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/AsmParser/AArch64AsmParser.cpp
712*986e05bcSDimitry AndricSRCS_XDB+=	Target/AArch64/Disassembler/AArch64Disassembler.cpp
713*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp
714*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
715*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
716*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
717*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
718*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
719*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
720*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
721*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
722*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
723*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
724*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
725*986e05bcSDimitry AndricSRCS_MIN+=	Target/AArch64/Utils/AArch64BaseInfo.cpp
726*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/A15SDOptimizer.cpp
727*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMAsmPrinter.cpp
728*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMBaseInstrInfo.cpp
729*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMBaseRegisterInfo.cpp
730*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMConstantIslandPass.cpp
731*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMConstantPoolValue.cpp
732*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMExpandPseudoInsts.cpp
733*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMFastISel.cpp
734*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMFrameLowering.cpp
735*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMHazardRecognizer.cpp
736*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMISelDAGToDAG.cpp
737*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMISelLowering.cpp
738*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMInstrInfo.cpp
739*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMLoadStoreOptimizer.cpp
740*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMMCInstLower.cpp
741*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMMachineFunctionInfo.cpp
742*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMOptimizeBarriersPass.cpp
743*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMRegisterInfo.cpp
744*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMSelectionDAGInfo.cpp
745*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMSubtarget.cpp
746*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMTargetMachine.cpp
747*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMTargetObjectFile.cpp
748*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ARMTargetTransformInfo.cpp
749*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/AsmParser/ARMAsmParser.cpp
750*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/Disassembler/ARMDisassembler.cpp
751*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/InstPrinter/ARMInstPrinter.cpp
752*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
753*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
754*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
755*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
756*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
757*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMMCExpr.cpp
758*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
759*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
760*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
761*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
762*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp
763*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
764*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp
765*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/MLxExpansionPass.cpp
766*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/TargetInfo/ARMTargetInfo.cpp
767*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/Thumb1FrameLowering.cpp
768*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/Thumb1InstrInfo.cpp
769*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/Thumb2ITBlockPass.cpp
770*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/Thumb2InstrInfo.cpp
771*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/Thumb2SizeReduction.cpp
772*986e05bcSDimitry AndricSRCS_MIN+=	Target/ARM/ThumbRegisterInfo.cpp
773*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/AsmParser/MipsAsmParser.cpp
774*986e05bcSDimitry AndricSRCS_XDB+=	Target/Mips/Disassembler/MipsDisassembler.cpp
775*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/InstPrinter/MipsInstPrinter.cpp
776*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsABIFlagsSection.cpp
777*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsABIInfo.cpp
778*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
779*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
780*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
781*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
782*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
783*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsMCExpr.cpp
784*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
785*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
786*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsOptionRecord.cpp
787*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
788*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/Mips16FrameLowering.cpp
789*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/Mips16HardFloat.cpp
790*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/Mips16HardFloatInfo.cpp
791*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/Mips16ISelDAGToDAG.cpp
792*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/Mips16ISelLowering.cpp
793*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/Mips16InstrInfo.cpp
794*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/Mips16RegisterInfo.cpp
795*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsAnalyzeImmediate.cpp
796*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsAsmPrinter.cpp
797*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsCCState.cpp
798*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsConstantIslandPass.cpp
799*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsDelaySlotFiller.cpp
800*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsFastISel.cpp
801*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsFrameLowering.cpp
802*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsHazardSchedule.cpp
803*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsISelDAGToDAG.cpp
804*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsISelLowering.cpp
805*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsInstrInfo.cpp
806*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsLongBranch.cpp
807*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsMCInstLower.cpp
808*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsMachineFunction.cpp
809*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsModuleISelDAGToDAG.cpp
810*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsOptimizePICCall.cpp
811*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsOs16.cpp
812*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsRegisterInfo.cpp
813*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsSEFrameLowering.cpp
814*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsSEISelDAGToDAG.cpp
815*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsSEISelLowering.cpp
816*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsSEInstrInfo.cpp
817*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsSERegisterInfo.cpp
818*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsSubtarget.cpp
819*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsTargetMachine.cpp
820*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/MipsTargetObjectFile.cpp
821*986e05bcSDimitry AndricSRCS_MIN+=	Target/Mips/TargetInfo/MipsTargetInfo.cpp
822*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/AsmParser/PPCAsmParser.cpp
823*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/Disassembler/PPCDisassembler.cpp
824*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
825*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
826*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
827*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
828*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
829*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
830*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
831*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
832*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/MCTargetDesc/PPCPredicates.cpp
833*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCAsmPrinter.cpp
834*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCBoolRetToInt.cpp
835*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCBranchSelector.cpp
836*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCCCState.cpp
837*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCCTRLoops.cpp
838*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCEarlyReturn.cpp
839*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCFastISel.cpp
840*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCFrameLowering.cpp
841*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCHazardRecognizers.cpp
842*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCISelDAGToDAG.cpp
843*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCISelLowering.cpp
844*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCInstrInfo.cpp
845*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCLoopPreIncPrep.cpp
846*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCMCInstLower.cpp
847*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCMIPeephole.cpp
848*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCMachineFunctionInfo.cpp
849*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCQPXLoadSplat.cpp
850*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCRegisterInfo.cpp
851*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCSubtarget.cpp
852*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCTLSDynamicCall.cpp
853*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCTOCRegDeps.cpp
854*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCTargetMachine.cpp
855*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCTargetObjectFile.cpp
856*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCTargetTransformInfo.cpp
857*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCVSXCopy.cpp
858*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCVSXFMAMutate.cpp
859*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/PPCVSXSwapRemoval.cpp
860*986e05bcSDimitry AndricSRCS_MIN+=	Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
861*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/AsmParser/SparcAsmParser.cpp
862*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/DelaySlotFiller.cpp
863*986e05bcSDimitry AndricSRCS_XDB+=	Target/Sparc/Disassembler/SparcDisassembler.cpp
864*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/InstPrinter/SparcInstPrinter.cpp
865*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/LeonPasses.cpp
866*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
867*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
868*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
869*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
870*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
871*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
872*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp
873*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcAsmPrinter.cpp
874*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcFrameLowering.cpp
875*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcISelDAGToDAG.cpp
876*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcISelLowering.cpp
877*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcInstrInfo.cpp
878*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcMCInstLower.cpp
879*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcMachineFunctionInfo.cpp
880*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcRegisterInfo.cpp
881*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcSubtarget.cpp
882*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcTargetMachine.cpp
883*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/SparcTargetObjectFile.cpp
884*986e05bcSDimitry AndricSRCS_MIN+=	Target/Sparc/TargetInfo/SparcTargetInfo.cpp
885*986e05bcSDimitry AndricSRCS_MIN+=	Target/Target.cpp
886*986e05bcSDimitry Andric#SRCS_EXT+=	Target/TargetIntrinsicInfo.cpp
887*986e05bcSDimitry AndricSRCS_MIN+=	Target/TargetLoweringObjectFile.cpp
888*986e05bcSDimitry AndricSRCS_MIN+=	Target/TargetMachine.cpp
889*986e05bcSDimitry AndricSRCS_MIN+=	Target/TargetMachineC.cpp
890*986e05bcSDimitry AndricSRCS_MIN+=	Target/TargetRecip.cpp
891*986e05bcSDimitry AndricSRCS_MIN+=	Target/TargetSubtargetInfo.cpp
892*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/AsmParser/X86AsmInstrumentation.cpp
893*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/AsmParser/X86AsmParser.cpp
894*986e05bcSDimitry AndricSRCS_XDB+=	Target/X86/Disassembler/X86Disassembler.cpp
895*986e05bcSDimitry AndricSRCS_XDB+=	Target/X86/Disassembler/X86DisassemblerDecoder.cpp
896*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/InstPrinter/X86ATTInstPrinter.cpp
897*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/InstPrinter/X86InstComments.cpp
898*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/InstPrinter/X86IntelInstPrinter.cpp
899*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/MCTargetDesc/X86AsmBackend.cpp
900*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
901*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
902*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
903*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
904*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
905*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
906*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
907*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/TargetInfo/X86TargetInfo.cpp
908*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/Utils/X86ShuffleDecode.cpp
909*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86AsmPrinter.cpp
910*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86CallFrameOptimization.cpp
911*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86ExpandPseudo.cpp
912*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86FastISel.cpp
913*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86FixupBWInsts.cpp
914*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86FixupLEAs.cpp
915*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86FixupSetCC.cpp
916*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86FloatingPoint.cpp
917*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86FrameLowering.cpp
918*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86ISelDAGToDAG.cpp
919*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86ISelLowering.cpp
920*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86InstrInfo.cpp
921*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86MCInstLower.cpp
922*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86MachineFunctionInfo.cpp
923*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86OptimizeLEAs.cpp
924*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86PadShortFunction.cpp
925*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86RegisterInfo.cpp
926*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86SelectionDAGInfo.cpp
927*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86ShuffleDecodeConstantPool.cpp
928*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86Subtarget.cpp
929*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86TargetMachine.cpp
930*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86TargetObjectFile.cpp
931*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86TargetTransformInfo.cpp
932*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86VZeroUpper.cpp
933*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86WinAllocaExpander.cpp
934*986e05bcSDimitry AndricSRCS_MIN+=	Target/X86/X86WinEHState.cpp
935*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/ArgumentPromotion.cpp
936*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/BarrierNoopPass.cpp
937*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/ConstantMerge.cpp
938*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/CrossDSOCFI.cpp
939*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/DeadArgumentElimination.cpp
940*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/ElimAvailExtern.cpp
941*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/ExtractGV.cpp
942*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/ForceFunctionAttrs.cpp
943*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/FunctionAttrs.cpp
944*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/FunctionImport.cpp
945*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/GlobalDCE.cpp
946*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/GlobalOpt.cpp
947*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/IPConstantPropagation.cpp
948*986e05bcSDimitry AndricSRCS_EXT+=	Transforms/IPO/IPO.cpp
949*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/InferFunctionAttrs.cpp
950*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/InlineAlways.cpp
951*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/InlineSimple.cpp
952*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/Inliner.cpp
953*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/Internalize.cpp
954*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/LoopExtractor.cpp
955*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/LowerTypeTests.cpp
956*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/MergeFunctions.cpp
957*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/PartialInlining.cpp
958*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/PassManagerBuilder.cpp
959*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/PruneEH.cpp
960*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/SampleProfile.cpp
961*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/StripDeadPrototypes.cpp
962*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/StripSymbols.cpp
963*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/IPO/WholeProgramDevirt.cpp
964*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineAddSub.cpp
965*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineAndOrXor.cpp
966*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineCalls.cpp
967*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineCasts.cpp
968*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineCompares.cpp
969*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
970*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineMulDivRem.cpp
971*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombinePHI.cpp
972*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineSelect.cpp
973*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineShifts.cpp
974*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
975*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstCombineVectorOps.cpp
976*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/InstCombine/InstructionCombining.cpp
977*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/AddressSanitizer.cpp
978*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/BoundsChecking.cpp
979*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/DataFlowSanitizer.cpp
980*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/EfficiencySanitizer.cpp
981*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/GCOVProfiling.cpp
982*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/IndirectCallPromotion.cpp
983*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/InstrProfiling.cpp
984*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/Instrumentation.cpp
985*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/MemorySanitizer.cpp
986*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/PGOInstrumentation.cpp
987*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/SanitizerCoverage.cpp
988*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Instrumentation/ThreadSanitizer.cpp
989*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/ObjCARC/DependencyAnalysis.cpp
990*986e05bcSDimitry AndricSRCS_EXT+=	Transforms/ObjCARC/ObjCARC.cpp
991*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/ObjCARC/ObjCARCAPElim.cpp
992*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/ObjCARC/ObjCARCContract.cpp
993*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/ObjCARC/ObjCARCExpand.cpp
994*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/ObjCARC/ObjCARCOpts.cpp
995*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/ObjCARC/ProvenanceAnalysis.cpp
996*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/ObjCARC/ProvenanceAnalysisEvaluator.cpp
997*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/ObjCARC/PtrState.cpp
998*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/ADCE.cpp
999*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/AlignmentFromAssumptions.cpp
1000*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/BDCE.cpp
1001*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/ConstantHoisting.cpp
1002*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/ConstantProp.cpp
1003*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/CorrelatedValuePropagation.cpp
1004*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/DCE.cpp
1005*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/DeadStoreElimination.cpp
1006*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/EarlyCSE.cpp
1007*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/FlattenCFGPass.cpp
1008*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/Float2Int.cpp
1009*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/GVN.cpp
1010*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/GVNHoist.cpp
1011*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/GuardWidening.cpp
1012*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/IndVarSimplify.cpp
1013*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/InductiveRangeCheckElimination.cpp
1014*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/JumpThreading.cpp
1015*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LICM.cpp
1016*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoadCombine.cpp
1017*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopDataPrefetch.cpp
1018*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopDeletion.cpp
1019*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopDistribute.cpp
1020*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopIdiomRecognize.cpp
1021*986e05bcSDimitry AndricSRCS_EXT+=	Transforms/Scalar/LoopInstSimplify.cpp
1022*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopInterchange.cpp
1023*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopLoadElimination.cpp
1024*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopRerollPass.cpp
1025*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopRotation.cpp
1026*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopSimplifyCFG.cpp
1027*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopStrengthReduce.cpp
1028*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopUnrollPass.cpp
1029*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopUnswitch.cpp
1030*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LoopVersioningLICM.cpp
1031*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LowerAtomic.cpp
1032*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LowerExpectIntrinsic.cpp
1033*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/LowerGuardIntrinsic.cpp
1034*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/MemCpyOptimizer.cpp
1035*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/MergedLoadStoreMotion.cpp
1036*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/NaryReassociate.cpp
1037*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/PartiallyInlineLibCalls.cpp
1038*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/PlaceSafepoints.cpp
1039*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/Reassociate.cpp
1040*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/Reg2Mem.cpp
1041*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/RewriteStatepointsForGC.cpp
1042*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/SCCP.cpp
1043*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/SROA.cpp
1044*986e05bcSDimitry AndricSRCS_EXT+=	Transforms/Scalar/Scalar.cpp
1045*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/Scalarizer.cpp
1046*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
1047*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/SimplifyCFGPass.cpp
1048*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/Sink.cpp
1049*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/SpeculativeExecution.cpp
1050*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/StraightLineStrengthReduce.cpp
1051*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/StructurizeCFG.cpp
1052*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Scalar/TailRecursionElimination.cpp
1053*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/ASanStackFrameLayout.cpp
1054*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/AddDiscriminators.cpp
1055*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/BasicBlockUtils.cpp
1056*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/BreakCriticalEdges.cpp
1057*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/BuildLibCalls.cpp
1058*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/BypassSlowDivision.cpp
1059*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/CloneFunction.cpp
1060*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/CloneModule.cpp
1061*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/CmpInstAnalysis.cpp
1062*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/CodeExtractor.cpp
1063*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/CtorUtils.cpp
1064*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/DemoteRegToStack.cpp
1065*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/Evaluator.cpp
1066*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/FlattenCFG.cpp
1067*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/FunctionImportUtils.cpp
1068*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/GlobalStatus.cpp
1069*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/InlineFunction.cpp
1070*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/InstructionNamer.cpp
1071*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/IntegerDivision.cpp
1072*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/LCSSA.cpp
1073*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/Local.cpp
1074*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/LoopSimplify.cpp
1075*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/LoopUnroll.cpp
1076*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/LoopUnrollRuntime.cpp
1077*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/LoopUtils.cpp
1078*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/LoopVersioning.cpp
1079*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/LowerInvoke.cpp
1080*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/LowerSwitch.cpp
1081*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/Mem2Reg.cpp
1082*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/MemorySSA.cpp
1083*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/MetaRenamer.cpp
1084*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/ModuleUtils.cpp
1085*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/NameAnonFunctions.cpp
1086*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/PromoteMemoryToRegister.cpp
1087*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/SSAUpdater.cpp
1088*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/SanitizerStats.cpp
1089*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/SimplifyCFG.cpp
1090*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/SimplifyIndVar.cpp
1091*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/SimplifyInstructions.cpp
1092*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/SimplifyLibCalls.cpp
1093*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/SplitModule.cpp
1094*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/SymbolRewriter.cpp
1095*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/UnifyFunctionExitNodes.cpp
1096*986e05bcSDimitry AndricSRCS_EXT+=	Transforms/Utils/Utils.cpp
1097*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Utils/ValueMapper.cpp
1098*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Vectorize/BBVectorize.cpp
1099*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Vectorize/LoadStoreVectorizer.cpp
1100*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Vectorize/LoopVectorize.cpp
1101*986e05bcSDimitry AndricSRCS_MIN+=	Transforms/Vectorize/SLPVectorizer.cpp
1102*986e05bcSDimitry AndricSRCS_EXT+=	Transforms/Vectorize/Vectorize.cpp
1103*986e05bcSDimitry Andric
1104*986e05bcSDimitry AndricSRCS_ALL+=	${SRCS_MIN}
1105*986e05bcSDimitry Andric.if ${MK_CLANG_EXTRAS} != "no"
1106*986e05bcSDimitry AndricSRCS_ALL+=	${SRCS_EXT}
1107*986e05bcSDimitry Andric.endif
1108*986e05bcSDimitry Andric.if ${MK_CLANG_FULL} != "no"
1109*986e05bcSDimitry AndricSRCS_ALL+=	${SRCS_FUL}
1110*986e05bcSDimitry Andric.endif
1111*986e05bcSDimitry Andric.if ${MK_CLANG_EXTRAS} != "no" || ${MK_LLDB} != "no"
1112*986e05bcSDimitry AndricSRCS_ALL+=	${SRCS_XDB}
1113*986e05bcSDimitry Andric.endif
1114*986e05bcSDimitry AndricSRCS+=		${SRCS_ALL:O}
1115*986e05bcSDimitry Andric
1116*986e05bcSDimitry Andricllvm/IR/Attributes.inc: ${LLVM_SRCS}/include/llvm/IR/Attributes.td
1117*986e05bcSDimitry Andric	${LLVM_TBLGEN} -gen-attrs \
1118*986e05bcSDimitry Andric	    -I ${LLVM_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
1119*986e05bcSDimitry Andric	    ${LLVM_SRCS}/include/llvm/IR/Attributes.td
1120*986e05bcSDimitry AndricTGHDRS+=	llvm/IR/Attributes.inc
1121*986e05bcSDimitry Andric
1122*986e05bcSDimitry Andricllvm/IR/Intrinsics.gen: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
1123*986e05bcSDimitry Andric	${LLVM_TBLGEN} -gen-intrinsic \
1124*986e05bcSDimitry Andric	    -I ${LLVM_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
1125*986e05bcSDimitry Andric	    ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td
1126*986e05bcSDimitry AndricTGHDRS+=	llvm/IR/Intrinsics.gen
1127*986e05bcSDimitry Andric
1128*986e05bcSDimitry AndricAttributesCompatFunc.inc: ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td
1129*986e05bcSDimitry Andric	${LLVM_TBLGEN} -gen-attrs \
1130*986e05bcSDimitry Andric	    -I ${LLVM_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
1131*986e05bcSDimitry Andric	    ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td
1132*986e05bcSDimitry AndricTGHDRS+=	AttributesCompatFunc.inc
1133*986e05bcSDimitry Andric
1134*986e05bcSDimitry AndricOptions.inc: ${LLVM_SRCS}/lib/LibDriver/Options.td
1135*986e05bcSDimitry Andric	${LLVM_TBLGEN} -gen-opt-parser-defs \
1136*986e05bcSDimitry Andric	    -I ${LLVM_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
1137*986e05bcSDimitry Andric	    ${LLVM_SRCS}/lib/LibDriver/Options.td
1138*986e05bcSDimitry AndricTGHDRS+=	Options.inc
1139*986e05bcSDimitry Andric
1140*986e05bcSDimitry Andric# Note: some rules are superfluous, not every combination is valid.
1141*986e05bcSDimitry Andric.for arch in \
1142*986e05bcSDimitry Andric	AArch64/AArch64 ARM/ARM Mips/Mips PowerPC/PPC Sparc/Sparc X86/X86
1143*986e05bcSDimitry Andric. for hdr in \
1144*986e05bcSDimitry Andric	AsmMatcher/-gen-asm-matcher \
1145*986e05bcSDimitry Andric	AsmWriter1/-gen-asm-writer,-asmwriternum=1 \
1146*986e05bcSDimitry Andric	AsmWriter/-gen-asm-writer \
1147*986e05bcSDimitry Andric	CallingConv/-gen-callingconv \
1148*986e05bcSDimitry Andric	CodeEmitter/-gen-emitter \
1149*986e05bcSDimitry Andric	DAGISel/-gen-dag-isel \
1150*986e05bcSDimitry Andric	DisassemblerTables/-gen-disassembler \
1151*986e05bcSDimitry Andric	FastISel/-gen-fast-isel \
1152*986e05bcSDimitry Andric	InstrInfo/-gen-instr-info \
1153*986e05bcSDimitry Andric	MCCodeEmitter/-gen-emitter \
1154*986e05bcSDimitry Andric	MCPseudoLowering/-gen-pseudo-lowering \
1155*986e05bcSDimitry Andric	RegisterInfo/-gen-register-info \
1156*986e05bcSDimitry Andric	SubtargetInfo/-gen-subtarget \
1157*986e05bcSDimitry Andric	SystemOperands/-gen-searchable-tables
1158*986e05bcSDimitry Andric${arch:T}Gen${hdr:H}.inc: ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
1159*986e05bcSDimitry Andric	${LLVM_TBLGEN} ${hdr:T:C/,/ /g} \
1160*986e05bcSDimitry Andric	    -I ${LLVM_SRCS}/include -I ${LLVM_SRCS}/lib/Target/${arch:H} \
1161*986e05bcSDimitry Andric	    -d ${.TARGET:C/$/.d/} -o ${.TARGET} \
1162*986e05bcSDimitry Andric	    ${LLVM_SRCS}/lib/Target/${arch:H}/${arch:T}.td
1163*986e05bcSDimitry Andric. endfor
1164*986e05bcSDimitry Andric.endfor
1165*986e05bcSDimitry AndricTGHDRS+=	AArch64GenAsmMatcher.inc
1166*986e05bcSDimitry AndricTGHDRS+=	AArch64GenAsmWriter.inc
1167*986e05bcSDimitry AndricTGHDRS+=	AArch64GenAsmWriter1.inc
1168*986e05bcSDimitry AndricTGHDRS+=	AArch64GenCallingConv.inc
1169*986e05bcSDimitry AndricTGHDRS+=	AArch64GenDAGISel.inc
1170*986e05bcSDimitry AndricTGHDRS+=	AArch64GenDisassemblerTables.inc
1171*986e05bcSDimitry AndricTGHDRS+=	AArch64GenFastISel.inc
1172*986e05bcSDimitry AndricTGHDRS+=	AArch64GenInstrInfo.inc
1173*986e05bcSDimitry AndricTGHDRS+=	AArch64GenMCCodeEmitter.inc
1174*986e05bcSDimitry AndricTGHDRS+=	AArch64GenMCPseudoLowering.inc
1175*986e05bcSDimitry AndricTGHDRS+=	AArch64GenRegisterInfo.inc
1176*986e05bcSDimitry AndricTGHDRS+=	AArch64GenSubtargetInfo.inc
1177*986e05bcSDimitry AndricTGHDRS+=	AArch64GenSystemOperands.inc
1178*986e05bcSDimitry AndricTGHDRS+=	ARMGenAsmMatcher.inc
1179*986e05bcSDimitry AndricTGHDRS+=	ARMGenAsmWriter.inc
1180*986e05bcSDimitry AndricTGHDRS+=	ARMGenCallingConv.inc
1181*986e05bcSDimitry AndricTGHDRS+=	ARMGenDAGISel.inc
1182*986e05bcSDimitry AndricTGHDRS+=	ARMGenDisassemblerTables.inc
1183*986e05bcSDimitry AndricTGHDRS+=	ARMGenFastISel.inc
1184*986e05bcSDimitry AndricTGHDRS+=	ARMGenInstrInfo.inc
1185*986e05bcSDimitry AndricTGHDRS+=	ARMGenMCCodeEmitter.inc
1186*986e05bcSDimitry AndricTGHDRS+=	ARMGenMCPseudoLowering.inc
1187*986e05bcSDimitry AndricTGHDRS+=	ARMGenRegisterInfo.inc
1188*986e05bcSDimitry AndricTGHDRS+=	ARMGenSubtargetInfo.inc
1189*986e05bcSDimitry AndricTGHDRS+=	MipsGenAsmMatcher.inc
1190*986e05bcSDimitry AndricTGHDRS+=	MipsGenAsmWriter.inc
1191*986e05bcSDimitry AndricTGHDRS+=	MipsGenCallingConv.inc
1192*986e05bcSDimitry AndricTGHDRS+=	MipsGenDAGISel.inc
1193*986e05bcSDimitry AndricTGHDRS+=	MipsGenDisassemblerTables.inc
1194*986e05bcSDimitry AndricTGHDRS+=	MipsGenFastISel.inc
1195*986e05bcSDimitry AndricTGHDRS+=	MipsGenInstrInfo.inc
1196*986e05bcSDimitry AndricTGHDRS+=	MipsGenMCCodeEmitter.inc
1197*986e05bcSDimitry AndricTGHDRS+=	MipsGenMCPseudoLowering.inc
1198*986e05bcSDimitry AndricTGHDRS+=	MipsGenRegisterInfo.inc
1199*986e05bcSDimitry AndricTGHDRS+=	MipsGenSubtargetInfo.inc
1200*986e05bcSDimitry AndricTGHDRS+=	PPCGenAsmMatcher.inc
1201*986e05bcSDimitry AndricTGHDRS+=	PPCGenAsmWriter.inc
1202*986e05bcSDimitry AndricTGHDRS+=	PPCGenCallingConv.inc
1203*986e05bcSDimitry AndricTGHDRS+=	PPCGenDAGISel.inc
1204*986e05bcSDimitry AndricTGHDRS+=	PPCGenDisassemblerTables.inc
1205*986e05bcSDimitry AndricTGHDRS+=	PPCGenFastISel.inc
1206*986e05bcSDimitry AndricTGHDRS+=	PPCGenInstrInfo.inc
1207*986e05bcSDimitry AndricTGHDRS+=	PPCGenMCCodeEmitter.inc
1208*986e05bcSDimitry AndricTGHDRS+=	PPCGenRegisterInfo.inc
1209*986e05bcSDimitry AndricTGHDRS+=	PPCGenSubtargetInfo.inc
1210*986e05bcSDimitry AndricTGHDRS+=	SparcGenAsmMatcher.inc
1211*986e05bcSDimitry AndricTGHDRS+=	SparcGenAsmWriter.inc
1212*986e05bcSDimitry AndricTGHDRS+=	SparcGenCallingConv.inc
1213*986e05bcSDimitry AndricTGHDRS+=	SparcGenDAGISel.inc
1214*986e05bcSDimitry AndricTGHDRS+=	SparcGenDisassemblerTables.inc
1215*986e05bcSDimitry AndricTGHDRS+=	SparcGenInstrInfo.inc
1216*986e05bcSDimitry AndricTGHDRS+=	SparcGenMCCodeEmitter.inc
1217*986e05bcSDimitry AndricTGHDRS+=	SparcGenRegisterInfo.inc
1218*986e05bcSDimitry AndricTGHDRS+=	SparcGenSubtargetInfo.inc
1219*986e05bcSDimitry AndricTGHDRS+=	X86GenAsmMatcher.inc
1220*986e05bcSDimitry AndricTGHDRS+=	X86GenAsmWriter.inc
1221*986e05bcSDimitry AndricTGHDRS+=	X86GenAsmWriter1.inc
1222*986e05bcSDimitry AndricTGHDRS+=	X86GenCallingConv.inc
1223*986e05bcSDimitry AndricTGHDRS+=	X86GenDAGISel.inc
1224*986e05bcSDimitry AndricTGHDRS+=	X86GenDisassemblerTables.inc
1225*986e05bcSDimitry AndricTGHDRS+=	X86GenFastISel.inc
1226*986e05bcSDimitry AndricTGHDRS+=	X86GenInstrInfo.inc
1227*986e05bcSDimitry AndricTGHDRS+=	X86GenRegisterInfo.inc
1228*986e05bcSDimitry AndricTGHDRS+=	X86GenSubtargetInfo.inc
1229*986e05bcSDimitry Andric
1230*986e05bcSDimitry Andric.for dep in ${TGHDRS:C/$/.d/}
1231*986e05bcSDimitry Andric. if ${MAKE_VERSION} < 20160220
1232*986e05bcSDimitry Andric.  if !make(depend)
1233*986e05bcSDimitry Andric.   sinclude "${dep}"
1234*986e05bcSDimitry Andric.  endif
1235*986e05bcSDimitry Andric. else
1236*986e05bcSDimitry Andric.   dinclude "${dep}"
1237*986e05bcSDimitry Andric. endif
1238*986e05bcSDimitry Andric.endfor
1239*986e05bcSDimitry Andric
1240*986e05bcSDimitry AndricDPSRCS+=	${TGHDRS}
1241*986e05bcSDimitry AndricCLEANFILES+=	${TGHDRS} ${TGHDRS:C/$/.d/}
1242*986e05bcSDimitry Andric
1243*986e05bcSDimitry Andric.include "../llvm.build.mk"
1244*986e05bcSDimitry Andric.include <bsd.lib.mk>
1245