xref: /freebsd/contrib/processor-trace/libipt/internal/include/pt_ild.h (revision 13ea0450a9c8742119d36f3bf8f47accdce46e54)
1 /*
2  * Copyright (c) 2013-2018, Intel Corporation
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  *  * Redistributions of source code must retain the above copyright notice,
8  *    this list of conditions and the following disclaimer.
9  *  * Redistributions in binary form must reproduce the above copyright notice,
10  *    this list of conditions and the following disclaimer in the documentation
11  *    and/or other materials provided with the distribution.
12  *  * Neither the name of Intel Corporation nor the names of its contributors
13  *    may be used to endorse or promote products derived from this software
14  *    without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #if !defined(PT_ILD_H)
30 #define PT_ILD_H
31 
32 #include "pt_insn.h"
33 
34 #include "intel-pt.h"
35 
36 
37 typedef enum {
38 	PTI_MAP_0,	/* 1-byte opcodes.           may have modrm */
39 	PTI_MAP_1,	/* 2-byte opcodes (0x0f).    may have modrm */
40 	PTI_MAP_2,	/* 3-byte opcodes (0x0f38).  has modrm */
41 	PTI_MAP_3,	/* 3-byte opcodes (0x0f3a).  has modrm */
42 	PTI_MAP_AMD3DNOW,	/* 3d-now opcodes (0x0f0f).  has modrm */
43 	PTI_MAP_INVALID
44 } pti_map_enum_t;
45 
46 struct pt_ild {
47 	/* inputs */
48 	uint8_t const *itext;
49 	uint8_t max_bytes;	/*1..15 bytes  */
50 	enum pt_exec_mode mode;
51 
52 	union {
53 		struct {
54 			uint32_t osz:1;
55 			uint32_t asz:1;
56 			uint32_t lock:1;
57 			uint32_t f3:1;
58 			uint32_t f2:1;
59 			uint32_t last_f2f3:2;	/* 2 or 3 */
60 			/* The vex bit is set for c4/c5 VEX and EVEX. */
61 			uint32_t vex:1;
62 			/* The REX.R and REX.W bits in REX, VEX, or EVEX. */
63 			uint32_t rex_r:1;
64 			uint32_t rex_w:1;
65 		} s;
66 		uint32_t i;
67 	} u;
68 	uint8_t imm1_bytes;	/* # of bytes in 1st immediate */
69 	uint8_t imm2_bytes;	/* # of bytes in 2nd immediate */
70 	uint8_t disp_bytes;	/* # of displacement bytes */
71 	uint8_t modrm_byte;
72 	/* 5b but valid values=  0,1,2,3 could be in bit union */
73 	uint8_t map;
74 	uint8_t rex;	/* 0b0100wrxb */
75 	uint8_t nominal_opcode;
76 	uint8_t disp_pos;
77 	/* imm_pos can be derived from disp_pos + disp_bytes. */
78 };
79 
80 static inline pti_map_enum_t pti_get_map(const struct pt_ild *ild)
81 {
82 	return (pti_map_enum_t) ild->map;
83 }
84 
85 static inline uint8_t pti_get_modrm_mod(const struct pt_ild *ild)
86 {
87 	return ild->modrm_byte >> 6;
88 }
89 
90 static inline uint8_t pti_get_modrm_reg(const struct pt_ild *ild)
91 {
92 	return (ild->modrm_byte >> 3) & 7;
93 }
94 
95 static inline uint8_t pti_get_modrm_rm(const struct pt_ild *ild)
96 {
97 	return ild->modrm_byte & 7;
98 }
99 
100 /* MAIN ENTRANCE POINTS */
101 
102 /* one time call. not thread safe init. call when single threaded. */
103 extern void pt_ild_init(void);
104 
105 /* all decoding is multithread safe. */
106 
107 /* Decode one instruction.
108  *
109  * Input:
110  *
111  *   @insn->ip:      the virtual address of the instruction
112  *   @insn->raw:     the memory at that virtual address
113  *   @insn->size:    the maximal size of the instruction
114  *   @insn->mode:    the execution mode
115  *
116  * Output:
117  *
118  *   @insn->size:    the actual size of the instruction
119  *   @insn->iclass:  a coarse classification
120  *
121  *   @iext->iclass:  a finer grain classification
122  *   @iext->variant: instruction class dependent information
123  *
124  * Returns zero on success, a negative error code otherwise.
125  */
126 extern int pt_ild_decode(struct pt_insn *insn, struct pt_insn_ext *iext);
127 
128 #endif /* PT_ILD_H */
129