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10<h3>Clock State Machine</h3>
11<p>Last update:
12  <!-- #BeginDate format:En2m -->4-Aug-2011  23:40<!-- #EndDate -->
13  UTC</p>
14<h4>Table of Contents</h4>
15<ul>
16  <li class="inline"><a href="#intro">General Overview</a></li>
17  <li class="inline"><a href="#panic">Panic Threshold</a></li>
18  <li class="inline"><a href="#step">Step and Stepout Thresholds</a></li>
19  <li class="inline"><a href="#hold">Hold Timer</a></li>
20  <li class="inline"><a href="#inter">Operating Intervals</a></li>
21  <li class="inline"><a href="#state">State Transition Function</a></li>
22</ul>
23<hr>
24<h4 id="intro">General Overview</h4>
25<p>In the NTPv4 specification and reference implementation a state machine is used to manage the system clock under exceptional conditions, as when the daemon is first started or when encountering  severe network congestion. This page describes the design and operation of the state machine in detail.</p>
26<p> The state machine is activated upon receipt of an update by the clock discipline algorithm. its primary purpose is to determines whether the clock is slewed or stepped and how the initial time and frequency are determined using three  thresholds: <em>panic</em>, <em>step</em> and <em>stepout</em>, and one timer: <em>hold</em>.</p>
27<h4 id="panic">Panic Threshold</h4>
28<p>Most computers today incorporate a time-of-year (TOY) chip to maintain the time  when the power is off. When the computer is restarted, the chip is used to initialize the operating system time. In case there is no TOY chip or the TOY&nbsp;time is  different from  NTP  time by more than the  panic threshold, the daemon <tt></tt> assumes something must be terribly wrong, so exits with a message to the system operator to set the time  manually. With the <tt>-g</tt> option on the command line, the daemon  sets the clock  to NTP time at the first update, but exits if the offset exceeds the panic threshold at subsequent updates. The panic threshold default is 1000 s, but it can be changed with the <tt>panic</tt> option of the <a href="miscopt.html#tinker"><tt>tinker</tt></a> command.</p>
29<h4 id="step"> Step and Stepout Thresholds</h4>
30<p>Under ordinary conditions, the clock discipline gradually slews the clock to the correct time, so that the time is effectively continuous and never stepped forward or backward. If, due to extreme network congestion,  an offset spike exceeds the  step threshold, by default 128 ms, the spike is discarded. However, if   offset spikes greater than the step threshold persist for an interval more than the stepout threshold,  by default 300 s, the system clock is stepped to the correct time.</p>
31<p> In practice, the need for a step has been extremely rare and almost always the result of a hardware failure or operator error.  The step threshold and stepout threshold  can be changed using the <tt>step</tt> and <tt>stepout</tt> options of the <a href="miscopt.html#tinker"><tt>tinker</tt></a> command, respectively. If the step threshold is set to zero, the step function is entirely disabled and the clock is always slewed. The daemon sets the step threshold to 600 s using the <tt>-x</tt> option on the command line. If the <tt>-g</tt> option is used or the step threshold is set greater than 0.5 s, the  precision time kernel support is disabled.</p>
32<p>Historically, the most important application of the step function was when a leap second was inserted in the Coordinated Universal Time (UTC) timescale and the kernel precision time support was not available. This also happened with older reference clocks that indicated an impending leap second, but the radio itself did not respond until it resynchronized some minutes later. Further details are on the <a href="leap.html">Leap Second Processing</a> page.</p>
33<p>In some applications the clock can never be set backward, even  it  accidentally set forward  a week by some evil means. The issues should be carefully considered before using these options. The  slew rate   is fixed at  500 parts-per-million (PPM) by the Unix kernel. As a result, the clock can take 33 minutes to amortize  each second the clock is outside the acceptable range. During this interval the clock will not be consistent with any other network clock and the system cannot be used for distributed applications that require correctly synchronized network time.</p>
34<h4 id="hold">Hold Timer</h4>
35<p>When the daemon is started after a considerable downtime, it could be the TOY chip clock has drifted significantly from NTP time. This can cause a transient at system startup. In the past, this has produced a phase transient and resulted in a  frequency surge that could take some time, even hours, to subside. When the highest accuracy is required, some means is necessary to manage the startup process so that the the clock is quickly set correctly and the frequency is undisturbed. The hold timer is used to suppress frequency adjustments during the training and startup intervals described below. At the beginning of the interval the hold timer is set to the stepout threshold and decrements at one  second intervals until reaching zero. However, the hold timer is forced to zero if the residual clock offset is less than 0.5 ms. When nonzero, the discipline algorithm uses a small time constant (equivalent to a poll exponent of 2), but does not adjust the frequency. Assuming that the frequency has been set to within 1 PPM, either from the frequency file or by the training interval described later, the clock is set to within 0.5 ms in less than 300 s.</p>
36<h4 id="inter">Operating Intervals</h4>
37<p>The state machine operates in one of four nonoverlapping intervals.</p>
38<dl>
39  <dt>Training interval</dt>
40  <dd>This interval is used at startup when the frequency file is nor present at startup. It begins when the first update is received by the discipline algorithm  and ends when an update is received following the  stepout threshold. The clock phase is steered to the offset presented at the  beginning of the interval, but without affecting the frequency. During the interval further updates are ignored. At the end of the interval the frequency is calculated as the phase change during the interval divided by the length of the interval. This generally results in a frequency error less than 0.5 PPM. Note that, if the intrinsic oscillator frequency error is large, the offset will in general have significant error. This is corrected during the subsequent startup interval.</dd>
41  <dt>Startup interval</dt>
42  <dd> This interval is used at startup to amortize the residual offset while not affecting the frequency. If the frequency file is present, it begins when the first update is received by the discipline. If not, it begins after the training interval. It ends when the hold timer decrements to zero or when the residual offset falls below 0.5 ms.</dd>
43  <dt>Step interval</dt>
44  <dd>This interval is used as a spike blanker during periods when the offsets exceed the step threshold. The interval continues as long as offsets are received that are greater than the step threshold, but ends when either an offset is received less than the step threshold or until the time since the last valid update exceeds the stepout threshold.</dd>
45  <dt>Sync Interval</dt>
46  <dd> This interval is implicit; that is, it is used when none of the above intervals are used.</dd>
47</dl>
48<h4 id="state">State Transition Function</h4>
49<p>The state machine consists of five states. An event is created when an update is received by the discipline algorithm. Depending on the state and the the offset magnitude, the machine performs some actions and transitions to the same or another state. Following is a short description of the states.</p>
50<dl>
51  <dt>FSET - The frequency file is present</dt>
52  <dd> Load the frequency file, initialize the hold timer and continue in  SYNC state.</dd>
53  <dt>NSET - The frequency file is not present</dt>
54  <dd>Initialize the hold timer and continue in FREQ state.</dd>
55  <dt>FREQ - Frequency training state</dt>
56  <dd>Disable the clock discipline until the time since the last update exceeds the stepout threshold. When this happens, calculate the frequency, initialize the hold counter and transition to SYNC state.</dd>
57  <dt>SPIK - Spike state</dt>
58  <dd>A update greater than the step threshold has occurred. Ignore the update and continue in this state as long as updates greater than the step threshold occur. If a valid update is received, continue in SYNC state. When the time since the last valid update was received exceeds the stepout threshold, step the system clock and continue in SYNC state. </dd>
59  <dt>SYNC - Ordinary clock discipline state</dt>
60  <dd>Discipline the  system clock time and frequency using the hybrid phase/frequency feedback loop. However, do not discipline the frequency if the hold timer is nonzero.</dd>
61</dl>
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