xref: /freebsd/contrib/llvm-project/llvm/utils/TableGen/X86DisassemblerTables.cpp (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41)
1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file is part of the X86 Disassembler Emitter.
10 // It contains the implementation of the disassembler tables.
11 // Documentation for the disassembler emitter in general can be found in
12 //  X86DisassemblerEmitter.h.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "X86DisassemblerTables.h"
17 #include "X86DisassemblerShared.h"
18 #include "X86ModRMFilters.h"
19 #include "llvm/ADT/STLArrayExtras.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/Format.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include <map>
25 
26 using namespace llvm;
27 using namespace X86Disassembler;
28 
29 /// stringForContext - Returns a string containing the name of a particular
30 ///   InstructionContext, usually for diagnostic purposes.
31 ///
32 /// @param insnContext  - The instruction class to transform to a string.
33 /// @return           - A statically-allocated string constant that contains the
34 ///                     name of the instruction class.
35 static inline const char* stringForContext(InstructionContext insnContext) {
36   switch (insnContext) {
37   default:
38     llvm_unreachable("Unhandled instruction class");
39 #define ENUM_ENTRY(n, r, d)   case n: return #n; break;
40 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\
41         ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\
42         ENUM_ENTRY(n##_KZ_B, r, d)
43   INSTRUCTION_CONTEXTS
44 #undef ENUM_ENTRY
45 #undef ENUM_ENTRY_K_B
46   }
47 }
48 
49 /// stringForOperandType - Like stringForContext, but for OperandTypes.
50 static inline const char* stringForOperandType(OperandType type) {
51   switch (type) {
52   default:
53     llvm_unreachable("Unhandled type");
54 #define ENUM_ENTRY(i, d) case i: return #i;
55   TYPES
56 #undef ENUM_ENTRY
57   }
58 }
59 
60 /// stringForOperandEncoding - like stringForContext, but for
61 ///   OperandEncodings.
62 static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
63   switch (encoding) {
64   default:
65     llvm_unreachable("Unhandled encoding");
66 #define ENUM_ENTRY(i, d) case i: return #i;
67   ENCODINGS
68 #undef ENUM_ENTRY
69   }
70 }
71 
72 /// inheritsFrom - Indicates whether all instructions in one class also belong
73 ///   to another class.
74 ///
75 /// @param child  - The class that may be the subset
76 /// @param parent - The class that may be the superset
77 /// @return       - True if child is a subset of parent, false otherwise.
78 static inline bool inheritsFrom(InstructionContext child,
79                                 InstructionContext parent, bool noPrefix = true,
80                                 bool VEX_LIG = false, bool VEX_WIG = false,
81                                 bool AdSize64 = false) {
82   if (child == parent)
83     return true;
84 
85   switch (parent) {
86   case IC:
87     return(inheritsFrom(child, IC_64BIT, AdSize64) ||
88            (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
89            inheritsFrom(child, IC_ADSIZE) ||
90            (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
91            (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
92   case IC_64BIT:
93     return(inheritsFrom(child, IC_64BIT_REXW)   ||
94            (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
95            (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
96            (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix))     ||
97            (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
98   case IC_OPSIZE:
99     return inheritsFrom(child, IC_64BIT_OPSIZE) ||
100            inheritsFrom(child, IC_OPSIZE_ADSIZE);
101   case IC_ADSIZE:
102     return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix));
103   case IC_OPSIZE_ADSIZE:
104     return false;
105   case IC_64BIT_ADSIZE:
106     return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix));
107   case IC_64BIT_OPSIZE_ADSIZE:
108     return (noPrefix &&
109             inheritsFrom(child, IC_64BIT_VEX_OPSIZE_ADSIZE, noPrefix));
110   case IC_XD:
111     return inheritsFrom(child, IC_64BIT_XD);
112   case IC_XS:
113     return inheritsFrom(child, IC_64BIT_XS);
114   case IC_XD_OPSIZE:
115     return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
116   case IC_XS_OPSIZE:
117     return inheritsFrom(child, IC_64BIT_XS_OPSIZE);
118   case IC_XD_ADSIZE:
119     return inheritsFrom(child, IC_64BIT_XD_ADSIZE);
120   case IC_XS_ADSIZE:
121     return inheritsFrom(child, IC_64BIT_XS_ADSIZE);
122   case IC_64BIT_REXW:
123     return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
124            (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
125            (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
126            (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
127   case IC_64BIT_OPSIZE:
128     return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
129            (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
130            (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)) ||
131            (!AdSize64 && inheritsFrom(child, IC_64BIT_VEX_OPSIZE_ADSIZE));
132   case IC_64BIT_XD:
133     return (inheritsFrom(child, IC_64BIT_REXW_XD) ||
134             (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE)));
135   case IC_64BIT_XS:
136     return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
137            (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE)));
138   case IC_64BIT_XD_OPSIZE:
139   case IC_64BIT_XS_OPSIZE:
140     return false;
141   case IC_64BIT_XD_ADSIZE:
142   case IC_64BIT_XS_ADSIZE:
143     return false;
144   case IC_64BIT_REXW_XD:
145   case IC_64BIT_REXW_XS:
146   case IC_64BIT_REXW_OPSIZE:
147   case IC_64BIT_REXW_ADSIZE:
148     return false;
149   case IC_VEX:
150     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) ||
151            (VEX_WIG && inheritsFrom(child, IC_VEX_W)) ||
152            (VEX_LIG && inheritsFrom(child, IC_VEX_L));
153   case IC_VEX_XS:
154     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) ||
155            (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) ||
156            (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS));
157   case IC_VEX_XD:
158     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) ||
159            (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) ||
160            (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD));
161   case IC_VEX_OPSIZE:
162     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) ||
163            (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) ||
164            (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE)) ||
165            inheritsFrom(child, IC_64BIT_VEX_OPSIZE);
166   case IC_64BIT_VEX_OPSIZE:
167     return inheritsFrom(child, IC_64BIT_VEX_OPSIZE_ADSIZE);
168   case IC_64BIT_VEX_OPSIZE_ADSIZE:
169     return false;
170   case IC_VEX_W:
171     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W);
172   case IC_VEX_W_XS:
173     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS);
174   case IC_VEX_W_XD:
175     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD);
176   case IC_VEX_W_OPSIZE:
177     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
178   case IC_VEX_L:
179     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W);
180   case IC_VEX_L_XS:
181     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS);
182   case IC_VEX_L_XD:
183     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD);
184   case IC_VEX_L_OPSIZE:
185     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
186   case IC_VEX_L_W:
187   case IC_VEX_L_W_XS:
188   case IC_VEX_L_W_XD:
189   case IC_VEX_L_W_OPSIZE:
190     return false;
191   case IC_EVEX:
192     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) ||
193            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) ||
194            (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) ||
195            (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) ||
196            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2));
197   case IC_EVEX_XS:
198     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
199            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) ||
200            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) ||
201            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) ||
202            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS));
203   case IC_EVEX_XD:
204     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
205            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) ||
206            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) ||
207            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) ||
208            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD));
209   case IC_EVEX_OPSIZE:
210     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
211            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) ||
212            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) ||
213            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) ||
214            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE));
215   case IC_EVEX_K:
216     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
217            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) ||
218            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) ||
219            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) ||
220            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K));
221   case IC_EVEX_XS_K:
222     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
223            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) ||
224            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) ||
225            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) ||
226            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K));
227   case IC_EVEX_XD_K:
228     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
229            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) ||
230            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) ||
231            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) ||
232            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K));
233   case IC_EVEX_OPSIZE_K:
234     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
235            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) ||
236            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) ||
237            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) ||
238            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K));
239   case IC_EVEX_KZ:
240     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
241            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) ||
242            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) ||
243            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) ||
244            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ));
245   case IC_EVEX_XS_KZ:
246     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
247            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) ||
248            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) ||
249            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) ||
250            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ));
251   case IC_EVEX_XD_KZ:
252     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
253            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) ||
254            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) ||
255            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) ||
256            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ));
257   case IC_EVEX_OPSIZE_KZ:
258     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
259            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) ||
260            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) ||
261            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) ||
262            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ));
263   case IC_EVEX_W:
264     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) ||
265            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W));
266   case IC_EVEX_W_XS:
267     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
268            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS));
269   case IC_EVEX_W_XD:
270     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
271            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD));
272   case IC_EVEX_W_OPSIZE:
273     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
274            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE));
275   case IC_EVEX_W_K:
276     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
277            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K));
278   case IC_EVEX_W_XS_K:
279     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
280            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K));
281   case IC_EVEX_W_XD_K:
282     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
283            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K));
284   case IC_EVEX_W_OPSIZE_K:
285     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
286            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K));
287   case IC_EVEX_W_KZ:
288     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
289            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ));
290   case IC_EVEX_W_XS_KZ:
291     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
292            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ));
293   case IC_EVEX_W_XD_KZ:
294     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
295            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ));
296   case IC_EVEX_W_OPSIZE_KZ:
297     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
298            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ));
299   case IC_EVEX_L:
300     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W);
301   case IC_EVEX_L_XS:
302     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS);
303   case IC_EVEX_L_XD:
304     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD);
305   case IC_EVEX_L_OPSIZE:
306     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE);
307   case IC_EVEX_L_K:
308     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K);
309   case IC_EVEX_L_XS_K:
310     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K);
311   case IC_EVEX_L_XD_K:
312     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K);
313   case IC_EVEX_L_OPSIZE_K:
314     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K);
315   case IC_EVEX_L_KZ:
316     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ);
317   case IC_EVEX_L_XS_KZ:
318     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ);
319   case IC_EVEX_L_XD_KZ:
320     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ);
321   case IC_EVEX_L_OPSIZE_KZ:
322     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ);
323   case IC_EVEX_L_W:
324   case IC_EVEX_L_W_XS:
325   case IC_EVEX_L_W_XD:
326   case IC_EVEX_L_W_OPSIZE:
327     return false;
328   case IC_EVEX_L_W_K:
329   case IC_EVEX_L_W_XS_K:
330   case IC_EVEX_L_W_XD_K:
331   case IC_EVEX_L_W_OPSIZE_K:
332     return false;
333   case IC_EVEX_L_W_KZ:
334   case IC_EVEX_L_W_XS_KZ:
335   case IC_EVEX_L_W_XD_KZ:
336   case IC_EVEX_L_W_OPSIZE_KZ:
337     return false;
338   case IC_EVEX_L2:
339     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W);
340   case IC_EVEX_L2_XS:
341     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS);
342   case IC_EVEX_L2_XD:
343     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD);
344   case IC_EVEX_L2_OPSIZE:
345     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE);
346   case IC_EVEX_L2_K:
347     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K);
348   case IC_EVEX_L2_XS_K:
349     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K);
350   case IC_EVEX_L2_XD_K:
351     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K);
352   case IC_EVEX_L2_OPSIZE_K:
353     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K);
354   case IC_EVEX_L2_KZ:
355     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ);
356   case IC_EVEX_L2_XS_KZ:
357     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ);
358   case IC_EVEX_L2_XD_KZ:
359     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ);
360   case IC_EVEX_L2_OPSIZE_KZ:
361     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ);
362   case IC_EVEX_L2_W:
363   case IC_EVEX_L2_W_XS:
364   case IC_EVEX_L2_W_XD:
365   case IC_EVEX_L2_W_OPSIZE:
366     return false;
367   case IC_EVEX_L2_W_K:
368   case IC_EVEX_L2_W_XS_K:
369   case IC_EVEX_L2_W_XD_K:
370   case IC_EVEX_L2_W_OPSIZE_K:
371     return false;
372   case IC_EVEX_L2_W_KZ:
373   case IC_EVEX_L2_W_XS_KZ:
374   case IC_EVEX_L2_W_XD_KZ:
375   case IC_EVEX_L2_W_OPSIZE_KZ:
376     return false;
377   case IC_EVEX_B:
378     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
379            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) ||
380            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) ||
381            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) ||
382            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B));
383   case IC_EVEX_XS_B:
384     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
385            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) ||
386            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) ||
387            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) ||
388            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B));
389   case IC_EVEX_XD_B:
390     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
391            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) ||
392            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) ||
393            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) ||
394            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B));
395   case IC_EVEX_OPSIZE_B:
396     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
397            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) ||
398            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) ||
399            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) ||
400            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B));
401   case IC_EVEX_K_B:
402     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
403            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) ||
404            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) ||
405            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) ||
406            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B));
407   case IC_EVEX_XS_K_B:
408     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
409            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) ||
410            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) ||
411            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) ||
412            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B));
413   case IC_EVEX_XD_K_B:
414     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
415            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) ||
416            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) ||
417            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) ||
418            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B));
419   case IC_EVEX_OPSIZE_K_B:
420     return (VEX_LIG && VEX_WIG &&
421             inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
422            (VEX_LIG && VEX_WIG &&
423             inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
424            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) ||
425            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) ||
426            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B));
427   case IC_EVEX_KZ_B:
428     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
429            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) ||
430            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) ||
431            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) ||
432            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B));
433   case IC_EVEX_XS_KZ_B:
434     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
435            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) ||
436            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) ||
437            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) ||
438            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B));
439   case IC_EVEX_XD_KZ_B:
440     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
441            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) ||
442            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) ||
443            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) ||
444            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B));
445   case IC_EVEX_OPSIZE_KZ_B:
446     return (VEX_LIG && VEX_WIG &&
447             inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
448            (VEX_LIG && VEX_WIG &&
449             inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
450            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) ||
451            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) ||
452            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B));
453   case IC_EVEX_W_B:
454     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
455            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B));
456   case IC_EVEX_W_XS_B:
457     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
458            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B));
459   case IC_EVEX_W_XD_B:
460     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
461            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B));
462   case IC_EVEX_W_OPSIZE_B:
463     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
464            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B));
465   case IC_EVEX_W_K_B:
466     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
467            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B));
468   case IC_EVEX_W_XS_K_B:
469     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
470            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B));
471   case IC_EVEX_W_XD_K_B:
472     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
473            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B));
474   case IC_EVEX_W_OPSIZE_K_B:
475     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
476            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B));
477   case IC_EVEX_W_KZ_B:
478     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
479            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B));
480   case IC_EVEX_W_XS_KZ_B:
481     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
482            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B));
483   case IC_EVEX_W_XD_KZ_B:
484     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
485            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B));
486   case IC_EVEX_W_OPSIZE_KZ_B:
487     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
488            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B));
489   case IC_EVEX_L_B:
490     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B);
491   case IC_EVEX_L_XS_B:
492     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B);
493   case IC_EVEX_L_XD_B:
494     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B);
495   case IC_EVEX_L_OPSIZE_B:
496     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B);
497   case IC_EVEX_L_K_B:
498     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B);
499   case IC_EVEX_L_XS_K_B:
500     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B);
501   case IC_EVEX_L_XD_K_B:
502     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B);
503   case IC_EVEX_L_OPSIZE_K_B:
504     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B);
505   case IC_EVEX_L_KZ_B:
506     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B);
507   case IC_EVEX_L_XS_KZ_B:
508     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B);
509   case IC_EVEX_L_XD_KZ_B:
510     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B);
511   case IC_EVEX_L_OPSIZE_KZ_B:
512     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B);
513   case IC_EVEX_L_W_B:
514   case IC_EVEX_L_W_XS_B:
515   case IC_EVEX_L_W_XD_B:
516   case IC_EVEX_L_W_OPSIZE_B:
517     return false;
518   case IC_EVEX_L_W_K_B:
519   case IC_EVEX_L_W_XS_K_B:
520   case IC_EVEX_L_W_XD_K_B:
521   case IC_EVEX_L_W_OPSIZE_K_B:
522     return false;
523   case IC_EVEX_L_W_KZ_B:
524   case IC_EVEX_L_W_XS_KZ_B:
525   case IC_EVEX_L_W_XD_KZ_B:
526   case IC_EVEX_L_W_OPSIZE_KZ_B:
527     return false;
528   case IC_EVEX_L2_B:
529     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B);
530   case IC_EVEX_L2_XS_B:
531     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B);
532   case IC_EVEX_L2_XD_B:
533     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B);
534   case IC_EVEX_L2_OPSIZE_B:
535     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B);
536   case IC_EVEX_L2_K_B:
537     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B);
538   case IC_EVEX_L2_XS_K_B:
539     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B);
540   case IC_EVEX_L2_XD_K_B:
541     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B);
542   case IC_EVEX_L2_OPSIZE_K_B:
543     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B);
544   case IC_EVEX_L2_KZ_B:
545     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B);
546   case IC_EVEX_L2_XS_KZ_B:
547     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B);
548   case IC_EVEX_L2_XD_KZ_B:
549     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B);
550   case IC_EVEX_L2_OPSIZE_KZ_B:
551     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B);
552   case IC_EVEX_L2_W_B:
553   case IC_EVEX_L2_W_XS_B:
554   case IC_EVEX_L2_W_XD_B:
555   case IC_EVEX_L2_W_OPSIZE_B:
556     return false;
557   case IC_EVEX_L2_W_K_B:
558   case IC_EVEX_L2_W_XS_K_B:
559   case IC_EVEX_L2_W_XD_K_B:
560   case IC_EVEX_L2_W_OPSIZE_K_B:
561     return false;
562   case IC_EVEX_L2_W_KZ_B:
563   case IC_EVEX_L2_W_XS_KZ_B:
564   case IC_EVEX_L2_W_XD_KZ_B:
565   case IC_EVEX_L2_W_OPSIZE_KZ_B:
566     return false;
567   default:
568     errs() << "Unknown instruction class: " <<
569       stringForContext((InstructionContext)parent) << "\n";
570     llvm_unreachable("Unknown instruction class");
571   }
572 }
573 
574 /// outranks - Indicates whether, if an instruction has two different applicable
575 ///   classes, which class should be preferred when performing decode.  This
576 ///   imposes a total ordering (ties are resolved toward "lower")
577 ///
578 /// @param upper  - The class that may be preferable
579 /// @param lower  - The class that may be less preferable
580 /// @return       - True if upper is to be preferred, false otherwise.
581 static inline bool outranks(InstructionContext upper,
582                             InstructionContext lower) {
583   assert(upper < IC_max);
584   assert(lower < IC_max);
585 
586 #define ENUM_ENTRY(n, r, d) r,
587 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \
588   ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \
589   ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)
590   static int ranks[IC_max] = {
591     INSTRUCTION_CONTEXTS
592   };
593 #undef ENUM_ENTRY
594 #undef ENUM_ENTRY_K_B
595 
596   return (ranks[upper] > ranks[lower]);
597 }
598 
599 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
600 ///   be compacted by eliminating redundant information.
601 ///
602 /// @param decision - The decision to be compacted.
603 /// @return         - The compactest available representation for the decision.
604 static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
605   bool satisfiesOneEntry = true;
606   bool satisfiesSplitRM = true;
607   bool satisfiesSplitReg = true;
608   bool satisfiesSplitMisc = true;
609 
610   for (unsigned index = 0; index < 256; ++index) {
611     if (decision.instructionIDs[index] != decision.instructionIDs[0])
612       satisfiesOneEntry = false;
613 
614     if (((index & 0xc0) == 0xc0) &&
615        (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
616       satisfiesSplitRM = false;
617 
618     if (((index & 0xc0) != 0xc0) &&
619        (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
620       satisfiesSplitRM = false;
621 
622     if (((index & 0xc0) == 0xc0) &&
623        (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8]))
624       satisfiesSplitReg = false;
625 
626     if (((index & 0xc0) != 0xc0) &&
627        (decision.instructionIDs[index] != decision.instructionIDs[index&0x38]))
628       satisfiesSplitMisc = false;
629   }
630 
631   if (satisfiesOneEntry)
632     return MODRM_ONEENTRY;
633 
634   if (satisfiesSplitRM)
635     return MODRM_SPLITRM;
636 
637   if (satisfiesSplitReg && satisfiesSplitMisc)
638     return MODRM_SPLITREG;
639 
640   if (satisfiesSplitMisc)
641     return MODRM_SPLITMISC;
642 
643   return MODRM_FULL;
644 }
645 
646 /// stringForDecisionType - Returns a statically-allocated string corresponding
647 ///   to a particular decision type.
648 ///
649 /// @param dt - The decision type.
650 /// @return   - A pointer to the statically-allocated string (e.g.,
651 ///             "MODRM_ONEENTRY" for MODRM_ONEENTRY).
652 static const char* stringForDecisionType(ModRMDecisionType dt) {
653 #define ENUM_ENTRY(n) case n: return #n;
654   switch (dt) {
655     default:
656       llvm_unreachable("Unknown decision type");
657     MODRMTYPES
658   };
659 #undef ENUM_ENTRY
660 }
661 
662 DisassemblerTables::DisassemblerTables() {
663   for (unsigned i = 0; i < llvm::array_lengthof(Tables); i++)
664     Tables[i] = std::make_unique<ContextDecision>();
665 
666   HasConflicts = false;
667 }
668 
669 DisassemblerTables::~DisassemblerTables() {
670 }
671 
672 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
673                                            unsigned &i1, unsigned &i2,
674                                            unsigned &ModRMTableNum,
675                                            ModRMDecision &decision) const {
676   static uint32_t sTableNumber = 0;
677   static uint32_t sEntryNumber = 1;
678   ModRMDecisionType dt = getDecisionType(decision);
679 
680   if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) {
681     // Empty table.
682     o2 << "{" << stringForDecisionType(dt) << ", 0}";
683     return;
684   }
685 
686   std::vector<unsigned> ModRMDecision;
687 
688   switch (dt) {
689     default:
690       llvm_unreachable("Unknown decision type");
691     case MODRM_ONEENTRY:
692       ModRMDecision.push_back(decision.instructionIDs[0]);
693       break;
694     case MODRM_SPLITRM:
695       ModRMDecision.push_back(decision.instructionIDs[0x00]);
696       ModRMDecision.push_back(decision.instructionIDs[0xc0]);
697       break;
698     case MODRM_SPLITREG:
699       for (unsigned index = 0; index < 64; index += 8)
700         ModRMDecision.push_back(decision.instructionIDs[index]);
701       for (unsigned index = 0xc0; index < 256; index += 8)
702         ModRMDecision.push_back(decision.instructionIDs[index]);
703       break;
704     case MODRM_SPLITMISC:
705       for (unsigned index = 0; index < 64; index += 8)
706         ModRMDecision.push_back(decision.instructionIDs[index]);
707       for (unsigned index = 0xc0; index < 256; ++index)
708         ModRMDecision.push_back(decision.instructionIDs[index]);
709       break;
710     case MODRM_FULL:
711       for (unsigned short InstructionID : decision.instructionIDs)
712         ModRMDecision.push_back(InstructionID);
713       break;
714   }
715 
716   unsigned &EntryNumber = ModRMTable[ModRMDecision];
717   if (EntryNumber == 0) {
718     EntryNumber = ModRMTableNum;
719 
720     ModRMTableNum += ModRMDecision.size();
721     o1 << "/*Table" << EntryNumber << "*/\n";
722     i1++;
723     for (unsigned I : ModRMDecision) {
724       o1.indent(i1 * 2) << format("0x%hx", I) << ", /*"
725                         << InstructionSpecifiers[I].name << "*/\n";
726     }
727     i1--;
728   }
729 
730   o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}";
731 
732   switch (dt) {
733     default:
734       llvm_unreachable("Unknown decision type");
735     case MODRM_ONEENTRY:
736       sEntryNumber += 1;
737       break;
738     case MODRM_SPLITRM:
739       sEntryNumber += 2;
740       break;
741     case MODRM_SPLITREG:
742       sEntryNumber += 16;
743       break;
744     case MODRM_SPLITMISC:
745       sEntryNumber += 8 + 64;
746       break;
747     case MODRM_FULL:
748       sEntryNumber += 256;
749       break;
750   }
751 
752   // We assume that the index can fit into uint16_t.
753   assert(sEntryNumber < 65536U &&
754          "Index into ModRMDecision is too large for uint16_t!");
755   (void)sEntryNumber;
756 
757   ++sTableNumber;
758 }
759 
760 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
761                                             unsigned &i1, unsigned &i2,
762                                             unsigned &ModRMTableNum,
763                                             OpcodeDecision &opDecision) const {
764   o2 << "{";
765   ++i2;
766 
767   unsigned index;
768   for (index = 0; index < 256; ++index) {
769     auto &decision = opDecision.modRMDecisions[index];
770     ModRMDecisionType dt = getDecisionType(decision);
771     if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0))
772       break;
773   }
774   if (index == 256) {
775     // If all 256 entries are MODRM_ONEENTRY, omit output.
776     static_assert(MODRM_ONEENTRY == 0, "");
777     --i2;
778     o2 << "},\n";
779   } else {
780     o2 << " /* struct OpcodeDecision */ {\n";
781     for (index = 0; index < 256; ++index) {
782       o2.indent(i2);
783 
784       o2 << "/*0x" << format("%02hhx", index) << "*/";
785 
786       emitModRMDecision(o1, o2, i1, i2, ModRMTableNum,
787                         opDecision.modRMDecisions[index]);
788 
789       if (index < 255)
790         o2 << ",";
791 
792       o2 << "\n";
793     }
794     o2.indent(i2) << "}\n";
795     --i2;
796     o2.indent(i2) << "},\n";
797   }
798 }
799 
800 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
801                                              unsigned &i1, unsigned &i2,
802                                              unsigned &ModRMTableNum,
803                                              ContextDecision &decision,
804                                              const char* name) const {
805   o2.indent(i2) << "static const struct ContextDecision " << name << " = {{/* opcodeDecisions */\n";
806   i2++;
807 
808   for (unsigned index = 0; index < IC_max; ++index) {
809     o2.indent(i2) << "/*";
810     o2 << stringForContext((InstructionContext)index);
811     o2 << "*/ ";
812 
813     emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum,
814                        decision.opcodeDecisions[index]);
815   }
816 
817   i2--;
818   o2.indent(i2) << "}};" << "\n";
819 }
820 
821 void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
822                                              unsigned &i) const {
823   unsigned NumInstructions = InstructionSpecifiers.size();
824 
825   o << "static const struct OperandSpecifier x86OperandSets[]["
826     << X86_MAX_OPERANDS << "] = {\n";
827 
828   typedef SmallVector<std::pair<OperandEncoding, OperandType>,
829                       X86_MAX_OPERANDS> OperandListTy;
830   std::map<OperandListTy, unsigned> OperandSets;
831 
832   unsigned OperandSetNum = 0;
833   for (unsigned Index = 0; Index < NumInstructions; ++Index) {
834     OperandListTy OperandList;
835 
836     for (auto Operand : InstructionSpecifiers[Index].operands) {
837       OperandEncoding Encoding = (OperandEncoding)Operand.encoding;
838       OperandType Type = (OperandType)Operand.type;
839       OperandList.push_back(std::make_pair(Encoding, Type));
840     }
841     unsigned &N = OperandSets[OperandList];
842     if (N != 0) continue;
843 
844     N = ++OperandSetNum;
845 
846     o << "  { /* " << (OperandSetNum - 1) << " */\n";
847     for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
848       const char *Encoding = stringForOperandEncoding(OperandList[i].first);
849       const char *Type     = stringForOperandType(OperandList[i].second);
850       o << "    { " << Encoding << ", " << Type << " },\n";
851     }
852     o << "  },\n";
853   }
854   o << "};" << "\n\n";
855 
856   o.indent(i * 2) << "static const struct InstructionSpecifier ";
857   o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
858 
859   i++;
860 
861   for (unsigned index = 0; index < NumInstructions; ++index) {
862     o.indent(i * 2) << "{ /* " << index << " */\n";
863     i++;
864 
865     OperandListTy OperandList;
866     for (auto Operand : InstructionSpecifiers[index].operands) {
867       OperandEncoding Encoding = (OperandEncoding)Operand.encoding;
868       OperandType Type = (OperandType)Operand.type;
869       OperandList.push_back(std::make_pair(Encoding, Type));
870     }
871     o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n";
872 
873     o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
874 
875     i--;
876     o.indent(i * 2) << "},\n";
877   }
878 
879   i--;
880   o.indent(i * 2) << "};" << "\n";
881 }
882 
883 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
884   o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR
885                      "[" << ATTR_max << "] = {\n";
886   i++;
887 
888   for (unsigned index = 0; index < ATTR_max; ++index) {
889     o.indent(i * 2);
890 
891     if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) {
892       if (index & ATTR_EVEX)
893         o << "IC_EVEX";
894       else if ((index & (ATTR_64BIT | ATTR_VEXL | ATTR_REXW | ATTR_OPSIZE)) ==
895                (ATTR_64BIT | ATTR_OPSIZE))
896         o << "IC_64BIT_VEX";
897       else
898         o << "IC_VEX";
899 
900       if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2))
901         o << "_L2";
902       else if (index & ATTR_VEXL)
903         o << "_L";
904 
905       if (index & ATTR_REXW)
906         o << "_W";
907 
908       if (index & ATTR_OPSIZE) {
909         o << "_OPSIZE";
910         if ((index & (ATTR_64BIT | ATTR_EVEX | ATTR_VEX | ATTR_VEXL |
911                       ATTR_REXW | ATTR_ADSIZE)) ==
912             (ATTR_64BIT | ATTR_VEX | ATTR_ADSIZE))
913           o << "_ADSIZE";
914       } else if (index & ATTR_XD)
915         o << "_XD";
916       else if (index & ATTR_XS)
917         o << "_XS";
918 
919       if ((index & ATTR_EVEX)) {
920         if (index & ATTR_EVEXKZ)
921           o << "_KZ";
922         else if (index & ATTR_EVEXK)
923           o << "_K";
924 
925         if (index & ATTR_EVEXB)
926           o << "_B";
927       }
928     } else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
929       o << "IC_64BIT_REXW_XS";
930     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
931       o << "IC_64BIT_REXW_XD";
932     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
933              (index & ATTR_OPSIZE))
934       o << "IC_64BIT_REXW_OPSIZE";
935     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
936              (index & ATTR_ADSIZE))
937       o << "IC_64BIT_REXW_ADSIZE";
938     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
939       o << "IC_64BIT_XD_OPSIZE";
940     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE))
941       o << "IC_64BIT_XD_ADSIZE";
942     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))
943       o << "IC_64BIT_XS_OPSIZE";
944     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE))
945       o << "IC_64BIT_XS_ADSIZE";
946     else if ((index & ATTR_64BIT) && (index & ATTR_XS))
947       o << "IC_64BIT_XS";
948     else if ((index & ATTR_64BIT) && (index & ATTR_XD))
949       o << "IC_64BIT_XD";
950     else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) &&
951              (index & ATTR_ADSIZE))
952       o << "IC_64BIT_OPSIZE_ADSIZE";
953     else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
954       o << "IC_64BIT_OPSIZE";
955     else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE))
956       o << "IC_64BIT_ADSIZE";
957     else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
958       o << "IC_64BIT_REXW";
959     else if ((index & ATTR_64BIT))
960       o << "IC_64BIT";
961     else if ((index & ATTR_XS) && (index & ATTR_OPSIZE))
962       o << "IC_XS_OPSIZE";
963     else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
964       o << "IC_XD_OPSIZE";
965     else if ((index & ATTR_XS) && (index & ATTR_ADSIZE))
966       o << "IC_XS_ADSIZE";
967     else if ((index & ATTR_XD) && (index & ATTR_ADSIZE))
968       o << "IC_XD_ADSIZE";
969     else if (index & ATTR_XS)
970       o << "IC_XS";
971     else if (index & ATTR_XD)
972       o << "IC_XD";
973     else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
974       o << "IC_OPSIZE_ADSIZE";
975     else if (index & ATTR_OPSIZE)
976       o << "IC_OPSIZE";
977     else if (index & ATTR_ADSIZE)
978       o << "IC_ADSIZE";
979     else
980       o << "IC";
981 
982     o << ", // " << index << "\n";
983   }
984 
985   i--;
986   o.indent(i * 2) << "};" << "\n";
987 }
988 
989 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
990                                               unsigned &i1, unsigned &i2,
991                                               unsigned &ModRMTableNum) const {
992   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR);
993   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
994   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR);
995   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR);
996   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
997   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
998   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
999   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR);
1000   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], MAP5_STR);
1001   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[9], MAP6_STR);
1002 }
1003 
1004 void DisassemblerTables::emit(raw_ostream &o) const {
1005   unsigned i1 = 0;
1006   unsigned i2 = 0;
1007 
1008   std::string s1;
1009   std::string s2;
1010 
1011   raw_string_ostream o1(s1);
1012   raw_string_ostream o2(s2);
1013 
1014   emitInstructionInfo(o, i2);
1015   o << "\n";
1016 
1017   emitContextTable(o, i2);
1018   o << "\n";
1019 
1020   unsigned ModRMTableNum = 0;
1021 
1022   o << "static const InstrUID modRMTable[] = {\n";
1023   i1++;
1024   std::vector<unsigned> EmptyTable(1, 0);
1025   ModRMTable[EmptyTable] = ModRMTableNum;
1026   ModRMTableNum += EmptyTable.size();
1027   o1 << "/*EmptyTable*/\n";
1028   o1.indent(i1 * 2) << "0x0,\n";
1029   i1--;
1030   emitContextDecisions(o1, o2, i1, i2, ModRMTableNum);
1031 
1032   o << o1.str();
1033   o << "  0x0\n";
1034   o << "};\n";
1035   o << "\n";
1036   o << o2.str();
1037   o << "\n";
1038   o << "\n";
1039 }
1040 
1041 void DisassemblerTables::setTableFields(ModRMDecision     &decision,
1042                                         const ModRMFilter &filter,
1043                                         InstrUID          uid,
1044                                         uint8_t           opcode) {
1045   for (unsigned index = 0; index < 256; ++index) {
1046     if (filter.accepts(index)) {
1047       if (decision.instructionIDs[index] == uid)
1048         continue;
1049 
1050       if (decision.instructionIDs[index] != 0) {
1051         InstructionSpecifier &newInfo =
1052           InstructionSpecifiers[uid];
1053         InstructionSpecifier &previousInfo =
1054           InstructionSpecifiers[decision.instructionIDs[index]];
1055 
1056         if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
1057                                            newInfo.name == "XCHG32ar" ||
1058                                            newInfo.name == "XCHG64ar"))
1059           continue; // special case for XCHG*ar and NOOP
1060 
1061         if (outranks(previousInfo.insnContext, newInfo.insnContext))
1062           continue;
1063 
1064         if (previousInfo.insnContext == newInfo.insnContext) {
1065           errs() << "Error: Primary decode conflict: ";
1066           errs() << newInfo.name << " would overwrite " << previousInfo.name;
1067           errs() << "\n";
1068           errs() << "ModRM   " << index << "\n";
1069           errs() << "Opcode  " << (uint16_t)opcode << "\n";
1070           errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
1071           HasConflicts = true;
1072         }
1073       }
1074 
1075       decision.instructionIDs[index] = uid;
1076     }
1077   }
1078 }
1079 
1080 void DisassemblerTables::setTableFields(OpcodeType          type,
1081                                         InstructionContext  insnContext,
1082                                         uint8_t             opcode,
1083                                         const ModRMFilter   &filter,
1084                                         InstrUID            uid,
1085                                         bool                is32bit,
1086                                         bool                noPrefix,
1087                                         bool                ignoresVEX_L,
1088                                         bool                ignoresVEX_W,
1089                                         unsigned            addressSize) {
1090   ContextDecision &decision = *Tables[type];
1091 
1092   for (unsigned index = 0; index < IC_max; ++index) {
1093     if ((is32bit || addressSize == 16) &&
1094         inheritsFrom((InstructionContext)index, IC_64BIT))
1095       continue;
1096 
1097     bool adSize64 = addressSize == 64;
1098     if (inheritsFrom((InstructionContext)index,
1099                      InstructionSpecifiers[uid].insnContext, noPrefix,
1100                      ignoresVEX_L, ignoresVEX_W, adSize64))
1101       setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
1102                      filter,
1103                      uid,
1104                      opcode);
1105   }
1106 }
1107