1 //===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the main function for LLVM's TableGen. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "TableGenBackends.h" // Declares all backends. 14 #include "llvm/Support/CommandLine.h" 15 #include "llvm/Support/InitLLVM.h" 16 #include "llvm/TableGen/Main.h" 17 #include "llvm/TableGen/Record.h" 18 #include "llvm/TableGen/SetTheory.h" 19 20 using namespace llvm; 21 22 enum ActionType { 23 PrintRecords, 24 PrintDetailedRecords, 25 NullBackend, 26 DumpJSON, 27 GenEmitter, 28 GenRegisterInfo, 29 GenInstrInfo, 30 GenInstrDocs, 31 GenAsmWriter, 32 GenAsmMatcher, 33 GenDisassembler, 34 GenPseudoLowering, 35 GenCompressInst, 36 GenCallingConv, 37 GenDAGISel, 38 GenDFAPacketizer, 39 GenFastISel, 40 GenSubtarget, 41 GenIntrinsicEnums, 42 GenIntrinsicImpl, 43 PrintEnums, 44 PrintSets, 45 GenOptParserDefs, 46 GenOptRST, 47 GenCTags, 48 GenAttributes, 49 GenSearchableTables, 50 GenGlobalISel, 51 GenGICombiner, 52 GenX86EVEX2VEXTables, 53 GenX86FoldTables, 54 GenRegisterBank, 55 GenExegesis, 56 GenAutomata, 57 GenDirectivesEnumDecl, 58 GenDirectivesEnumImpl, 59 GenDirectivesEnumGen, 60 }; 61 62 namespace llvm { 63 cl::opt<bool> EmitLongStrLiterals( 64 "long-string-literals", 65 cl::desc("when emitting large string tables, prefer string literals over " 66 "comma-separated char literals. This can be a readability and " 67 "compile-time performance win, but upsets some compilers"), 68 cl::Hidden, cl::init(true)); 69 } // end namespace llvm 70 71 namespace { 72 cl::opt<ActionType> Action( 73 cl::desc("Action to perform:"), 74 cl::values( 75 clEnumValN(PrintRecords, "print-records", 76 "Print all records to stdout (default)"), 77 clEnumValN(PrintDetailedRecords, "print-detailed-records", 78 "Print full details of all records to stdout"), 79 clEnumValN(NullBackend, "null-backend", 80 "Do nothing after parsing (useful for timing)"), 81 clEnumValN(DumpJSON, "dump-json", 82 "Dump all records as machine-readable JSON"), 83 clEnumValN(GenEmitter, "gen-emitter", "Generate machine code emitter"), 84 clEnumValN(GenRegisterInfo, "gen-register-info", 85 "Generate registers and register classes info"), 86 clEnumValN(GenInstrInfo, "gen-instr-info", 87 "Generate instruction descriptions"), 88 clEnumValN(GenInstrDocs, "gen-instr-docs", 89 "Generate instruction documentation"), 90 clEnumValN(GenCallingConv, "gen-callingconv", 91 "Generate calling convention descriptions"), 92 clEnumValN(GenAsmWriter, "gen-asm-writer", "Generate assembly writer"), 93 clEnumValN(GenDisassembler, "gen-disassembler", 94 "Generate disassembler"), 95 clEnumValN(GenPseudoLowering, "gen-pseudo-lowering", 96 "Generate pseudo instruction lowering"), 97 clEnumValN(GenCompressInst, "gen-compress-inst-emitter", 98 "Generate RISCV compressed instructions."), 99 clEnumValN(GenAsmMatcher, "gen-asm-matcher", 100 "Generate assembly instruction matcher"), 101 clEnumValN(GenDAGISel, "gen-dag-isel", 102 "Generate a DAG instruction selector"), 103 clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer", 104 "Generate DFA Packetizer for VLIW targets"), 105 clEnumValN(GenFastISel, "gen-fast-isel", 106 "Generate a \"fast\" instruction selector"), 107 clEnumValN(GenSubtarget, "gen-subtarget", 108 "Generate subtarget enumerations"), 109 clEnumValN(GenIntrinsicEnums, "gen-intrinsic-enums", 110 "Generate intrinsic enums"), 111 clEnumValN(GenIntrinsicImpl, "gen-intrinsic-impl", 112 "Generate intrinsic information"), 113 clEnumValN(PrintEnums, "print-enums", "Print enum values for a class"), 114 clEnumValN(PrintSets, "print-sets", 115 "Print expanded sets for testing DAG exprs"), 116 clEnumValN(GenOptParserDefs, "gen-opt-parser-defs", 117 "Generate option definitions"), 118 clEnumValN(GenOptRST, "gen-opt-rst", "Generate option RST"), 119 clEnumValN(GenCTags, "gen-ctags", "Generate ctags-compatible index"), 120 clEnumValN(GenAttributes, "gen-attrs", "Generate attributes"), 121 clEnumValN(GenSearchableTables, "gen-searchable-tables", 122 "Generate generic binary-searchable table"), 123 clEnumValN(GenGlobalISel, "gen-global-isel", 124 "Generate GlobalISel selector"), 125 clEnumValN(GenGICombiner, "gen-global-isel-combiner", 126 "Generate GlobalISel combiner"), 127 clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables", 128 "Generate X86 EVEX to VEX compress tables"), 129 clEnumValN(GenX86FoldTables, "gen-x86-fold-tables", 130 "Generate X86 fold tables"), 131 clEnumValN(GenRegisterBank, "gen-register-bank", 132 "Generate registers bank descriptions"), 133 clEnumValN(GenExegesis, "gen-exegesis", 134 "Generate llvm-exegesis tables"), 135 clEnumValN(GenAutomata, "gen-automata", "Generate generic automata"), 136 clEnumValN(GenDirectivesEnumDecl, "gen-directive-decl", 137 "Generate directive related declaration code (header file)"), 138 clEnumValN(GenDirectivesEnumImpl, "gen-directive-impl", 139 "Generate directive related implementation code"), 140 clEnumValN(GenDirectivesEnumGen, "gen-directive-gen", 141 "Generate directive related implementation code part"))); 142 143 cl::OptionCategory PrintEnumsCat("Options for -print-enums"); 144 cl::opt<std::string> Class("class", cl::desc("Print Enum list for this class"), 145 cl::value_desc("class name"), 146 cl::cat(PrintEnumsCat)); 147 148 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { 149 switch (Action) { 150 case PrintRecords: 151 OS << Records; // No argument, dump all contents 152 break; 153 case PrintDetailedRecords: 154 EmitDetailedRecords(Records, OS); 155 break; 156 case NullBackend: // No backend at all. 157 break; 158 case DumpJSON: 159 EmitJSON(Records, OS); 160 break; 161 case GenEmitter: 162 EmitCodeEmitter(Records, OS); 163 break; 164 case GenRegisterInfo: 165 EmitRegisterInfo(Records, OS); 166 break; 167 case GenInstrInfo: 168 EmitInstrInfo(Records, OS); 169 break; 170 case GenInstrDocs: 171 EmitInstrDocs(Records, OS); 172 break; 173 case GenCallingConv: 174 EmitCallingConv(Records, OS); 175 break; 176 case GenAsmWriter: 177 EmitAsmWriter(Records, OS); 178 break; 179 case GenAsmMatcher: 180 EmitAsmMatcher(Records, OS); 181 break; 182 case GenDisassembler: 183 EmitDisassembler(Records, OS); 184 break; 185 case GenPseudoLowering: 186 EmitPseudoLowering(Records, OS); 187 break; 188 case GenCompressInst: 189 EmitCompressInst(Records, OS); 190 break; 191 case GenDAGISel: 192 EmitDAGISel(Records, OS); 193 break; 194 case GenDFAPacketizer: 195 EmitDFAPacketizer(Records, OS); 196 break; 197 case GenFastISel: 198 EmitFastISel(Records, OS); 199 break; 200 case GenSubtarget: 201 EmitSubtarget(Records, OS); 202 break; 203 case GenIntrinsicEnums: 204 EmitIntrinsicEnums(Records, OS); 205 break; 206 case GenIntrinsicImpl: 207 EmitIntrinsicImpl(Records, OS); 208 break; 209 case GenOptParserDefs: 210 EmitOptParser(Records, OS); 211 break; 212 case GenOptRST: 213 EmitOptRST(Records, OS); 214 break; 215 case PrintEnums: 216 { 217 for (Record *Rec : Records.getAllDerivedDefinitions(Class)) 218 OS << Rec->getName() << ", "; 219 OS << "\n"; 220 break; 221 } 222 case PrintSets: 223 { 224 SetTheory Sets; 225 Sets.addFieldExpander("Set", "Elements"); 226 for (Record *Rec : Records.getAllDerivedDefinitions("Set")) { 227 OS << Rec->getName() << " = ["; 228 const std::vector<Record*> *Elts = Sets.expand(Rec); 229 assert(Elts && "Couldn't expand Set instance"); 230 for (Record *Elt : *Elts) 231 OS << ' ' << Elt->getName(); 232 OS << " ]\n"; 233 } 234 break; 235 } 236 case GenCTags: 237 EmitCTags(Records, OS); 238 break; 239 case GenAttributes: 240 EmitAttributes(Records, OS); 241 break; 242 case GenSearchableTables: 243 EmitSearchableTables(Records, OS); 244 break; 245 case GenGlobalISel: 246 EmitGlobalISel(Records, OS); 247 break; 248 case GenGICombiner: 249 EmitGICombiner(Records, OS); 250 break; 251 case GenRegisterBank: 252 EmitRegisterBank(Records, OS); 253 break; 254 case GenX86EVEX2VEXTables: 255 EmitX86EVEX2VEXTables(Records, OS); 256 break; 257 case GenX86FoldTables: 258 EmitX86FoldTables(Records, OS); 259 break; 260 case GenExegesis: 261 EmitExegesis(Records, OS); 262 break; 263 case GenAutomata: 264 EmitAutomata(Records, OS); 265 break; 266 case GenDirectivesEnumDecl: 267 EmitDirectivesDecl(Records, OS); 268 break; 269 case GenDirectivesEnumImpl: 270 EmitDirectivesImpl(Records, OS); 271 break; 272 case GenDirectivesEnumGen: 273 EmitDirectivesGen(Records, OS); 274 break; 275 } 276 277 return false; 278 } 279 } 280 281 int main(int argc, char **argv) { 282 InitLLVM X(argc, argv); 283 cl::ParseCommandLineOptions(argc, argv); 284 285 return TableGenMain(argv[0], &LLVMTableGenMain); 286 } 287 288 #ifndef __has_feature 289 #define __has_feature(x) 0 290 #endif 291 292 #if __has_feature(address_sanitizer) || defined(__SANITIZE_ADDRESS__) || \ 293 __has_feature(leak_sanitizer) 294 295 #include <sanitizer/lsan_interface.h> 296 // Disable LeakSanitizer for this binary as it has too many leaks that are not 297 // very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h . 298 LLVM_ATTRIBUTE_USED int __lsan_is_turned_off() { return 1; } 299 300 #endif 301