1 //===- IntrinsicEmitter.cpp - Generate intrinsic information --------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This tablegen backend emits information about intrinsic functions. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "CodeGenIntrinsics.h" 14 #include "CodeGenTarget.h" 15 #include "SequenceToOffsetTable.h" 16 #include "TableGenBackends.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/Support/CommandLine.h" 19 #include "llvm/TableGen/Error.h" 20 #include "llvm/TableGen/Record.h" 21 #include "llvm/TableGen/StringToOffsetTable.h" 22 #include "llvm/TableGen/TableGenBackend.h" 23 #include <algorithm> 24 using namespace llvm; 25 26 cl::OptionCategory GenIntrinsicCat("Options for -gen-intrinsic-enums"); 27 cl::opt<std::string> 28 IntrinsicPrefix("intrinsic-prefix", 29 cl::desc("Generate intrinsics with this target prefix"), 30 cl::value_desc("target prefix"), cl::cat(GenIntrinsicCat)); 31 32 namespace { 33 class IntrinsicEmitter { 34 RecordKeeper &Records; 35 36 public: 37 IntrinsicEmitter(RecordKeeper &R) : Records(R) {} 38 39 void run(raw_ostream &OS, bool Enums); 40 41 void EmitEnumInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 42 void EmitTargetInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 43 void EmitIntrinsicToNameTable(const CodeGenIntrinsicTable &Ints, 44 raw_ostream &OS); 45 void EmitIntrinsicToOverloadTable(const CodeGenIntrinsicTable &Ints, 46 raw_ostream &OS); 47 void EmitGenerator(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 48 void EmitAttributes(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 49 void EmitIntrinsicToBuiltinMap(const CodeGenIntrinsicTable &Ints, bool IsClang, 50 raw_ostream &OS); 51 }; 52 } // End anonymous namespace 53 54 //===----------------------------------------------------------------------===// 55 // IntrinsicEmitter Implementation 56 //===----------------------------------------------------------------------===// 57 58 void IntrinsicEmitter::run(raw_ostream &OS, bool Enums) { 59 emitSourceFileHeader("Intrinsic Function Source Fragment", OS); 60 61 CodeGenIntrinsicTable Ints(Records); 62 63 if (Enums) { 64 // Emit the enum information. 65 EmitEnumInfo(Ints, OS); 66 } else { 67 // Emit the target metadata. 68 EmitTargetInfo(Ints, OS); 69 70 // Emit the intrinsic ID -> name table. 71 EmitIntrinsicToNameTable(Ints, OS); 72 73 // Emit the intrinsic ID -> overload table. 74 EmitIntrinsicToOverloadTable(Ints, OS); 75 76 // Emit the intrinsic declaration generator. 77 EmitGenerator(Ints, OS); 78 79 // Emit the intrinsic parameter attributes. 80 EmitAttributes(Ints, OS); 81 82 // Emit code to translate GCC builtins into LLVM intrinsics. 83 EmitIntrinsicToBuiltinMap(Ints, true, OS); 84 85 // Emit code to translate MS builtins into LLVM intrinsics. 86 EmitIntrinsicToBuiltinMap(Ints, false, OS); 87 } 88 } 89 90 void IntrinsicEmitter::EmitEnumInfo(const CodeGenIntrinsicTable &Ints, 91 raw_ostream &OS) { 92 // Find the TargetSet for which to generate enums. There will be an initial 93 // set with an empty target prefix which will include target independent 94 // intrinsics like dbg.value. 95 const CodeGenIntrinsicTable::TargetSet *Set = nullptr; 96 for (const auto &Target : Ints.Targets) { 97 if (Target.Name == IntrinsicPrefix) { 98 Set = &Target; 99 break; 100 } 101 } 102 if (!Set) { 103 std::vector<std::string> KnownTargets; 104 for (const auto &Target : Ints.Targets) 105 if (!Target.Name.empty()) 106 KnownTargets.push_back(Target.Name); 107 PrintFatalError("tried to generate intrinsics for unknown target " + 108 IntrinsicPrefix + 109 "\nKnown targets are: " + join(KnownTargets, ", ") + "\n"); 110 } 111 112 // Generate a complete header for target specific intrinsics. 113 if (!IntrinsicPrefix.empty()) { 114 std::string UpperPrefix = StringRef(IntrinsicPrefix).upper(); 115 OS << "#ifndef LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n"; 116 OS << "#define LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n\n"; 117 OS << "namespace llvm {\n"; 118 OS << "namespace Intrinsic {\n"; 119 OS << "enum " << UpperPrefix << "Intrinsics : unsigned {\n"; 120 } 121 122 OS << "// Enum values for intrinsics\n"; 123 for (unsigned i = Set->Offset, e = Set->Offset + Set->Count; i != e; ++i) { 124 OS << " " << Ints[i].EnumName; 125 126 // Assign a value to the first intrinsic in this target set so that all 127 // intrinsic ids are distinct. 128 if (i == Set->Offset) 129 OS << " = " << (Set->Offset + 1); 130 131 OS << ", "; 132 if (Ints[i].EnumName.size() < 40) 133 OS.indent(40 - Ints[i].EnumName.size()); 134 OS << " // " << Ints[i].Name << "\n"; 135 } 136 137 // Emit num_intrinsics into the target neutral enum. 138 if (IntrinsicPrefix.empty()) { 139 OS << " num_intrinsics = " << (Ints.size() + 1) << "\n"; 140 } else { 141 OS << "}; // enum\n"; 142 OS << "} // namespace Intrinsic\n"; 143 OS << "} // namespace llvm\n\n"; 144 OS << "#endif\n"; 145 } 146 } 147 148 void IntrinsicEmitter::EmitTargetInfo(const CodeGenIntrinsicTable &Ints, 149 raw_ostream &OS) { 150 OS << "// Target mapping\n"; 151 OS << "#ifdef GET_INTRINSIC_TARGET_DATA\n"; 152 OS << "struct IntrinsicTargetInfo {\n" 153 << " llvm::StringLiteral Name;\n" 154 << " size_t Offset;\n" 155 << " size_t Count;\n" 156 << "};\n"; 157 OS << "static constexpr IntrinsicTargetInfo TargetInfos[] = {\n"; 158 for (auto Target : Ints.Targets) 159 OS << " {llvm::StringLiteral(\"" << Target.Name << "\"), " << Target.Offset 160 << ", " << Target.Count << "},\n"; 161 OS << "};\n"; 162 OS << "#endif\n\n"; 163 } 164 165 void IntrinsicEmitter::EmitIntrinsicToNameTable( 166 const CodeGenIntrinsicTable &Ints, raw_ostream &OS) { 167 OS << "// Intrinsic ID to name table\n"; 168 OS << "#ifdef GET_INTRINSIC_NAME_TABLE\n"; 169 OS << " // Note that entry #0 is the invalid intrinsic!\n"; 170 for (unsigned i = 0, e = Ints.size(); i != e; ++i) 171 OS << " \"" << Ints[i].Name << "\",\n"; 172 OS << "#endif\n\n"; 173 } 174 175 void IntrinsicEmitter::EmitIntrinsicToOverloadTable( 176 const CodeGenIntrinsicTable &Ints, raw_ostream &OS) { 177 OS << "// Intrinsic ID to overload bitset\n"; 178 OS << "#ifdef GET_INTRINSIC_OVERLOAD_TABLE\n"; 179 OS << "static const uint8_t OTable[] = {\n"; 180 OS << " 0"; 181 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 182 // Add one to the index so we emit a null bit for the invalid #0 intrinsic. 183 if ((i+1)%8 == 0) 184 OS << ",\n 0"; 185 if (Ints[i].isOverloaded) 186 OS << " | (1<<" << (i+1)%8 << ')'; 187 } 188 OS << "\n};\n\n"; 189 // OTable contains a true bit at the position if the intrinsic is overloaded. 190 OS << "return (OTable[id/8] & (1 << (id%8))) != 0;\n"; 191 OS << "#endif\n\n"; 192 } 193 194 195 // NOTE: This must be kept in synch with the copy in lib/IR/Function.cpp! 196 enum IIT_Info { 197 // Common values should be encoded with 0-15. 198 IIT_Done = 0, 199 IIT_I1 = 1, 200 IIT_I8 = 2, 201 IIT_I16 = 3, 202 IIT_I32 = 4, 203 IIT_I64 = 5, 204 IIT_F16 = 6, 205 IIT_F32 = 7, 206 IIT_F64 = 8, 207 IIT_V2 = 9, 208 IIT_V4 = 10, 209 IIT_V8 = 11, 210 IIT_V16 = 12, 211 IIT_V32 = 13, 212 IIT_PTR = 14, 213 IIT_ARG = 15, 214 215 // Values from 16+ are only encodable with the inefficient encoding. 216 IIT_V64 = 16, 217 IIT_MMX = 17, 218 IIT_TOKEN = 18, 219 IIT_METADATA = 19, 220 IIT_EMPTYSTRUCT = 20, 221 IIT_STRUCT2 = 21, 222 IIT_STRUCT3 = 22, 223 IIT_STRUCT4 = 23, 224 IIT_STRUCT5 = 24, 225 IIT_EXTEND_ARG = 25, 226 IIT_TRUNC_ARG = 26, 227 IIT_ANYPTR = 27, 228 IIT_V1 = 28, 229 IIT_VARARG = 29, 230 IIT_HALF_VEC_ARG = 30, 231 IIT_SAME_VEC_WIDTH_ARG = 31, 232 IIT_PTR_TO_ARG = 32, 233 IIT_PTR_TO_ELT = 33, 234 IIT_VEC_OF_ANYPTRS_TO_ELT = 34, 235 IIT_I128 = 35, 236 IIT_V512 = 36, 237 IIT_V1024 = 37, 238 IIT_STRUCT6 = 38, 239 IIT_STRUCT7 = 39, 240 IIT_STRUCT8 = 40, 241 IIT_F128 = 41, 242 IIT_VEC_ELEMENT = 42, 243 IIT_SCALABLE_VEC = 43, 244 IIT_SUBDIVIDE2_ARG = 44, 245 IIT_SUBDIVIDE4_ARG = 45, 246 IIT_VEC_OF_BITCASTS_TO_INT = 46, 247 IIT_V128 = 47, 248 IIT_BF16 = 48, 249 IIT_STRUCT9 = 49, 250 IIT_V256 = 50, 251 IIT_AMX = 51, 252 IIT_PPCF128 = 52, 253 IIT_V3 = 53, 254 IIT_EXTERNREF = 54, 255 IIT_FUNCREF = 55, 256 IIT_ANYPTR_TO_ELT = 56, 257 IIT_I2 = 57, 258 IIT_I4 = 58, 259 }; 260 261 static void EncodeFixedValueType(MVT::SimpleValueType VT, 262 std::vector<unsigned char> &Sig) { 263 // clang-format off 264 if (MVT(VT).isInteger()) { 265 unsigned BitWidth = MVT(VT).getFixedSizeInBits(); 266 switch (BitWidth) { 267 default: PrintFatalError("unhandled integer type width in intrinsic!"); 268 case 1: return Sig.push_back(IIT_I1); 269 case 2: return Sig.push_back(IIT_I2); 270 case 4: return Sig.push_back(IIT_I4); 271 case 8: return Sig.push_back(IIT_I8); 272 case 16: return Sig.push_back(IIT_I16); 273 case 32: return Sig.push_back(IIT_I32); 274 case 64: return Sig.push_back(IIT_I64); 275 case 128: return Sig.push_back(IIT_I128); 276 } 277 } 278 279 switch (VT) { 280 default: PrintFatalError("unhandled MVT in intrinsic!"); 281 case MVT::f16: return Sig.push_back(IIT_F16); 282 case MVT::bf16: return Sig.push_back(IIT_BF16); 283 case MVT::f32: return Sig.push_back(IIT_F32); 284 case MVT::f64: return Sig.push_back(IIT_F64); 285 case MVT::f128: return Sig.push_back(IIT_F128); 286 case MVT::ppcf128: return Sig.push_back(IIT_PPCF128); 287 case MVT::token: return Sig.push_back(IIT_TOKEN); 288 case MVT::Metadata: return Sig.push_back(IIT_METADATA); 289 case MVT::x86mmx: return Sig.push_back(IIT_MMX); 290 case MVT::x86amx: return Sig.push_back(IIT_AMX); 291 // MVT::OtherVT is used to mean the empty struct type here. 292 case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT); 293 // MVT::isVoid is used to represent varargs here. 294 case MVT::isVoid: return Sig.push_back(IIT_VARARG); 295 case MVT::externref: 296 return Sig.push_back(IIT_EXTERNREF); 297 case MVT::funcref: 298 return Sig.push_back(IIT_FUNCREF); 299 } 300 // clang-format on 301 } 302 303 #if defined(_MSC_VER) && !defined(__clang__) 304 #pragma optimize("",off) // MSVC 2015 optimizer can't deal with this function. 305 #endif 306 307 static void EncodeFixedType(Record *R, std::vector<unsigned char> &ArgCodes, 308 unsigned &NextArgCode, 309 std::vector<unsigned char> &Sig, 310 ArrayRef<unsigned char> Mapping) { 311 312 if (R->isSubClassOf("LLVMMatchType")) { 313 unsigned Number = Mapping[R->getValueAsInt("Number")]; 314 assert(Number < ArgCodes.size() && "Invalid matching number!"); 315 if (R->isSubClassOf("LLVMExtendedType")) 316 Sig.push_back(IIT_EXTEND_ARG); 317 else if (R->isSubClassOf("LLVMTruncatedType")) 318 Sig.push_back(IIT_TRUNC_ARG); 319 else if (R->isSubClassOf("LLVMHalfElementsVectorType")) 320 Sig.push_back(IIT_HALF_VEC_ARG); 321 else if (R->isSubClassOf("LLVMScalarOrSameVectorWidth")) { 322 Sig.push_back(IIT_SAME_VEC_WIDTH_ARG); 323 Sig.push_back((Number << 3) | ArgCodes[Number]); 324 MVT::SimpleValueType VT = getValueType(R->getValueAsDef("ElTy")); 325 EncodeFixedValueType(VT, Sig); 326 return; 327 } 328 else if (R->isSubClassOf("LLVMPointerTo")) 329 Sig.push_back(IIT_PTR_TO_ARG); 330 else if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) { 331 Sig.push_back(IIT_VEC_OF_ANYPTRS_TO_ELT); 332 // Encode overloaded ArgNo 333 Sig.push_back(NextArgCode++); 334 // Encode LLVMMatchType<Number> ArgNo 335 Sig.push_back(Number); 336 return; 337 } else if (R->isSubClassOf("LLVMAnyPointerToElt")) { 338 Sig.push_back(IIT_ANYPTR_TO_ELT); 339 // Encode overloaded ArgNo 340 Sig.push_back(NextArgCode++); 341 // Encode LLVMMatchType<Number> ArgNo 342 Sig.push_back(Number); 343 return; 344 } else if (R->isSubClassOf("LLVMPointerToElt")) 345 Sig.push_back(IIT_PTR_TO_ELT); 346 else if (R->isSubClassOf("LLVMVectorElementType")) 347 Sig.push_back(IIT_VEC_ELEMENT); 348 else if (R->isSubClassOf("LLVMSubdivide2VectorType")) 349 Sig.push_back(IIT_SUBDIVIDE2_ARG); 350 else if (R->isSubClassOf("LLVMSubdivide4VectorType")) 351 Sig.push_back(IIT_SUBDIVIDE4_ARG); 352 else if (R->isSubClassOf("LLVMVectorOfBitcastsToInt")) 353 Sig.push_back(IIT_VEC_OF_BITCASTS_TO_INT); 354 else 355 Sig.push_back(IIT_ARG); 356 return Sig.push_back((Number << 3) | 7 /*IITDescriptor::AK_MatchType*/); 357 } 358 359 MVT::SimpleValueType VT = getValueType(R->getValueAsDef("VT")); 360 361 unsigned Tmp = 0; 362 switch (VT) { 363 default: break; 364 case MVT::iPTRAny: ++Tmp; LLVM_FALLTHROUGH; 365 case MVT::vAny: ++Tmp; LLVM_FALLTHROUGH; 366 case MVT::fAny: ++Tmp; LLVM_FALLTHROUGH; 367 case MVT::iAny: ++Tmp; LLVM_FALLTHROUGH; 368 case MVT::Any: { 369 // If this is an "any" valuetype, then the type is the type of the next 370 // type in the list specified to getIntrinsic(). 371 Sig.push_back(IIT_ARG); 372 373 // Figure out what arg # this is consuming, and remember what kind it was. 374 assert(NextArgCode < ArgCodes.size() && ArgCodes[NextArgCode] == Tmp && 375 "Invalid or no ArgCode associated with overloaded VT!"); 376 unsigned ArgNo = NextArgCode++; 377 378 // Encode what sort of argument it must be in the low 3 bits of the ArgNo. 379 return Sig.push_back((ArgNo << 3) | Tmp); 380 } 381 382 case MVT::iPTR: { 383 unsigned AddrSpace = 0; 384 if (R->isSubClassOf("LLVMQualPointerType")) { 385 AddrSpace = R->getValueAsInt("AddrSpace"); 386 assert(AddrSpace < 256 && "Address space exceeds 255"); 387 } 388 if (AddrSpace) { 389 Sig.push_back(IIT_ANYPTR); 390 Sig.push_back(AddrSpace); 391 } else { 392 Sig.push_back(IIT_PTR); 393 } 394 return EncodeFixedType(R->getValueAsDef("ElTy"), ArgCodes, NextArgCode, Sig, 395 Mapping); 396 } 397 } 398 399 if (MVT(VT).isVector()) { 400 MVT VVT = VT; 401 if (VVT.isScalableVector()) 402 Sig.push_back(IIT_SCALABLE_VEC); 403 switch (VVT.getVectorMinNumElements()) { 404 default: PrintFatalError("unhandled vector type width in intrinsic!"); 405 case 1: Sig.push_back(IIT_V1); break; 406 case 2: Sig.push_back(IIT_V2); break; 407 case 3: Sig.push_back(IIT_V3); break; 408 case 4: Sig.push_back(IIT_V4); break; 409 case 8: Sig.push_back(IIT_V8); break; 410 case 16: Sig.push_back(IIT_V16); break; 411 case 32: Sig.push_back(IIT_V32); break; 412 case 64: Sig.push_back(IIT_V64); break; 413 case 128: Sig.push_back(IIT_V128); break; 414 case 256: Sig.push_back(IIT_V256); break; 415 case 512: Sig.push_back(IIT_V512); break; 416 case 1024: Sig.push_back(IIT_V1024); break; 417 } 418 419 return EncodeFixedValueType(VVT.getVectorElementType().SimpleTy, Sig); 420 } 421 422 EncodeFixedValueType(VT, Sig); 423 } 424 425 static void UpdateArgCodes(Record *R, std::vector<unsigned char> &ArgCodes, 426 unsigned int &NumInserted, 427 SmallVectorImpl<unsigned char> &Mapping) { 428 if (R->isSubClassOf("LLVMMatchType")) { 429 if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) { 430 ArgCodes.push_back(3 /*vAny*/); 431 ++NumInserted; 432 } else if (R->isSubClassOf("LLVMAnyPointerToElt")) { 433 ArgCodes.push_back(4 /*iPTRAny*/); 434 ++NumInserted; 435 } 436 return; 437 } 438 439 unsigned Tmp = 0; 440 switch (getValueType(R->getValueAsDef("VT"))) { 441 default: break; 442 case MVT::iPTR: 443 UpdateArgCodes(R->getValueAsDef("ElTy"), ArgCodes, NumInserted, Mapping); 444 break; 445 case MVT::iPTRAny: 446 ++Tmp; 447 LLVM_FALLTHROUGH; 448 case MVT::vAny: 449 ++Tmp; 450 LLVM_FALLTHROUGH; 451 case MVT::fAny: 452 ++Tmp; 453 LLVM_FALLTHROUGH; 454 case MVT::iAny: 455 ++Tmp; 456 LLVM_FALLTHROUGH; 457 case MVT::Any: 458 unsigned OriginalIdx = ArgCodes.size() - NumInserted; 459 assert(OriginalIdx >= Mapping.size()); 460 Mapping.resize(OriginalIdx+1); 461 Mapping[OriginalIdx] = ArgCodes.size(); 462 ArgCodes.push_back(Tmp); 463 break; 464 } 465 } 466 467 #if defined(_MSC_VER) && !defined(__clang__) 468 #pragma optimize("",on) 469 #endif 470 471 /// ComputeFixedEncoding - If we can encode the type signature for this 472 /// intrinsic into 32 bits, return it. If not, return ~0U. 473 static void ComputeFixedEncoding(const CodeGenIntrinsic &Int, 474 std::vector<unsigned char> &TypeSig) { 475 std::vector<unsigned char> ArgCodes; 476 477 // Add codes for any overloaded result VTs. 478 unsigned int NumInserted = 0; 479 SmallVector<unsigned char, 8> ArgMapping; 480 for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i) 481 UpdateArgCodes(Int.IS.RetTypeDefs[i], ArgCodes, NumInserted, ArgMapping); 482 483 // Add codes for any overloaded operand VTs. 484 for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i) 485 UpdateArgCodes(Int.IS.ParamTypeDefs[i], ArgCodes, NumInserted, ArgMapping); 486 487 unsigned NextArgCode = 0; 488 if (Int.IS.RetVTs.empty()) 489 TypeSig.push_back(IIT_Done); 490 else if (Int.IS.RetVTs.size() == 1 && 491 Int.IS.RetVTs[0] == MVT::isVoid) 492 TypeSig.push_back(IIT_Done); 493 else { 494 switch (Int.IS.RetVTs.size()) { 495 case 1: break; 496 case 2: TypeSig.push_back(IIT_STRUCT2); break; 497 case 3: TypeSig.push_back(IIT_STRUCT3); break; 498 case 4: TypeSig.push_back(IIT_STRUCT4); break; 499 case 5: TypeSig.push_back(IIT_STRUCT5); break; 500 case 6: TypeSig.push_back(IIT_STRUCT6); break; 501 case 7: TypeSig.push_back(IIT_STRUCT7); break; 502 case 8: TypeSig.push_back(IIT_STRUCT8); break; 503 case 9: TypeSig.push_back(IIT_STRUCT9); break; 504 default: llvm_unreachable("Unhandled case in struct"); 505 } 506 507 for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i) 508 EncodeFixedType(Int.IS.RetTypeDefs[i], ArgCodes, NextArgCode, TypeSig, 509 ArgMapping); 510 } 511 512 for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i) 513 EncodeFixedType(Int.IS.ParamTypeDefs[i], ArgCodes, NextArgCode, TypeSig, 514 ArgMapping); 515 } 516 517 static void printIITEntry(raw_ostream &OS, unsigned char X) { 518 OS << (unsigned)X; 519 } 520 521 void IntrinsicEmitter::EmitGenerator(const CodeGenIntrinsicTable &Ints, 522 raw_ostream &OS) { 523 // If we can compute a 32-bit fixed encoding for this intrinsic, do so and 524 // capture it in this vector, otherwise store a ~0U. 525 std::vector<unsigned> FixedEncodings; 526 527 SequenceToOffsetTable<std::vector<unsigned char> > LongEncodingTable; 528 529 std::vector<unsigned char> TypeSig; 530 531 // Compute the unique argument type info. 532 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 533 // Get the signature for the intrinsic. 534 TypeSig.clear(); 535 ComputeFixedEncoding(Ints[i], TypeSig); 536 537 // Check to see if we can encode it into a 32-bit word. We can only encode 538 // 8 nibbles into a 32-bit word. 539 if (TypeSig.size() <= 8) { 540 bool Failed = false; 541 unsigned Result = 0; 542 for (unsigned i = 0, e = TypeSig.size(); i != e; ++i) { 543 // If we had an unencodable argument, bail out. 544 if (TypeSig[i] > 15) { 545 Failed = true; 546 break; 547 } 548 Result = (Result << 4) | TypeSig[e-i-1]; 549 } 550 551 // If this could be encoded into a 31-bit word, return it. 552 if (!Failed && (Result >> 31) == 0) { 553 FixedEncodings.push_back(Result); 554 continue; 555 } 556 } 557 558 // Otherwise, we're going to unique the sequence into the 559 // LongEncodingTable, and use its offset in the 32-bit table instead. 560 LongEncodingTable.add(TypeSig); 561 562 // This is a placehold that we'll replace after the table is laid out. 563 FixedEncodings.push_back(~0U); 564 } 565 566 LongEncodingTable.layout(); 567 568 OS << "// Global intrinsic function declaration type table.\n"; 569 OS << "#ifdef GET_INTRINSIC_GENERATOR_GLOBAL\n"; 570 571 OS << "static const unsigned IIT_Table[] = {\n "; 572 573 for (unsigned i = 0, e = FixedEncodings.size(); i != e; ++i) { 574 if ((i & 7) == 7) 575 OS << "\n "; 576 577 // If the entry fit in the table, just emit it. 578 if (FixedEncodings[i] != ~0U) { 579 OS << "0x" << Twine::utohexstr(FixedEncodings[i]) << ", "; 580 continue; 581 } 582 583 TypeSig.clear(); 584 ComputeFixedEncoding(Ints[i], TypeSig); 585 586 587 // Otherwise, emit the offset into the long encoding table. We emit it this 588 // way so that it is easier to read the offset in the .def file. 589 OS << "(1U<<31) | " << LongEncodingTable.get(TypeSig) << ", "; 590 } 591 592 OS << "0\n};\n\n"; 593 594 // Emit the shared table of register lists. 595 OS << "static const unsigned char IIT_LongEncodingTable[] = {\n"; 596 if (!LongEncodingTable.empty()) 597 LongEncodingTable.emit(OS, printIITEntry); 598 OS << " 255\n};\n\n"; 599 600 OS << "#endif\n\n"; // End of GET_INTRINSIC_GENERATOR_GLOBAL 601 } 602 603 namespace { 604 struct AttributeComparator { 605 bool operator()(const CodeGenIntrinsic *L, const CodeGenIntrinsic *R) const { 606 // Sort throwing intrinsics after non-throwing intrinsics. 607 if (L->canThrow != R->canThrow) 608 return R->canThrow; 609 610 if (L->isNoDuplicate != R->isNoDuplicate) 611 return R->isNoDuplicate; 612 613 if (L->isNoMerge != R->isNoMerge) 614 return R->isNoMerge; 615 616 if (L->isNoReturn != R->isNoReturn) 617 return R->isNoReturn; 618 619 if (L->isNoCallback != R->isNoCallback) 620 return R->isNoCallback; 621 622 if (L->isNoSync != R->isNoSync) 623 return R->isNoSync; 624 625 if (L->isNoFree != R->isNoFree) 626 return R->isNoFree; 627 628 if (L->isWillReturn != R->isWillReturn) 629 return R->isWillReturn; 630 631 if (L->isCold != R->isCold) 632 return R->isCold; 633 634 if (L->isConvergent != R->isConvergent) 635 return R->isConvergent; 636 637 if (L->isSpeculatable != R->isSpeculatable) 638 return R->isSpeculatable; 639 640 if (L->hasSideEffects != R->hasSideEffects) 641 return R->hasSideEffects; 642 643 // Try to order by readonly/readnone attribute. 644 CodeGenIntrinsic::ModRefBehavior LK = L->ModRef; 645 CodeGenIntrinsic::ModRefBehavior RK = R->ModRef; 646 if (LK != RK) return (LK > RK); 647 // Order by argument attributes. 648 // This is reliable because each side is already sorted internally. 649 return (L->ArgumentAttributes < R->ArgumentAttributes); 650 } 651 }; 652 } // End anonymous namespace 653 654 /// EmitAttributes - This emits the Intrinsic::getAttributes method. 655 void IntrinsicEmitter::EmitAttributes(const CodeGenIntrinsicTable &Ints, 656 raw_ostream &OS) { 657 OS << "// Add parameter attributes that are not common to all intrinsics.\n"; 658 OS << "#ifdef GET_INTRINSIC_ATTRIBUTES\n"; 659 OS << "AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {\n"; 660 661 // Compute the maximum number of attribute arguments and the map 662 typedef std::map<const CodeGenIntrinsic*, unsigned, 663 AttributeComparator> UniqAttrMapTy; 664 UniqAttrMapTy UniqAttributes; 665 unsigned maxArgAttrs = 0; 666 unsigned AttrNum = 0; 667 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 668 const CodeGenIntrinsic &intrinsic = Ints[i]; 669 maxArgAttrs = 670 std::max(maxArgAttrs, unsigned(intrinsic.ArgumentAttributes.size())); 671 unsigned &N = UniqAttributes[&intrinsic]; 672 if (N) continue; 673 N = ++AttrNum; 674 assert(N < 65536 && "Too many unique attributes for table!"); 675 } 676 677 // Emit an array of AttributeList. Most intrinsics will have at least one 678 // entry, for the function itself (index ~1), which is usually nounwind. 679 OS << " static const uint16_t IntrinsicsToAttributesMap[] = {\n"; 680 681 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 682 const CodeGenIntrinsic &intrinsic = Ints[i]; 683 684 OS << " " << UniqAttributes[&intrinsic] << ", // " 685 << intrinsic.Name << "\n"; 686 } 687 OS << " };\n\n"; 688 689 OS << " AttributeList AS[" << maxArgAttrs + 1 << "];\n"; 690 OS << " unsigned NumAttrs = 0;\n"; 691 OS << " if (id != 0) {\n"; 692 OS << " switch(IntrinsicsToAttributesMap[id - 1]) {\n"; 693 OS << " default: llvm_unreachable(\"Invalid attribute number\");\n"; 694 for (auto UniqAttribute : UniqAttributes) { 695 OS << " case " << UniqAttribute.second << ": {\n"; 696 697 const CodeGenIntrinsic &Intrinsic = *(UniqAttribute.first); 698 699 // Keep track of the number of attributes we're writing out. 700 unsigned numAttrs = 0; 701 702 // The argument attributes are alreadys sorted by argument index. 703 unsigned Ai = 0, Ae = Intrinsic.ArgumentAttributes.size(); 704 if (Ae) { 705 while (Ai != Ae) { 706 unsigned AttrIdx = Intrinsic.ArgumentAttributes[Ai].Index; 707 708 OS << " const Attribute::AttrKind AttrParam" << AttrIdx << "[]= {"; 709 ListSeparator LS(","); 710 711 bool AllValuesAreZero = true; 712 SmallVector<uint64_t, 8> Values; 713 do { 714 switch (Intrinsic.ArgumentAttributes[Ai].Kind) { 715 case CodeGenIntrinsic::NoCapture: 716 OS << LS << "Attribute::NoCapture"; 717 break; 718 case CodeGenIntrinsic::NoAlias: 719 OS << LS << "Attribute::NoAlias"; 720 break; 721 case CodeGenIntrinsic::NoUndef: 722 OS << LS << "Attribute::NoUndef"; 723 break; 724 case CodeGenIntrinsic::Returned: 725 OS << LS << "Attribute::Returned"; 726 break; 727 case CodeGenIntrinsic::ReadOnly: 728 OS << LS << "Attribute::ReadOnly"; 729 break; 730 case CodeGenIntrinsic::WriteOnly: 731 OS << LS << "Attribute::WriteOnly"; 732 break; 733 case CodeGenIntrinsic::ReadNone: 734 OS << LS << "Attribute::ReadNone"; 735 break; 736 case CodeGenIntrinsic::ImmArg: 737 OS << LS << "Attribute::ImmArg"; 738 break; 739 case CodeGenIntrinsic::Alignment: 740 OS << LS << "Attribute::Alignment"; 741 break; 742 } 743 uint64_t V = Intrinsic.ArgumentAttributes[Ai].Value; 744 Values.push_back(V); 745 AllValuesAreZero &= (V == 0); 746 747 ++Ai; 748 } while (Ai != Ae && Intrinsic.ArgumentAttributes[Ai].Index == AttrIdx); 749 OS << "};\n"; 750 751 // Generate attribute value array if not all attribute values are zero. 752 if (!AllValuesAreZero) { 753 OS << " const uint64_t AttrValParam" << AttrIdx << "[]= {"; 754 ListSeparator LSV(","); 755 for (const auto V : Values) 756 OS << LSV << V; 757 OS << "};\n"; 758 } 759 760 OS << " AS[" << numAttrs++ << "] = AttributeList::get(C, " 761 << AttrIdx << ", AttrParam" << AttrIdx; 762 if (!AllValuesAreZero) 763 OS << ", AttrValParam" << AttrIdx; 764 OS << ");\n"; 765 } 766 } 767 768 if (!Intrinsic.canThrow || 769 (Intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem && 770 !Intrinsic.hasSideEffects) || 771 Intrinsic.isNoReturn || Intrinsic.isNoCallback || Intrinsic.isNoSync || 772 Intrinsic.isNoFree || Intrinsic.isWillReturn || Intrinsic.isCold || 773 Intrinsic.isNoDuplicate || Intrinsic.isNoMerge || 774 Intrinsic.isConvergent || Intrinsic.isSpeculatable) { 775 OS << " const Attribute::AttrKind Atts[] = {"; 776 ListSeparator LS(","); 777 if (!Intrinsic.canThrow) 778 OS << LS << "Attribute::NoUnwind"; 779 if (Intrinsic.isNoReturn) 780 OS << LS << "Attribute::NoReturn"; 781 if (Intrinsic.isNoCallback) 782 OS << LS << "Attribute::NoCallback"; 783 if (Intrinsic.isNoSync) 784 OS << LS << "Attribute::NoSync"; 785 if (Intrinsic.isNoFree) 786 OS << LS << "Attribute::NoFree"; 787 if (Intrinsic.isWillReturn) 788 OS << LS << "Attribute::WillReturn"; 789 if (Intrinsic.isCold) 790 OS << LS << "Attribute::Cold"; 791 if (Intrinsic.isNoDuplicate) 792 OS << LS << "Attribute::NoDuplicate"; 793 if (Intrinsic.isNoMerge) 794 OS << LS << "Attribute::NoMerge"; 795 if (Intrinsic.isConvergent) 796 OS << LS << "Attribute::Convergent"; 797 if (Intrinsic.isSpeculatable) 798 OS << LS << "Attribute::Speculatable"; 799 800 switch (Intrinsic.ModRef) { 801 case CodeGenIntrinsic::NoMem: 802 if (Intrinsic.hasSideEffects) 803 break; 804 OS << LS; 805 OS << "Attribute::ReadNone"; 806 break; 807 case CodeGenIntrinsic::ReadArgMem: 808 OS << LS; 809 OS << "Attribute::ReadOnly,"; 810 OS << "Attribute::ArgMemOnly"; 811 break; 812 case CodeGenIntrinsic::ReadMem: 813 OS << LS; 814 OS << "Attribute::ReadOnly"; 815 break; 816 case CodeGenIntrinsic::ReadInaccessibleMem: 817 OS << LS; 818 OS << "Attribute::ReadOnly,"; 819 OS << "Attribute::InaccessibleMemOnly"; 820 break; 821 case CodeGenIntrinsic::ReadInaccessibleMemOrArgMem: 822 OS << LS; 823 OS << "Attribute::ReadOnly,"; 824 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 825 break; 826 case CodeGenIntrinsic::WriteArgMem: 827 OS << LS; 828 OS << "Attribute::WriteOnly,"; 829 OS << "Attribute::ArgMemOnly"; 830 break; 831 case CodeGenIntrinsic::WriteMem: 832 OS << LS; 833 OS << "Attribute::WriteOnly"; 834 break; 835 case CodeGenIntrinsic::WriteInaccessibleMem: 836 OS << LS; 837 OS << "Attribute::WriteOnly,"; 838 OS << "Attribute::InaccessibleMemOnly"; 839 break; 840 case CodeGenIntrinsic::WriteInaccessibleMemOrArgMem: 841 OS << LS; 842 OS << "Attribute::WriteOnly,"; 843 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 844 break; 845 case CodeGenIntrinsic::ReadWriteArgMem: 846 OS << LS; 847 OS << "Attribute::ArgMemOnly"; 848 break; 849 case CodeGenIntrinsic::ReadWriteInaccessibleMem: 850 OS << LS; 851 OS << "Attribute::InaccessibleMemOnly"; 852 break; 853 case CodeGenIntrinsic::ReadWriteInaccessibleMemOrArgMem: 854 OS << LS; 855 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 856 break; 857 case CodeGenIntrinsic::ReadWriteMem: 858 break; 859 } 860 OS << "};\n"; 861 OS << " AS[" << numAttrs++ << "] = AttributeList::get(C, " 862 << "AttributeList::FunctionIndex, Atts);\n"; 863 } 864 865 if (numAttrs) { 866 OS << " NumAttrs = " << numAttrs << ";\n"; 867 OS << " break;\n"; 868 OS << " }\n"; 869 } else { 870 OS << " return AttributeList();\n"; 871 OS << " }\n"; 872 } 873 } 874 875 OS << " }\n"; 876 OS << " }\n"; 877 OS << " return AttributeList::get(C, makeArrayRef(AS, NumAttrs));\n"; 878 OS << "}\n"; 879 OS << "#endif // GET_INTRINSIC_ATTRIBUTES\n\n"; 880 } 881 882 void IntrinsicEmitter::EmitIntrinsicToBuiltinMap( 883 const CodeGenIntrinsicTable &Ints, bool IsClang, raw_ostream &OS) { 884 StringRef CompilerName = (IsClang ? "Clang" : "MS"); 885 StringRef UpperCompilerName = (IsClang ? "CLANG" : "MS"); 886 typedef std::map<std::string, std::map<std::string, std::string>> BIMTy; 887 BIMTy BuiltinMap; 888 StringToOffsetTable Table; 889 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 890 const std::string &BuiltinName = 891 IsClang ? Ints[i].ClangBuiltinName : Ints[i].MSBuiltinName; 892 if (!BuiltinName.empty()) { 893 // Get the map for this target prefix. 894 std::map<std::string, std::string> &BIM = 895 BuiltinMap[Ints[i].TargetPrefix]; 896 897 if (!BIM.insert(std::make_pair(BuiltinName, Ints[i].EnumName)).second) 898 PrintFatalError(Ints[i].TheDef->getLoc(), 899 "Intrinsic '" + Ints[i].TheDef->getName() + 900 "': duplicate " + CompilerName + " builtin name!"); 901 Table.GetOrAddStringOffset(BuiltinName); 902 } 903 } 904 905 OS << "// Get the LLVM intrinsic that corresponds to a builtin.\n"; 906 OS << "// This is used by the C front-end. The builtin name is passed\n"; 907 OS << "// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed\n"; 908 OS << "// in as TargetPrefix. The result is assigned to 'IntrinsicID'.\n"; 909 OS << "#ifdef GET_LLVM_INTRINSIC_FOR_" << UpperCompilerName << "_BUILTIN\n"; 910 911 OS << "Intrinsic::ID Intrinsic::getIntrinsicFor" << CompilerName 912 << "Builtin(const char " 913 << "*TargetPrefixStr, StringRef BuiltinNameStr) {\n"; 914 915 if (Table.Empty()) { 916 OS << " return Intrinsic::not_intrinsic;\n"; 917 OS << "}\n"; 918 OS << "#endif\n\n"; 919 return; 920 } 921 922 OS << " static const char BuiltinNames[] = {\n"; 923 Table.EmitCharArray(OS); 924 OS << " };\n\n"; 925 926 OS << " struct BuiltinEntry {\n"; 927 OS << " Intrinsic::ID IntrinID;\n"; 928 OS << " unsigned StrTabOffset;\n"; 929 OS << " const char *getName() const {\n"; 930 OS << " return &BuiltinNames[StrTabOffset];\n"; 931 OS << " }\n"; 932 OS << " bool operator<(StringRef RHS) const {\n"; 933 OS << " return strncmp(getName(), RHS.data(), RHS.size()) < 0;\n"; 934 OS << " }\n"; 935 OS << " };\n"; 936 937 OS << " StringRef TargetPrefix(TargetPrefixStr);\n\n"; 938 939 // Note: this could emit significantly better code if we cared. 940 for (auto &I : BuiltinMap) { 941 OS << " "; 942 if (!I.first.empty()) 943 OS << "if (TargetPrefix == \"" << I.first << "\") "; 944 else 945 OS << "/* Target Independent Builtins */ "; 946 OS << "{\n"; 947 948 // Emit the comparisons for this target prefix. 949 OS << " static const BuiltinEntry " << I.first << "Names[] = {\n"; 950 for (const auto &P : I.second) { 951 OS << " {Intrinsic::" << P.second << ", " 952 << Table.GetOrAddStringOffset(P.first) << "}, // " << P.first << "\n"; 953 } 954 OS << " };\n"; 955 OS << " auto I = std::lower_bound(std::begin(" << I.first << "Names),\n"; 956 OS << " std::end(" << I.first << "Names),\n"; 957 OS << " BuiltinNameStr);\n"; 958 OS << " if (I != std::end(" << I.first << "Names) &&\n"; 959 OS << " I->getName() == BuiltinNameStr)\n"; 960 OS << " return I->IntrinID;\n"; 961 OS << " }\n"; 962 } 963 OS << " return "; 964 OS << "Intrinsic::not_intrinsic;\n"; 965 OS << "}\n"; 966 OS << "#endif\n\n"; 967 } 968 969 void llvm::EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS) { 970 IntrinsicEmitter(RK).run(OS, /*Enums=*/true); 971 } 972 973 void llvm::EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS) { 974 IntrinsicEmitter(RK).run(OS, /*Enums=*/false); 975 } 976