1 //===- IntrinsicEmitter.cpp - Generate intrinsic information --------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This tablegen backend emits information about intrinsic functions. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "CodeGenIntrinsics.h" 14 #include "CodeGenTarget.h" 15 #include "SequenceToOffsetTable.h" 16 #include "TableGenBackends.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/Support/CommandLine.h" 19 #include "llvm/TableGen/Error.h" 20 #include "llvm/TableGen/Record.h" 21 #include "llvm/TableGen/StringMatcher.h" 22 #include "llvm/TableGen/StringToOffsetTable.h" 23 #include "llvm/TableGen/TableGenBackend.h" 24 #include <algorithm> 25 using namespace llvm; 26 27 cl::OptionCategory GenIntrinsicCat("Options for -gen-intrinsic-enums"); 28 cl::opt<std::string> 29 IntrinsicPrefix("intrinsic-prefix", 30 cl::desc("Generate intrinsics with this target prefix"), 31 cl::value_desc("target prefix"), cl::cat(GenIntrinsicCat)); 32 33 namespace { 34 class IntrinsicEmitter { 35 RecordKeeper &Records; 36 37 public: 38 IntrinsicEmitter(RecordKeeper &R) : Records(R) {} 39 40 void run(raw_ostream &OS, bool Enums); 41 42 void EmitEnumInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 43 void EmitTargetInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 44 void EmitIntrinsicToNameTable(const CodeGenIntrinsicTable &Ints, 45 raw_ostream &OS); 46 void EmitIntrinsicToOverloadTable(const CodeGenIntrinsicTable &Ints, 47 raw_ostream &OS); 48 void EmitGenerator(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 49 void EmitAttributes(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 50 void EmitIntrinsicToBuiltinMap(const CodeGenIntrinsicTable &Ints, bool IsGCC, 51 raw_ostream &OS); 52 }; 53 } // End anonymous namespace 54 55 //===----------------------------------------------------------------------===// 56 // IntrinsicEmitter Implementation 57 //===----------------------------------------------------------------------===// 58 59 void IntrinsicEmitter::run(raw_ostream &OS, bool Enums) { 60 emitSourceFileHeader("Intrinsic Function Source Fragment", OS); 61 62 CodeGenIntrinsicTable Ints(Records); 63 64 if (Enums) { 65 // Emit the enum information. 66 EmitEnumInfo(Ints, OS); 67 } else { 68 // Emit the target metadata. 69 EmitTargetInfo(Ints, OS); 70 71 // Emit the intrinsic ID -> name table. 72 EmitIntrinsicToNameTable(Ints, OS); 73 74 // Emit the intrinsic ID -> overload table. 75 EmitIntrinsicToOverloadTable(Ints, OS); 76 77 // Emit the intrinsic declaration generator. 78 EmitGenerator(Ints, OS); 79 80 // Emit the intrinsic parameter attributes. 81 EmitAttributes(Ints, OS); 82 83 // Emit code to translate GCC builtins into LLVM intrinsics. 84 EmitIntrinsicToBuiltinMap(Ints, true, OS); 85 86 // Emit code to translate MS builtins into LLVM intrinsics. 87 EmitIntrinsicToBuiltinMap(Ints, false, OS); 88 } 89 } 90 91 void IntrinsicEmitter::EmitEnumInfo(const CodeGenIntrinsicTable &Ints, 92 raw_ostream &OS) { 93 // Find the TargetSet for which to generate enums. There will be an initial 94 // set with an empty target prefix which will include target independent 95 // intrinsics like dbg.value. 96 const CodeGenIntrinsicTable::TargetSet *Set = nullptr; 97 for (const auto &Target : Ints.Targets) { 98 if (Target.Name == IntrinsicPrefix) { 99 Set = &Target; 100 break; 101 } 102 } 103 if (!Set) { 104 std::vector<std::string> KnownTargets; 105 for (const auto &Target : Ints.Targets) 106 if (!Target.Name.empty()) 107 KnownTargets.push_back(Target.Name); 108 PrintFatalError("tried to generate intrinsics for unknown target " + 109 IntrinsicPrefix + 110 "\nKnown targets are: " + join(KnownTargets, ", ") + "\n"); 111 } 112 113 // Generate a complete header for target specific intrinsics. 114 if (!IntrinsicPrefix.empty()) { 115 std::string UpperPrefix = StringRef(IntrinsicPrefix).upper(); 116 OS << "#ifndef LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n"; 117 OS << "#define LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n\n"; 118 OS << "namespace llvm {\n"; 119 OS << "namespace Intrinsic {\n"; 120 OS << "enum " << UpperPrefix << "Intrinsics : unsigned {\n"; 121 } 122 123 OS << "// Enum values for intrinsics\n"; 124 for (unsigned i = Set->Offset, e = Set->Offset + Set->Count; i != e; ++i) { 125 OS << " " << Ints[i].EnumName; 126 127 // Assign a value to the first intrinsic in this target set so that all 128 // intrinsic ids are distinct. 129 if (i == Set->Offset) 130 OS << " = " << (Set->Offset + 1); 131 132 OS << ", "; 133 if (Ints[i].EnumName.size() < 40) 134 OS.indent(40 - Ints[i].EnumName.size()); 135 OS << " // " << Ints[i].Name << "\n"; 136 } 137 138 // Emit num_intrinsics into the target neutral enum. 139 if (IntrinsicPrefix.empty()) { 140 OS << " num_intrinsics = " << (Ints.size() + 1) << "\n"; 141 } else { 142 OS << "}; // enum\n"; 143 OS << "} // namespace Intrinsic\n"; 144 OS << "} // namespace llvm\n\n"; 145 OS << "#endif\n"; 146 } 147 } 148 149 void IntrinsicEmitter::EmitTargetInfo(const CodeGenIntrinsicTable &Ints, 150 raw_ostream &OS) { 151 OS << "// Target mapping\n"; 152 OS << "#ifdef GET_INTRINSIC_TARGET_DATA\n"; 153 OS << "struct IntrinsicTargetInfo {\n" 154 << " llvm::StringLiteral Name;\n" 155 << " size_t Offset;\n" 156 << " size_t Count;\n" 157 << "};\n"; 158 OS << "static constexpr IntrinsicTargetInfo TargetInfos[] = {\n"; 159 for (auto Target : Ints.Targets) 160 OS << " {llvm::StringLiteral(\"" << Target.Name << "\"), " << Target.Offset 161 << ", " << Target.Count << "},\n"; 162 OS << "};\n"; 163 OS << "#endif\n\n"; 164 } 165 166 void IntrinsicEmitter::EmitIntrinsicToNameTable( 167 const CodeGenIntrinsicTable &Ints, raw_ostream &OS) { 168 OS << "// Intrinsic ID to name table\n"; 169 OS << "#ifdef GET_INTRINSIC_NAME_TABLE\n"; 170 OS << " // Note that entry #0 is the invalid intrinsic!\n"; 171 for (unsigned i = 0, e = Ints.size(); i != e; ++i) 172 OS << " \"" << Ints[i].Name << "\",\n"; 173 OS << "#endif\n\n"; 174 } 175 176 void IntrinsicEmitter::EmitIntrinsicToOverloadTable( 177 const CodeGenIntrinsicTable &Ints, raw_ostream &OS) { 178 OS << "// Intrinsic ID to overload bitset\n"; 179 OS << "#ifdef GET_INTRINSIC_OVERLOAD_TABLE\n"; 180 OS << "static const uint8_t OTable[] = {\n"; 181 OS << " 0"; 182 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 183 // Add one to the index so we emit a null bit for the invalid #0 intrinsic. 184 if ((i+1)%8 == 0) 185 OS << ",\n 0"; 186 if (Ints[i].isOverloaded) 187 OS << " | (1<<" << (i+1)%8 << ')'; 188 } 189 OS << "\n};\n\n"; 190 // OTable contains a true bit at the position if the intrinsic is overloaded. 191 OS << "return (OTable[id/8] & (1 << (id%8))) != 0;\n"; 192 OS << "#endif\n\n"; 193 } 194 195 196 // NOTE: This must be kept in synch with the copy in lib/IR/Function.cpp! 197 enum IIT_Info { 198 // Common values should be encoded with 0-15. 199 IIT_Done = 0, 200 IIT_I1 = 1, 201 IIT_I8 = 2, 202 IIT_I16 = 3, 203 IIT_I32 = 4, 204 IIT_I64 = 5, 205 IIT_F16 = 6, 206 IIT_F32 = 7, 207 IIT_F64 = 8, 208 IIT_V2 = 9, 209 IIT_V4 = 10, 210 IIT_V8 = 11, 211 IIT_V16 = 12, 212 IIT_V32 = 13, 213 IIT_PTR = 14, 214 IIT_ARG = 15, 215 216 // Values from 16+ are only encodable with the inefficient encoding. 217 IIT_V64 = 16, 218 IIT_MMX = 17, 219 IIT_TOKEN = 18, 220 IIT_METADATA = 19, 221 IIT_EMPTYSTRUCT = 20, 222 IIT_STRUCT2 = 21, 223 IIT_STRUCT3 = 22, 224 IIT_STRUCT4 = 23, 225 IIT_STRUCT5 = 24, 226 IIT_EXTEND_ARG = 25, 227 IIT_TRUNC_ARG = 26, 228 IIT_ANYPTR = 27, 229 IIT_V1 = 28, 230 IIT_VARARG = 29, 231 IIT_HALF_VEC_ARG = 30, 232 IIT_SAME_VEC_WIDTH_ARG = 31, 233 IIT_PTR_TO_ARG = 32, 234 IIT_PTR_TO_ELT = 33, 235 IIT_VEC_OF_ANYPTRS_TO_ELT = 34, 236 IIT_I128 = 35, 237 IIT_V512 = 36, 238 IIT_V1024 = 37, 239 IIT_STRUCT6 = 38, 240 IIT_STRUCT7 = 39, 241 IIT_STRUCT8 = 40, 242 IIT_F128 = 41, 243 IIT_VEC_ELEMENT = 42, 244 IIT_SCALABLE_VEC = 43, 245 IIT_SUBDIVIDE2_ARG = 44, 246 IIT_SUBDIVIDE4_ARG = 45, 247 IIT_VEC_OF_BITCASTS_TO_INT = 46, 248 IIT_V128 = 47, 249 IIT_BF16 = 48, 250 IIT_STRUCT9 = 49, 251 IIT_V256 = 50, 252 IIT_AMX = 51 253 }; 254 255 static void EncodeFixedValueType(MVT::SimpleValueType VT, 256 std::vector<unsigned char> &Sig) { 257 if (MVT(VT).isInteger()) { 258 unsigned BitWidth = MVT(VT).getFixedSizeInBits(); 259 switch (BitWidth) { 260 default: PrintFatalError("unhandled integer type width in intrinsic!"); 261 case 1: return Sig.push_back(IIT_I1); 262 case 8: return Sig.push_back(IIT_I8); 263 case 16: return Sig.push_back(IIT_I16); 264 case 32: return Sig.push_back(IIT_I32); 265 case 64: return Sig.push_back(IIT_I64); 266 case 128: return Sig.push_back(IIT_I128); 267 } 268 } 269 270 switch (VT) { 271 default: PrintFatalError("unhandled MVT in intrinsic!"); 272 case MVT::f16: return Sig.push_back(IIT_F16); 273 case MVT::bf16: return Sig.push_back(IIT_BF16); 274 case MVT::f32: return Sig.push_back(IIT_F32); 275 case MVT::f64: return Sig.push_back(IIT_F64); 276 case MVT::f128: return Sig.push_back(IIT_F128); 277 case MVT::token: return Sig.push_back(IIT_TOKEN); 278 case MVT::Metadata: return Sig.push_back(IIT_METADATA); 279 case MVT::x86mmx: return Sig.push_back(IIT_MMX); 280 case MVT::x86amx: return Sig.push_back(IIT_AMX); 281 // MVT::OtherVT is used to mean the empty struct type here. 282 case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT); 283 // MVT::isVoid is used to represent varargs here. 284 case MVT::isVoid: return Sig.push_back(IIT_VARARG); 285 } 286 } 287 288 #if defined(_MSC_VER) && !defined(__clang__) 289 #pragma optimize("",off) // MSVC 2015 optimizer can't deal with this function. 290 #endif 291 292 static void EncodeFixedType(Record *R, std::vector<unsigned char> &ArgCodes, 293 unsigned &NextArgCode, 294 std::vector<unsigned char> &Sig, 295 ArrayRef<unsigned char> Mapping) { 296 297 if (R->isSubClassOf("LLVMMatchType")) { 298 unsigned Number = Mapping[R->getValueAsInt("Number")]; 299 assert(Number < ArgCodes.size() && "Invalid matching number!"); 300 if (R->isSubClassOf("LLVMExtendedType")) 301 Sig.push_back(IIT_EXTEND_ARG); 302 else if (R->isSubClassOf("LLVMTruncatedType")) 303 Sig.push_back(IIT_TRUNC_ARG); 304 else if (R->isSubClassOf("LLVMHalfElementsVectorType")) 305 Sig.push_back(IIT_HALF_VEC_ARG); 306 else if (R->isSubClassOf("LLVMScalarOrSameVectorWidth")) { 307 Sig.push_back(IIT_SAME_VEC_WIDTH_ARG); 308 Sig.push_back((Number << 3) | ArgCodes[Number]); 309 MVT::SimpleValueType VT = getValueType(R->getValueAsDef("ElTy")); 310 EncodeFixedValueType(VT, Sig); 311 return; 312 } 313 else if (R->isSubClassOf("LLVMPointerTo")) 314 Sig.push_back(IIT_PTR_TO_ARG); 315 else if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) { 316 Sig.push_back(IIT_VEC_OF_ANYPTRS_TO_ELT); 317 // Encode overloaded ArgNo 318 Sig.push_back(NextArgCode++); 319 // Encode LLVMMatchType<Number> ArgNo 320 Sig.push_back(Number); 321 return; 322 } else if (R->isSubClassOf("LLVMPointerToElt")) 323 Sig.push_back(IIT_PTR_TO_ELT); 324 else if (R->isSubClassOf("LLVMVectorElementType")) 325 Sig.push_back(IIT_VEC_ELEMENT); 326 else if (R->isSubClassOf("LLVMSubdivide2VectorType")) 327 Sig.push_back(IIT_SUBDIVIDE2_ARG); 328 else if (R->isSubClassOf("LLVMSubdivide4VectorType")) 329 Sig.push_back(IIT_SUBDIVIDE4_ARG); 330 else if (R->isSubClassOf("LLVMVectorOfBitcastsToInt")) 331 Sig.push_back(IIT_VEC_OF_BITCASTS_TO_INT); 332 else 333 Sig.push_back(IIT_ARG); 334 return Sig.push_back((Number << 3) | 7 /*IITDescriptor::AK_MatchType*/); 335 } 336 337 MVT::SimpleValueType VT = getValueType(R->getValueAsDef("VT")); 338 339 unsigned Tmp = 0; 340 switch (VT) { 341 default: break; 342 case MVT::iPTRAny: ++Tmp; LLVM_FALLTHROUGH; 343 case MVT::vAny: ++Tmp; LLVM_FALLTHROUGH; 344 case MVT::fAny: ++Tmp; LLVM_FALLTHROUGH; 345 case MVT::iAny: ++Tmp; LLVM_FALLTHROUGH; 346 case MVT::Any: { 347 // If this is an "any" valuetype, then the type is the type of the next 348 // type in the list specified to getIntrinsic(). 349 Sig.push_back(IIT_ARG); 350 351 // Figure out what arg # this is consuming, and remember what kind it was. 352 assert(NextArgCode < ArgCodes.size() && ArgCodes[NextArgCode] == Tmp && 353 "Invalid or no ArgCode associated with overloaded VT!"); 354 unsigned ArgNo = NextArgCode++; 355 356 // Encode what sort of argument it must be in the low 3 bits of the ArgNo. 357 return Sig.push_back((ArgNo << 3) | Tmp); 358 } 359 360 case MVT::iPTR: { 361 unsigned AddrSpace = 0; 362 if (R->isSubClassOf("LLVMQualPointerType")) { 363 AddrSpace = R->getValueAsInt("AddrSpace"); 364 assert(AddrSpace < 256 && "Address space exceeds 255"); 365 } 366 if (AddrSpace) { 367 Sig.push_back(IIT_ANYPTR); 368 Sig.push_back(AddrSpace); 369 } else { 370 Sig.push_back(IIT_PTR); 371 } 372 return EncodeFixedType(R->getValueAsDef("ElTy"), ArgCodes, NextArgCode, Sig, 373 Mapping); 374 } 375 } 376 377 if (MVT(VT).isVector()) { 378 MVT VVT = VT; 379 if (VVT.isScalableVector()) 380 Sig.push_back(IIT_SCALABLE_VEC); 381 switch (VVT.getVectorNumElements()) { 382 default: PrintFatalError("unhandled vector type width in intrinsic!"); 383 case 1: Sig.push_back(IIT_V1); break; 384 case 2: Sig.push_back(IIT_V2); break; 385 case 4: Sig.push_back(IIT_V4); break; 386 case 8: Sig.push_back(IIT_V8); break; 387 case 16: Sig.push_back(IIT_V16); break; 388 case 32: Sig.push_back(IIT_V32); break; 389 case 64: Sig.push_back(IIT_V64); break; 390 case 128: Sig.push_back(IIT_V128); break; 391 case 256: Sig.push_back(IIT_V256); break; 392 case 512: Sig.push_back(IIT_V512); break; 393 case 1024: Sig.push_back(IIT_V1024); break; 394 } 395 396 return EncodeFixedValueType(VVT.getVectorElementType().SimpleTy, Sig); 397 } 398 399 EncodeFixedValueType(VT, Sig); 400 } 401 402 static void UpdateArgCodes(Record *R, std::vector<unsigned char> &ArgCodes, 403 unsigned int &NumInserted, 404 SmallVectorImpl<unsigned char> &Mapping) { 405 if (R->isSubClassOf("LLVMMatchType")) { 406 if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) { 407 ArgCodes.push_back(3 /*vAny*/); 408 ++NumInserted; 409 } 410 return; 411 } 412 413 unsigned Tmp = 0; 414 switch (getValueType(R->getValueAsDef("VT"))) { 415 default: break; 416 case MVT::iPTR: 417 UpdateArgCodes(R->getValueAsDef("ElTy"), ArgCodes, NumInserted, Mapping); 418 break; 419 case MVT::iPTRAny: 420 ++Tmp; 421 LLVM_FALLTHROUGH; 422 case MVT::vAny: 423 ++Tmp; 424 LLVM_FALLTHROUGH; 425 case MVT::fAny: 426 ++Tmp; 427 LLVM_FALLTHROUGH; 428 case MVT::iAny: 429 ++Tmp; 430 LLVM_FALLTHROUGH; 431 case MVT::Any: 432 unsigned OriginalIdx = ArgCodes.size() - NumInserted; 433 assert(OriginalIdx >= Mapping.size()); 434 Mapping.resize(OriginalIdx+1); 435 Mapping[OriginalIdx] = ArgCodes.size(); 436 ArgCodes.push_back(Tmp); 437 break; 438 } 439 } 440 441 #if defined(_MSC_VER) && !defined(__clang__) 442 #pragma optimize("",on) 443 #endif 444 445 /// ComputeFixedEncoding - If we can encode the type signature for this 446 /// intrinsic into 32 bits, return it. If not, return ~0U. 447 static void ComputeFixedEncoding(const CodeGenIntrinsic &Int, 448 std::vector<unsigned char> &TypeSig) { 449 std::vector<unsigned char> ArgCodes; 450 451 // Add codes for any overloaded result VTs. 452 unsigned int NumInserted = 0; 453 SmallVector<unsigned char, 8> ArgMapping; 454 for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i) 455 UpdateArgCodes(Int.IS.RetTypeDefs[i], ArgCodes, NumInserted, ArgMapping); 456 457 // Add codes for any overloaded operand VTs. 458 for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i) 459 UpdateArgCodes(Int.IS.ParamTypeDefs[i], ArgCodes, NumInserted, ArgMapping); 460 461 unsigned NextArgCode = 0; 462 if (Int.IS.RetVTs.empty()) 463 TypeSig.push_back(IIT_Done); 464 else if (Int.IS.RetVTs.size() == 1 && 465 Int.IS.RetVTs[0] == MVT::isVoid) 466 TypeSig.push_back(IIT_Done); 467 else { 468 switch (Int.IS.RetVTs.size()) { 469 case 1: break; 470 case 2: TypeSig.push_back(IIT_STRUCT2); break; 471 case 3: TypeSig.push_back(IIT_STRUCT3); break; 472 case 4: TypeSig.push_back(IIT_STRUCT4); break; 473 case 5: TypeSig.push_back(IIT_STRUCT5); break; 474 case 6: TypeSig.push_back(IIT_STRUCT6); break; 475 case 7: TypeSig.push_back(IIT_STRUCT7); break; 476 case 8: TypeSig.push_back(IIT_STRUCT8); break; 477 case 9: TypeSig.push_back(IIT_STRUCT9); break; 478 default: llvm_unreachable("Unhandled case in struct"); 479 } 480 481 for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i) 482 EncodeFixedType(Int.IS.RetTypeDefs[i], ArgCodes, NextArgCode, TypeSig, 483 ArgMapping); 484 } 485 486 for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i) 487 EncodeFixedType(Int.IS.ParamTypeDefs[i], ArgCodes, NextArgCode, TypeSig, 488 ArgMapping); 489 } 490 491 static void printIITEntry(raw_ostream &OS, unsigned char X) { 492 OS << (unsigned)X; 493 } 494 495 void IntrinsicEmitter::EmitGenerator(const CodeGenIntrinsicTable &Ints, 496 raw_ostream &OS) { 497 // If we can compute a 32-bit fixed encoding for this intrinsic, do so and 498 // capture it in this vector, otherwise store a ~0U. 499 std::vector<unsigned> FixedEncodings; 500 501 SequenceToOffsetTable<std::vector<unsigned char> > LongEncodingTable; 502 503 std::vector<unsigned char> TypeSig; 504 505 // Compute the unique argument type info. 506 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 507 // Get the signature for the intrinsic. 508 TypeSig.clear(); 509 ComputeFixedEncoding(Ints[i], TypeSig); 510 511 // Check to see if we can encode it into a 32-bit word. We can only encode 512 // 8 nibbles into a 32-bit word. 513 if (TypeSig.size() <= 8) { 514 bool Failed = false; 515 unsigned Result = 0; 516 for (unsigned i = 0, e = TypeSig.size(); i != e; ++i) { 517 // If we had an unencodable argument, bail out. 518 if (TypeSig[i] > 15) { 519 Failed = true; 520 break; 521 } 522 Result = (Result << 4) | TypeSig[e-i-1]; 523 } 524 525 // If this could be encoded into a 31-bit word, return it. 526 if (!Failed && (Result >> 31) == 0) { 527 FixedEncodings.push_back(Result); 528 continue; 529 } 530 } 531 532 // Otherwise, we're going to unique the sequence into the 533 // LongEncodingTable, and use its offset in the 32-bit table instead. 534 LongEncodingTable.add(TypeSig); 535 536 // This is a placehold that we'll replace after the table is laid out. 537 FixedEncodings.push_back(~0U); 538 } 539 540 LongEncodingTable.layout(); 541 542 OS << "// Global intrinsic function declaration type table.\n"; 543 OS << "#ifdef GET_INTRINSIC_GENERATOR_GLOBAL\n"; 544 545 OS << "static const unsigned IIT_Table[] = {\n "; 546 547 for (unsigned i = 0, e = FixedEncodings.size(); i != e; ++i) { 548 if ((i & 7) == 7) 549 OS << "\n "; 550 551 // If the entry fit in the table, just emit it. 552 if (FixedEncodings[i] != ~0U) { 553 OS << "0x" << Twine::utohexstr(FixedEncodings[i]) << ", "; 554 continue; 555 } 556 557 TypeSig.clear(); 558 ComputeFixedEncoding(Ints[i], TypeSig); 559 560 561 // Otherwise, emit the offset into the long encoding table. We emit it this 562 // way so that it is easier to read the offset in the .def file. 563 OS << "(1U<<31) | " << LongEncodingTable.get(TypeSig) << ", "; 564 } 565 566 OS << "0\n};\n\n"; 567 568 // Emit the shared table of register lists. 569 OS << "static const unsigned char IIT_LongEncodingTable[] = {\n"; 570 if (!LongEncodingTable.empty()) 571 LongEncodingTable.emit(OS, printIITEntry); 572 OS << " 255\n};\n\n"; 573 574 OS << "#endif\n\n"; // End of GET_INTRINSIC_GENERATOR_GLOBAL 575 } 576 577 namespace { 578 struct AttributeComparator { 579 bool operator()(const CodeGenIntrinsic *L, const CodeGenIntrinsic *R) const { 580 // Sort throwing intrinsics after non-throwing intrinsics. 581 if (L->canThrow != R->canThrow) 582 return R->canThrow; 583 584 if (L->isNoDuplicate != R->isNoDuplicate) 585 return R->isNoDuplicate; 586 587 if (L->isNoReturn != R->isNoReturn) 588 return R->isNoReturn; 589 590 if (L->isNoSync != R->isNoSync) 591 return R->isNoSync; 592 593 if (L->isNoFree != R->isNoFree) 594 return R->isNoFree; 595 596 if (L->isWillReturn != R->isWillReturn) 597 return R->isWillReturn; 598 599 if (L->isCold != R->isCold) 600 return R->isCold; 601 602 if (L->isConvergent != R->isConvergent) 603 return R->isConvergent; 604 605 if (L->isSpeculatable != R->isSpeculatable) 606 return R->isSpeculatable; 607 608 if (L->hasSideEffects != R->hasSideEffects) 609 return R->hasSideEffects; 610 611 // Try to order by readonly/readnone attribute. 612 CodeGenIntrinsic::ModRefBehavior LK = L->ModRef; 613 CodeGenIntrinsic::ModRefBehavior RK = R->ModRef; 614 if (LK != RK) return (LK > RK); 615 // Order by argument attributes. 616 // This is reliable because each side is already sorted internally. 617 return (L->ArgumentAttributes < R->ArgumentAttributes); 618 } 619 }; 620 } // End anonymous namespace 621 622 /// EmitAttributes - This emits the Intrinsic::getAttributes method. 623 void IntrinsicEmitter::EmitAttributes(const CodeGenIntrinsicTable &Ints, 624 raw_ostream &OS) { 625 OS << "// Add parameter attributes that are not common to all intrinsics.\n"; 626 OS << "#ifdef GET_INTRINSIC_ATTRIBUTES\n"; 627 OS << "AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {\n"; 628 629 // Compute the maximum number of attribute arguments and the map 630 typedef std::map<const CodeGenIntrinsic*, unsigned, 631 AttributeComparator> UniqAttrMapTy; 632 UniqAttrMapTy UniqAttributes; 633 unsigned maxArgAttrs = 0; 634 unsigned AttrNum = 0; 635 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 636 const CodeGenIntrinsic &intrinsic = Ints[i]; 637 maxArgAttrs = 638 std::max(maxArgAttrs, unsigned(intrinsic.ArgumentAttributes.size())); 639 unsigned &N = UniqAttributes[&intrinsic]; 640 if (N) continue; 641 N = ++AttrNum; 642 assert(N < 65536 && "Too many unique attributes for table!"); 643 } 644 645 // Emit an array of AttributeList. Most intrinsics will have at least one 646 // entry, for the function itself (index ~1), which is usually nounwind. 647 OS << " static const uint16_t IntrinsicsToAttributesMap[] = {\n"; 648 649 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 650 const CodeGenIntrinsic &intrinsic = Ints[i]; 651 652 OS << " " << UniqAttributes[&intrinsic] << ", // " 653 << intrinsic.Name << "\n"; 654 } 655 OS << " };\n\n"; 656 657 OS << " AttributeList AS[" << maxArgAttrs + 1 << "];\n"; 658 OS << " unsigned NumAttrs = 0;\n"; 659 OS << " if (id != 0) {\n"; 660 OS << " switch(IntrinsicsToAttributesMap[id - 1]) {\n"; 661 OS << " default: llvm_unreachable(\"Invalid attribute number\");\n"; 662 for (UniqAttrMapTy::const_iterator I = UniqAttributes.begin(), 663 E = UniqAttributes.end(); I != E; ++I) { 664 OS << " case " << I->second << ": {\n"; 665 666 const CodeGenIntrinsic &intrinsic = *(I->first); 667 668 // Keep track of the number of attributes we're writing out. 669 unsigned numAttrs = 0; 670 671 // The argument attributes are alreadys sorted by argument index. 672 unsigned ai = 0, ae = intrinsic.ArgumentAttributes.size(); 673 if (ae) { 674 while (ai != ae) { 675 unsigned attrIdx = intrinsic.ArgumentAttributes[ai].Index; 676 677 OS << " const Attribute::AttrKind AttrParam" << attrIdx << "[]= {"; 678 bool addComma = false; 679 680 bool AllValuesAreZero = true; 681 SmallVector<uint64_t, 8> Values; 682 do { 683 switch (intrinsic.ArgumentAttributes[ai].Kind) { 684 case CodeGenIntrinsic::NoCapture: 685 if (addComma) 686 OS << ","; 687 OS << "Attribute::NoCapture"; 688 addComma = true; 689 break; 690 case CodeGenIntrinsic::NoAlias: 691 if (addComma) 692 OS << ","; 693 OS << "Attribute::NoAlias"; 694 addComma = true; 695 break; 696 case CodeGenIntrinsic::NoUndef: 697 if (addComma) 698 OS << ","; 699 OS << "Attribute::NoUndef"; 700 addComma = true; 701 break; 702 case CodeGenIntrinsic::Returned: 703 if (addComma) 704 OS << ","; 705 OS << "Attribute::Returned"; 706 addComma = true; 707 break; 708 case CodeGenIntrinsic::ReadOnly: 709 if (addComma) 710 OS << ","; 711 OS << "Attribute::ReadOnly"; 712 addComma = true; 713 break; 714 case CodeGenIntrinsic::WriteOnly: 715 if (addComma) 716 OS << ","; 717 OS << "Attribute::WriteOnly"; 718 addComma = true; 719 break; 720 case CodeGenIntrinsic::ReadNone: 721 if (addComma) 722 OS << ","; 723 OS << "Attribute::ReadNone"; 724 addComma = true; 725 break; 726 case CodeGenIntrinsic::ImmArg: 727 if (addComma) 728 OS << ','; 729 OS << "Attribute::ImmArg"; 730 addComma = true; 731 break; 732 case CodeGenIntrinsic::Alignment: 733 if (addComma) 734 OS << ','; 735 OS << "Attribute::Alignment"; 736 addComma = true; 737 break; 738 } 739 uint64_t V = intrinsic.ArgumentAttributes[ai].Value; 740 Values.push_back(V); 741 AllValuesAreZero &= (V == 0); 742 743 ++ai; 744 } while (ai != ae && intrinsic.ArgumentAttributes[ai].Index == attrIdx); 745 OS << "};\n"; 746 747 // Generate attribute value array if not all attribute values are zero. 748 if (!AllValuesAreZero) { 749 OS << " const uint64_t AttrValParam" << attrIdx << "[]= {"; 750 addComma = false; 751 for (const auto V : Values) { 752 if (addComma) 753 OS << ','; 754 OS << V; 755 addComma = true; 756 } 757 OS << "};\n"; 758 } 759 760 OS << " AS[" << numAttrs++ << "] = AttributeList::get(C, " 761 << attrIdx << ", AttrParam" << attrIdx; 762 if (!AllValuesAreZero) 763 OS << ", AttrValParam" << attrIdx; 764 OS << ");\n"; 765 } 766 } 767 768 if (!intrinsic.canThrow || 769 (intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem && 770 !intrinsic.hasSideEffects) || 771 intrinsic.isNoReturn || intrinsic.isNoSync || intrinsic.isNoFree || 772 intrinsic.isWillReturn || intrinsic.isCold || intrinsic.isNoDuplicate || 773 intrinsic.isConvergent || intrinsic.isSpeculatable) { 774 OS << " const Attribute::AttrKind Atts[] = {"; 775 bool addComma = false; 776 if (!intrinsic.canThrow) { 777 OS << "Attribute::NoUnwind"; 778 addComma = true; 779 } 780 if (intrinsic.isNoReturn) { 781 if (addComma) 782 OS << ","; 783 OS << "Attribute::NoReturn"; 784 addComma = true; 785 } 786 if (intrinsic.isNoSync) { 787 if (addComma) 788 OS << ","; 789 OS << "Attribute::NoSync"; 790 addComma = true; 791 } 792 if (intrinsic.isNoFree) { 793 if (addComma) 794 OS << ","; 795 OS << "Attribute::NoFree"; 796 addComma = true; 797 } 798 if (intrinsic.isWillReturn) { 799 if (addComma) 800 OS << ","; 801 OS << "Attribute::WillReturn"; 802 addComma = true; 803 } 804 if (intrinsic.isCold) { 805 if (addComma) 806 OS << ","; 807 OS << "Attribute::Cold"; 808 addComma = true; 809 } 810 if (intrinsic.isNoDuplicate) { 811 if (addComma) 812 OS << ","; 813 OS << "Attribute::NoDuplicate"; 814 addComma = true; 815 } 816 if (intrinsic.isConvergent) { 817 if (addComma) 818 OS << ","; 819 OS << "Attribute::Convergent"; 820 addComma = true; 821 } 822 if (intrinsic.isSpeculatable) { 823 if (addComma) 824 OS << ","; 825 OS << "Attribute::Speculatable"; 826 addComma = true; 827 } 828 829 switch (intrinsic.ModRef) { 830 case CodeGenIntrinsic::NoMem: 831 if (intrinsic.hasSideEffects) 832 break; 833 if (addComma) 834 OS << ","; 835 OS << "Attribute::ReadNone"; 836 break; 837 case CodeGenIntrinsic::ReadArgMem: 838 if (addComma) 839 OS << ","; 840 OS << "Attribute::ReadOnly,"; 841 OS << "Attribute::ArgMemOnly"; 842 break; 843 case CodeGenIntrinsic::ReadMem: 844 if (addComma) 845 OS << ","; 846 OS << "Attribute::ReadOnly"; 847 break; 848 case CodeGenIntrinsic::ReadInaccessibleMem: 849 if (addComma) 850 OS << ","; 851 OS << "Attribute::ReadOnly,"; 852 OS << "Attribute::InaccessibleMemOnly"; 853 break; 854 case CodeGenIntrinsic::ReadInaccessibleMemOrArgMem: 855 if (addComma) 856 OS << ","; 857 OS << "Attribute::ReadOnly,"; 858 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 859 break; 860 case CodeGenIntrinsic::WriteArgMem: 861 if (addComma) 862 OS << ","; 863 OS << "Attribute::WriteOnly,"; 864 OS << "Attribute::ArgMemOnly"; 865 break; 866 case CodeGenIntrinsic::WriteMem: 867 if (addComma) 868 OS << ","; 869 OS << "Attribute::WriteOnly"; 870 break; 871 case CodeGenIntrinsic::WriteInaccessibleMem: 872 if (addComma) 873 OS << ","; 874 OS << "Attribute::WriteOnly,"; 875 OS << "Attribute::InaccessibleMemOnly"; 876 break; 877 case CodeGenIntrinsic::WriteInaccessibleMemOrArgMem: 878 if (addComma) 879 OS << ","; 880 OS << "Attribute::WriteOnly,"; 881 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 882 break; 883 case CodeGenIntrinsic::ReadWriteArgMem: 884 if (addComma) 885 OS << ","; 886 OS << "Attribute::ArgMemOnly"; 887 break; 888 case CodeGenIntrinsic::ReadWriteInaccessibleMem: 889 if (addComma) 890 OS << ","; 891 OS << "Attribute::InaccessibleMemOnly"; 892 break; 893 case CodeGenIntrinsic::ReadWriteInaccessibleMemOrArgMem: 894 if (addComma) 895 OS << ","; 896 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 897 break; 898 case CodeGenIntrinsic::ReadWriteMem: 899 break; 900 } 901 OS << "};\n"; 902 OS << " AS[" << numAttrs++ << "] = AttributeList::get(C, " 903 << "AttributeList::FunctionIndex, Atts);\n"; 904 } 905 906 if (numAttrs) { 907 OS << " NumAttrs = " << numAttrs << ";\n"; 908 OS << " break;\n"; 909 OS << " }\n"; 910 } else { 911 OS << " return AttributeList();\n"; 912 OS << " }\n"; 913 } 914 } 915 916 OS << " }\n"; 917 OS << " }\n"; 918 OS << " return AttributeList::get(C, makeArrayRef(AS, NumAttrs));\n"; 919 OS << "}\n"; 920 OS << "#endif // GET_INTRINSIC_ATTRIBUTES\n\n"; 921 } 922 923 void IntrinsicEmitter::EmitIntrinsicToBuiltinMap( 924 const CodeGenIntrinsicTable &Ints, bool IsGCC, raw_ostream &OS) { 925 StringRef CompilerName = (IsGCC ? "GCC" : "MS"); 926 typedef std::map<std::string, std::map<std::string, std::string>> BIMTy; 927 BIMTy BuiltinMap; 928 StringToOffsetTable Table; 929 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 930 const std::string &BuiltinName = 931 IsGCC ? Ints[i].GCCBuiltinName : Ints[i].MSBuiltinName; 932 if (!BuiltinName.empty()) { 933 // Get the map for this target prefix. 934 std::map<std::string, std::string> &BIM = 935 BuiltinMap[Ints[i].TargetPrefix]; 936 937 if (!BIM.insert(std::make_pair(BuiltinName, Ints[i].EnumName)).second) 938 PrintFatalError(Ints[i].TheDef->getLoc(), 939 "Intrinsic '" + Ints[i].TheDef->getName() + 940 "': duplicate " + CompilerName + " builtin name!"); 941 Table.GetOrAddStringOffset(BuiltinName); 942 } 943 } 944 945 OS << "// Get the LLVM intrinsic that corresponds to a builtin.\n"; 946 OS << "// This is used by the C front-end. The builtin name is passed\n"; 947 OS << "// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed\n"; 948 OS << "// in as TargetPrefix. The result is assigned to 'IntrinsicID'.\n"; 949 OS << "#ifdef GET_LLVM_INTRINSIC_FOR_" << CompilerName << "_BUILTIN\n"; 950 951 OS << "Intrinsic::ID Intrinsic::getIntrinsicFor" << CompilerName 952 << "Builtin(const char " 953 << "*TargetPrefixStr, StringRef BuiltinNameStr) {\n"; 954 955 if (Table.Empty()) { 956 OS << " return Intrinsic::not_intrinsic;\n"; 957 OS << "}\n"; 958 OS << "#endif\n\n"; 959 return; 960 } 961 962 OS << " static const char BuiltinNames[] = {\n"; 963 Table.EmitCharArray(OS); 964 OS << " };\n\n"; 965 966 OS << " struct BuiltinEntry {\n"; 967 OS << " Intrinsic::ID IntrinID;\n"; 968 OS << " unsigned StrTabOffset;\n"; 969 OS << " const char *getName() const {\n"; 970 OS << " return &BuiltinNames[StrTabOffset];\n"; 971 OS << " }\n"; 972 OS << " bool operator<(StringRef RHS) const {\n"; 973 OS << " return strncmp(getName(), RHS.data(), RHS.size()) < 0;\n"; 974 OS << " }\n"; 975 OS << " };\n"; 976 977 OS << " StringRef TargetPrefix(TargetPrefixStr);\n\n"; 978 979 // Note: this could emit significantly better code if we cared. 980 for (BIMTy::iterator I = BuiltinMap.begin(), E = BuiltinMap.end();I != E;++I){ 981 OS << " "; 982 if (!I->first.empty()) 983 OS << "if (TargetPrefix == \"" << I->first << "\") "; 984 else 985 OS << "/* Target Independent Builtins */ "; 986 OS << "{\n"; 987 988 // Emit the comparisons for this target prefix. 989 OS << " static const BuiltinEntry " << I->first << "Names[] = {\n"; 990 for (const auto &P : I->second) { 991 OS << " {Intrinsic::" << P.second << ", " 992 << Table.GetOrAddStringOffset(P.first) << "}, // " << P.first << "\n"; 993 } 994 OS << " };\n"; 995 OS << " auto I = std::lower_bound(std::begin(" << I->first << "Names),\n"; 996 OS << " std::end(" << I->first << "Names),\n"; 997 OS << " BuiltinNameStr);\n"; 998 OS << " if (I != std::end(" << I->first << "Names) &&\n"; 999 OS << " I->getName() == BuiltinNameStr)\n"; 1000 OS << " return I->IntrinID;\n"; 1001 OS << " }\n"; 1002 } 1003 OS << " return "; 1004 OS << "Intrinsic::not_intrinsic;\n"; 1005 OS << "}\n"; 1006 OS << "#endif\n\n"; 1007 } 1008 1009 void llvm::EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS) { 1010 IntrinsicEmitter(RK).run(OS, /*Enums=*/true); 1011 } 1012 1013 void llvm::EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS) { 1014 IntrinsicEmitter(RK).run(OS, /*Enums=*/false); 1015 } 1016