1 //===- IntrinsicEmitter.cpp - Generate intrinsic information --------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This tablegen backend emits information about intrinsic functions. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "CodeGenIntrinsics.h" 14 #include "CodeGenTarget.h" 15 #include "SequenceToOffsetTable.h" 16 #include "TableGenBackends.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/Support/CommandLine.h" 19 #include "llvm/TableGen/Error.h" 20 #include "llvm/TableGen/Record.h" 21 #include "llvm/TableGen/StringMatcher.h" 22 #include "llvm/TableGen/StringToOffsetTable.h" 23 #include "llvm/TableGen/TableGenBackend.h" 24 #include <algorithm> 25 using namespace llvm; 26 27 cl::OptionCategory GenIntrinsicCat("Options for -gen-intrinsic-enums"); 28 cl::opt<std::string> 29 IntrinsicPrefix("intrinsic-prefix", 30 cl::desc("Generate intrinsics with this target prefix"), 31 cl::value_desc("target prefix"), cl::cat(GenIntrinsicCat)); 32 33 namespace { 34 class IntrinsicEmitter { 35 RecordKeeper &Records; 36 37 public: 38 IntrinsicEmitter(RecordKeeper &R) : Records(R) {} 39 40 void run(raw_ostream &OS, bool Enums); 41 42 void EmitEnumInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 43 void EmitTargetInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 44 void EmitIntrinsicToNameTable(const CodeGenIntrinsicTable &Ints, 45 raw_ostream &OS); 46 void EmitIntrinsicToOverloadTable(const CodeGenIntrinsicTable &Ints, 47 raw_ostream &OS); 48 void EmitGenerator(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 49 void EmitAttributes(const CodeGenIntrinsicTable &Ints, raw_ostream &OS); 50 void EmitIntrinsicToBuiltinMap(const CodeGenIntrinsicTable &Ints, bool IsGCC, 51 raw_ostream &OS); 52 }; 53 } // End anonymous namespace 54 55 //===----------------------------------------------------------------------===// 56 // IntrinsicEmitter Implementation 57 //===----------------------------------------------------------------------===// 58 59 void IntrinsicEmitter::run(raw_ostream &OS, bool Enums) { 60 emitSourceFileHeader("Intrinsic Function Source Fragment", OS); 61 62 CodeGenIntrinsicTable Ints(Records); 63 64 if (Enums) { 65 // Emit the enum information. 66 EmitEnumInfo(Ints, OS); 67 } else { 68 // Emit the target metadata. 69 EmitTargetInfo(Ints, OS); 70 71 // Emit the intrinsic ID -> name table. 72 EmitIntrinsicToNameTable(Ints, OS); 73 74 // Emit the intrinsic ID -> overload table. 75 EmitIntrinsicToOverloadTable(Ints, OS); 76 77 // Emit the intrinsic declaration generator. 78 EmitGenerator(Ints, OS); 79 80 // Emit the intrinsic parameter attributes. 81 EmitAttributes(Ints, OS); 82 83 // Emit code to translate GCC builtins into LLVM intrinsics. 84 EmitIntrinsicToBuiltinMap(Ints, true, OS); 85 86 // Emit code to translate MS builtins into LLVM intrinsics. 87 EmitIntrinsicToBuiltinMap(Ints, false, OS); 88 } 89 } 90 91 void IntrinsicEmitter::EmitEnumInfo(const CodeGenIntrinsicTable &Ints, 92 raw_ostream &OS) { 93 // Find the TargetSet for which to generate enums. There will be an initial 94 // set with an empty target prefix which will include target independent 95 // intrinsics like dbg.value. 96 const CodeGenIntrinsicTable::TargetSet *Set = nullptr; 97 for (const auto &Target : Ints.Targets) { 98 if (Target.Name == IntrinsicPrefix) { 99 Set = &Target; 100 break; 101 } 102 } 103 if (!Set) { 104 std::vector<std::string> KnownTargets; 105 for (const auto &Target : Ints.Targets) 106 if (!Target.Name.empty()) 107 KnownTargets.push_back(Target.Name); 108 PrintFatalError("tried to generate intrinsics for unknown target " + 109 IntrinsicPrefix + 110 "\nKnown targets are: " + join(KnownTargets, ", ") + "\n"); 111 } 112 113 // Generate a complete header for target specific intrinsics. 114 if (!IntrinsicPrefix.empty()) { 115 std::string UpperPrefix = StringRef(IntrinsicPrefix).upper(); 116 OS << "#ifndef LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n"; 117 OS << "#define LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n\n"; 118 OS << "namespace llvm {\n"; 119 OS << "namespace Intrinsic {\n"; 120 OS << "enum " << UpperPrefix << "Intrinsics : unsigned {\n"; 121 } 122 123 OS << "// Enum values for intrinsics\n"; 124 for (unsigned i = Set->Offset, e = Set->Offset + Set->Count; i != e; ++i) { 125 OS << " " << Ints[i].EnumName; 126 127 // Assign a value to the first intrinsic in this target set so that all 128 // intrinsic ids are distinct. 129 if (i == Set->Offset) 130 OS << " = " << (Set->Offset + 1); 131 132 OS << ", "; 133 if (Ints[i].EnumName.size() < 40) 134 OS.indent(40 - Ints[i].EnumName.size()); 135 OS << " // " << Ints[i].Name << "\n"; 136 } 137 138 // Emit num_intrinsics into the target neutral enum. 139 if (IntrinsicPrefix.empty()) { 140 OS << " num_intrinsics = " << (Ints.size() + 1) << "\n"; 141 } else { 142 OS << "}; // enum\n"; 143 OS << "} // namespace Intrinsic\n"; 144 OS << "} // namespace llvm\n\n"; 145 OS << "#endif\n"; 146 } 147 } 148 149 void IntrinsicEmitter::EmitTargetInfo(const CodeGenIntrinsicTable &Ints, 150 raw_ostream &OS) { 151 OS << "// Target mapping\n"; 152 OS << "#ifdef GET_INTRINSIC_TARGET_DATA\n"; 153 OS << "struct IntrinsicTargetInfo {\n" 154 << " llvm::StringLiteral Name;\n" 155 << " size_t Offset;\n" 156 << " size_t Count;\n" 157 << "};\n"; 158 OS << "static constexpr IntrinsicTargetInfo TargetInfos[] = {\n"; 159 for (auto Target : Ints.Targets) 160 OS << " {llvm::StringLiteral(\"" << Target.Name << "\"), " << Target.Offset 161 << ", " << Target.Count << "},\n"; 162 OS << "};\n"; 163 OS << "#endif\n\n"; 164 } 165 166 void IntrinsicEmitter::EmitIntrinsicToNameTable( 167 const CodeGenIntrinsicTable &Ints, raw_ostream &OS) { 168 OS << "// Intrinsic ID to name table\n"; 169 OS << "#ifdef GET_INTRINSIC_NAME_TABLE\n"; 170 OS << " // Note that entry #0 is the invalid intrinsic!\n"; 171 for (unsigned i = 0, e = Ints.size(); i != e; ++i) 172 OS << " \"" << Ints[i].Name << "\",\n"; 173 OS << "#endif\n\n"; 174 } 175 176 void IntrinsicEmitter::EmitIntrinsicToOverloadTable( 177 const CodeGenIntrinsicTable &Ints, raw_ostream &OS) { 178 OS << "// Intrinsic ID to overload bitset\n"; 179 OS << "#ifdef GET_INTRINSIC_OVERLOAD_TABLE\n"; 180 OS << "static const uint8_t OTable[] = {\n"; 181 OS << " 0"; 182 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 183 // Add one to the index so we emit a null bit for the invalid #0 intrinsic. 184 if ((i+1)%8 == 0) 185 OS << ",\n 0"; 186 if (Ints[i].isOverloaded) 187 OS << " | (1<<" << (i+1)%8 << ')'; 188 } 189 OS << "\n};\n\n"; 190 // OTable contains a true bit at the position if the intrinsic is overloaded. 191 OS << "return (OTable[id/8] & (1 << (id%8))) != 0;\n"; 192 OS << "#endif\n\n"; 193 } 194 195 196 // NOTE: This must be kept in synch with the copy in lib/IR/Function.cpp! 197 enum IIT_Info { 198 // Common values should be encoded with 0-15. 199 IIT_Done = 0, 200 IIT_I1 = 1, 201 IIT_I8 = 2, 202 IIT_I16 = 3, 203 IIT_I32 = 4, 204 IIT_I64 = 5, 205 IIT_F16 = 6, 206 IIT_F32 = 7, 207 IIT_F64 = 8, 208 IIT_V2 = 9, 209 IIT_V4 = 10, 210 IIT_V8 = 11, 211 IIT_V16 = 12, 212 IIT_V32 = 13, 213 IIT_PTR = 14, 214 IIT_ARG = 15, 215 216 // Values from 16+ are only encodable with the inefficient encoding. 217 IIT_V64 = 16, 218 IIT_MMX = 17, 219 IIT_TOKEN = 18, 220 IIT_METADATA = 19, 221 IIT_EMPTYSTRUCT = 20, 222 IIT_STRUCT2 = 21, 223 IIT_STRUCT3 = 22, 224 IIT_STRUCT4 = 23, 225 IIT_STRUCT5 = 24, 226 IIT_EXTEND_ARG = 25, 227 IIT_TRUNC_ARG = 26, 228 IIT_ANYPTR = 27, 229 IIT_V1 = 28, 230 IIT_VARARG = 29, 231 IIT_HALF_VEC_ARG = 30, 232 IIT_SAME_VEC_WIDTH_ARG = 31, 233 IIT_PTR_TO_ARG = 32, 234 IIT_PTR_TO_ELT = 33, 235 IIT_VEC_OF_ANYPTRS_TO_ELT = 34, 236 IIT_I128 = 35, 237 IIT_V512 = 36, 238 IIT_V1024 = 37, 239 IIT_STRUCT6 = 38, 240 IIT_STRUCT7 = 39, 241 IIT_STRUCT8 = 40, 242 IIT_F128 = 41, 243 IIT_VEC_ELEMENT = 42, 244 IIT_SCALABLE_VEC = 43, 245 IIT_SUBDIVIDE2_ARG = 44, 246 IIT_SUBDIVIDE4_ARG = 45, 247 IIT_VEC_OF_BITCASTS_TO_INT = 46, 248 IIT_V128 = 47, 249 IIT_BF16 = 48, 250 IIT_STRUCT9 = 49, 251 IIT_V256 = 50, 252 IIT_AMX = 51, 253 IIT_PPCF128 = 52, 254 IIT_V3 = 53, 255 IIT_EXTERNREF = 54, 256 IIT_FUNCREF = 55 257 }; 258 259 static void EncodeFixedValueType(MVT::SimpleValueType VT, 260 std::vector<unsigned char> &Sig) { 261 if (MVT(VT).isInteger()) { 262 unsigned BitWidth = MVT(VT).getFixedSizeInBits(); 263 switch (BitWidth) { 264 default: PrintFatalError("unhandled integer type width in intrinsic!"); 265 case 1: return Sig.push_back(IIT_I1); 266 case 8: return Sig.push_back(IIT_I8); 267 case 16: return Sig.push_back(IIT_I16); 268 case 32: return Sig.push_back(IIT_I32); 269 case 64: return Sig.push_back(IIT_I64); 270 case 128: return Sig.push_back(IIT_I128); 271 } 272 } 273 274 switch (VT) { 275 default: PrintFatalError("unhandled MVT in intrinsic!"); 276 case MVT::f16: return Sig.push_back(IIT_F16); 277 case MVT::bf16: return Sig.push_back(IIT_BF16); 278 case MVT::f32: return Sig.push_back(IIT_F32); 279 case MVT::f64: return Sig.push_back(IIT_F64); 280 case MVT::f128: return Sig.push_back(IIT_F128); 281 case MVT::ppcf128: return Sig.push_back(IIT_PPCF128); 282 case MVT::token: return Sig.push_back(IIT_TOKEN); 283 case MVT::Metadata: return Sig.push_back(IIT_METADATA); 284 case MVT::x86mmx: return Sig.push_back(IIT_MMX); 285 case MVT::x86amx: return Sig.push_back(IIT_AMX); 286 // MVT::OtherVT is used to mean the empty struct type here. 287 case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT); 288 // MVT::isVoid is used to represent varargs here. 289 case MVT::isVoid: return Sig.push_back(IIT_VARARG); 290 case MVT::externref: 291 return Sig.push_back(IIT_EXTERNREF); 292 case MVT::funcref: 293 return Sig.push_back(IIT_FUNCREF); 294 } 295 } 296 297 #if defined(_MSC_VER) && !defined(__clang__) 298 #pragma optimize("",off) // MSVC 2015 optimizer can't deal with this function. 299 #endif 300 301 static void EncodeFixedType(Record *R, std::vector<unsigned char> &ArgCodes, 302 unsigned &NextArgCode, 303 std::vector<unsigned char> &Sig, 304 ArrayRef<unsigned char> Mapping) { 305 306 if (R->isSubClassOf("LLVMMatchType")) { 307 unsigned Number = Mapping[R->getValueAsInt("Number")]; 308 assert(Number < ArgCodes.size() && "Invalid matching number!"); 309 if (R->isSubClassOf("LLVMExtendedType")) 310 Sig.push_back(IIT_EXTEND_ARG); 311 else if (R->isSubClassOf("LLVMTruncatedType")) 312 Sig.push_back(IIT_TRUNC_ARG); 313 else if (R->isSubClassOf("LLVMHalfElementsVectorType")) 314 Sig.push_back(IIT_HALF_VEC_ARG); 315 else if (R->isSubClassOf("LLVMScalarOrSameVectorWidth")) { 316 Sig.push_back(IIT_SAME_VEC_WIDTH_ARG); 317 Sig.push_back((Number << 3) | ArgCodes[Number]); 318 MVT::SimpleValueType VT = getValueType(R->getValueAsDef("ElTy")); 319 EncodeFixedValueType(VT, Sig); 320 return; 321 } 322 else if (R->isSubClassOf("LLVMPointerTo")) 323 Sig.push_back(IIT_PTR_TO_ARG); 324 else if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) { 325 Sig.push_back(IIT_VEC_OF_ANYPTRS_TO_ELT); 326 // Encode overloaded ArgNo 327 Sig.push_back(NextArgCode++); 328 // Encode LLVMMatchType<Number> ArgNo 329 Sig.push_back(Number); 330 return; 331 } else if (R->isSubClassOf("LLVMPointerToElt")) 332 Sig.push_back(IIT_PTR_TO_ELT); 333 else if (R->isSubClassOf("LLVMVectorElementType")) 334 Sig.push_back(IIT_VEC_ELEMENT); 335 else if (R->isSubClassOf("LLVMSubdivide2VectorType")) 336 Sig.push_back(IIT_SUBDIVIDE2_ARG); 337 else if (R->isSubClassOf("LLVMSubdivide4VectorType")) 338 Sig.push_back(IIT_SUBDIVIDE4_ARG); 339 else if (R->isSubClassOf("LLVMVectorOfBitcastsToInt")) 340 Sig.push_back(IIT_VEC_OF_BITCASTS_TO_INT); 341 else 342 Sig.push_back(IIT_ARG); 343 return Sig.push_back((Number << 3) | 7 /*IITDescriptor::AK_MatchType*/); 344 } 345 346 MVT::SimpleValueType VT = getValueType(R->getValueAsDef("VT")); 347 348 unsigned Tmp = 0; 349 switch (VT) { 350 default: break; 351 case MVT::iPTRAny: ++Tmp; LLVM_FALLTHROUGH; 352 case MVT::vAny: ++Tmp; LLVM_FALLTHROUGH; 353 case MVT::fAny: ++Tmp; LLVM_FALLTHROUGH; 354 case MVT::iAny: ++Tmp; LLVM_FALLTHROUGH; 355 case MVT::Any: { 356 // If this is an "any" valuetype, then the type is the type of the next 357 // type in the list specified to getIntrinsic(). 358 Sig.push_back(IIT_ARG); 359 360 // Figure out what arg # this is consuming, and remember what kind it was. 361 assert(NextArgCode < ArgCodes.size() && ArgCodes[NextArgCode] == Tmp && 362 "Invalid or no ArgCode associated with overloaded VT!"); 363 unsigned ArgNo = NextArgCode++; 364 365 // Encode what sort of argument it must be in the low 3 bits of the ArgNo. 366 return Sig.push_back((ArgNo << 3) | Tmp); 367 } 368 369 case MVT::iPTR: { 370 unsigned AddrSpace = 0; 371 if (R->isSubClassOf("LLVMQualPointerType")) { 372 AddrSpace = R->getValueAsInt("AddrSpace"); 373 assert(AddrSpace < 256 && "Address space exceeds 255"); 374 } 375 if (AddrSpace) { 376 Sig.push_back(IIT_ANYPTR); 377 Sig.push_back(AddrSpace); 378 } else { 379 Sig.push_back(IIT_PTR); 380 } 381 return EncodeFixedType(R->getValueAsDef("ElTy"), ArgCodes, NextArgCode, Sig, 382 Mapping); 383 } 384 } 385 386 if (MVT(VT).isVector()) { 387 MVT VVT = VT; 388 if (VVT.isScalableVector()) 389 Sig.push_back(IIT_SCALABLE_VEC); 390 switch (VVT.getVectorMinNumElements()) { 391 default: PrintFatalError("unhandled vector type width in intrinsic!"); 392 case 1: Sig.push_back(IIT_V1); break; 393 case 2: Sig.push_back(IIT_V2); break; 394 case 3: Sig.push_back(IIT_V3); break; 395 case 4: Sig.push_back(IIT_V4); break; 396 case 8: Sig.push_back(IIT_V8); break; 397 case 16: Sig.push_back(IIT_V16); break; 398 case 32: Sig.push_back(IIT_V32); break; 399 case 64: Sig.push_back(IIT_V64); break; 400 case 128: Sig.push_back(IIT_V128); break; 401 case 256: Sig.push_back(IIT_V256); break; 402 case 512: Sig.push_back(IIT_V512); break; 403 case 1024: Sig.push_back(IIT_V1024); break; 404 } 405 406 return EncodeFixedValueType(VVT.getVectorElementType().SimpleTy, Sig); 407 } 408 409 EncodeFixedValueType(VT, Sig); 410 } 411 412 static void UpdateArgCodes(Record *R, std::vector<unsigned char> &ArgCodes, 413 unsigned int &NumInserted, 414 SmallVectorImpl<unsigned char> &Mapping) { 415 if (R->isSubClassOf("LLVMMatchType")) { 416 if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) { 417 ArgCodes.push_back(3 /*vAny*/); 418 ++NumInserted; 419 } 420 return; 421 } 422 423 unsigned Tmp = 0; 424 switch (getValueType(R->getValueAsDef("VT"))) { 425 default: break; 426 case MVT::iPTR: 427 UpdateArgCodes(R->getValueAsDef("ElTy"), ArgCodes, NumInserted, Mapping); 428 break; 429 case MVT::iPTRAny: 430 ++Tmp; 431 LLVM_FALLTHROUGH; 432 case MVT::vAny: 433 ++Tmp; 434 LLVM_FALLTHROUGH; 435 case MVT::fAny: 436 ++Tmp; 437 LLVM_FALLTHROUGH; 438 case MVT::iAny: 439 ++Tmp; 440 LLVM_FALLTHROUGH; 441 case MVT::Any: 442 unsigned OriginalIdx = ArgCodes.size() - NumInserted; 443 assert(OriginalIdx >= Mapping.size()); 444 Mapping.resize(OriginalIdx+1); 445 Mapping[OriginalIdx] = ArgCodes.size(); 446 ArgCodes.push_back(Tmp); 447 break; 448 } 449 } 450 451 #if defined(_MSC_VER) && !defined(__clang__) 452 #pragma optimize("",on) 453 #endif 454 455 /// ComputeFixedEncoding - If we can encode the type signature for this 456 /// intrinsic into 32 bits, return it. If not, return ~0U. 457 static void ComputeFixedEncoding(const CodeGenIntrinsic &Int, 458 std::vector<unsigned char> &TypeSig) { 459 std::vector<unsigned char> ArgCodes; 460 461 // Add codes for any overloaded result VTs. 462 unsigned int NumInserted = 0; 463 SmallVector<unsigned char, 8> ArgMapping; 464 for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i) 465 UpdateArgCodes(Int.IS.RetTypeDefs[i], ArgCodes, NumInserted, ArgMapping); 466 467 // Add codes for any overloaded operand VTs. 468 for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i) 469 UpdateArgCodes(Int.IS.ParamTypeDefs[i], ArgCodes, NumInserted, ArgMapping); 470 471 unsigned NextArgCode = 0; 472 if (Int.IS.RetVTs.empty()) 473 TypeSig.push_back(IIT_Done); 474 else if (Int.IS.RetVTs.size() == 1 && 475 Int.IS.RetVTs[0] == MVT::isVoid) 476 TypeSig.push_back(IIT_Done); 477 else { 478 switch (Int.IS.RetVTs.size()) { 479 case 1: break; 480 case 2: TypeSig.push_back(IIT_STRUCT2); break; 481 case 3: TypeSig.push_back(IIT_STRUCT3); break; 482 case 4: TypeSig.push_back(IIT_STRUCT4); break; 483 case 5: TypeSig.push_back(IIT_STRUCT5); break; 484 case 6: TypeSig.push_back(IIT_STRUCT6); break; 485 case 7: TypeSig.push_back(IIT_STRUCT7); break; 486 case 8: TypeSig.push_back(IIT_STRUCT8); break; 487 case 9: TypeSig.push_back(IIT_STRUCT9); break; 488 default: llvm_unreachable("Unhandled case in struct"); 489 } 490 491 for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i) 492 EncodeFixedType(Int.IS.RetTypeDefs[i], ArgCodes, NextArgCode, TypeSig, 493 ArgMapping); 494 } 495 496 for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i) 497 EncodeFixedType(Int.IS.ParamTypeDefs[i], ArgCodes, NextArgCode, TypeSig, 498 ArgMapping); 499 } 500 501 static void printIITEntry(raw_ostream &OS, unsigned char X) { 502 OS << (unsigned)X; 503 } 504 505 void IntrinsicEmitter::EmitGenerator(const CodeGenIntrinsicTable &Ints, 506 raw_ostream &OS) { 507 // If we can compute a 32-bit fixed encoding for this intrinsic, do so and 508 // capture it in this vector, otherwise store a ~0U. 509 std::vector<unsigned> FixedEncodings; 510 511 SequenceToOffsetTable<std::vector<unsigned char> > LongEncodingTable; 512 513 std::vector<unsigned char> TypeSig; 514 515 // Compute the unique argument type info. 516 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 517 // Get the signature for the intrinsic. 518 TypeSig.clear(); 519 ComputeFixedEncoding(Ints[i], TypeSig); 520 521 // Check to see if we can encode it into a 32-bit word. We can only encode 522 // 8 nibbles into a 32-bit word. 523 if (TypeSig.size() <= 8) { 524 bool Failed = false; 525 unsigned Result = 0; 526 for (unsigned i = 0, e = TypeSig.size(); i != e; ++i) { 527 // If we had an unencodable argument, bail out. 528 if (TypeSig[i] > 15) { 529 Failed = true; 530 break; 531 } 532 Result = (Result << 4) | TypeSig[e-i-1]; 533 } 534 535 // If this could be encoded into a 31-bit word, return it. 536 if (!Failed && (Result >> 31) == 0) { 537 FixedEncodings.push_back(Result); 538 continue; 539 } 540 } 541 542 // Otherwise, we're going to unique the sequence into the 543 // LongEncodingTable, and use its offset in the 32-bit table instead. 544 LongEncodingTable.add(TypeSig); 545 546 // This is a placehold that we'll replace after the table is laid out. 547 FixedEncodings.push_back(~0U); 548 } 549 550 LongEncodingTable.layout(); 551 552 OS << "// Global intrinsic function declaration type table.\n"; 553 OS << "#ifdef GET_INTRINSIC_GENERATOR_GLOBAL\n"; 554 555 OS << "static const unsigned IIT_Table[] = {\n "; 556 557 for (unsigned i = 0, e = FixedEncodings.size(); i != e; ++i) { 558 if ((i & 7) == 7) 559 OS << "\n "; 560 561 // If the entry fit in the table, just emit it. 562 if (FixedEncodings[i] != ~0U) { 563 OS << "0x" << Twine::utohexstr(FixedEncodings[i]) << ", "; 564 continue; 565 } 566 567 TypeSig.clear(); 568 ComputeFixedEncoding(Ints[i], TypeSig); 569 570 571 // Otherwise, emit the offset into the long encoding table. We emit it this 572 // way so that it is easier to read the offset in the .def file. 573 OS << "(1U<<31) | " << LongEncodingTable.get(TypeSig) << ", "; 574 } 575 576 OS << "0\n};\n\n"; 577 578 // Emit the shared table of register lists. 579 OS << "static const unsigned char IIT_LongEncodingTable[] = {\n"; 580 if (!LongEncodingTable.empty()) 581 LongEncodingTable.emit(OS, printIITEntry); 582 OS << " 255\n};\n\n"; 583 584 OS << "#endif\n\n"; // End of GET_INTRINSIC_GENERATOR_GLOBAL 585 } 586 587 namespace { 588 struct AttributeComparator { 589 bool operator()(const CodeGenIntrinsic *L, const CodeGenIntrinsic *R) const { 590 // Sort throwing intrinsics after non-throwing intrinsics. 591 if (L->canThrow != R->canThrow) 592 return R->canThrow; 593 594 if (L->isNoDuplicate != R->isNoDuplicate) 595 return R->isNoDuplicate; 596 597 if (L->isNoMerge != R->isNoMerge) 598 return R->isNoMerge; 599 600 if (L->isNoReturn != R->isNoReturn) 601 return R->isNoReturn; 602 603 if (L->isNoSync != R->isNoSync) 604 return R->isNoSync; 605 606 if (L->isNoFree != R->isNoFree) 607 return R->isNoFree; 608 609 if (L->isWillReturn != R->isWillReturn) 610 return R->isWillReturn; 611 612 if (L->isCold != R->isCold) 613 return R->isCold; 614 615 if (L->isConvergent != R->isConvergent) 616 return R->isConvergent; 617 618 if (L->isSpeculatable != R->isSpeculatable) 619 return R->isSpeculatable; 620 621 if (L->hasSideEffects != R->hasSideEffects) 622 return R->hasSideEffects; 623 624 // Try to order by readonly/readnone attribute. 625 CodeGenIntrinsic::ModRefBehavior LK = L->ModRef; 626 CodeGenIntrinsic::ModRefBehavior RK = R->ModRef; 627 if (LK != RK) return (LK > RK); 628 // Order by argument attributes. 629 // This is reliable because each side is already sorted internally. 630 return (L->ArgumentAttributes < R->ArgumentAttributes); 631 } 632 }; 633 } // End anonymous namespace 634 635 /// EmitAttributes - This emits the Intrinsic::getAttributes method. 636 void IntrinsicEmitter::EmitAttributes(const CodeGenIntrinsicTable &Ints, 637 raw_ostream &OS) { 638 OS << "// Add parameter attributes that are not common to all intrinsics.\n"; 639 OS << "#ifdef GET_INTRINSIC_ATTRIBUTES\n"; 640 OS << "AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {\n"; 641 642 // Compute the maximum number of attribute arguments and the map 643 typedef std::map<const CodeGenIntrinsic*, unsigned, 644 AttributeComparator> UniqAttrMapTy; 645 UniqAttrMapTy UniqAttributes; 646 unsigned maxArgAttrs = 0; 647 unsigned AttrNum = 0; 648 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 649 const CodeGenIntrinsic &intrinsic = Ints[i]; 650 maxArgAttrs = 651 std::max(maxArgAttrs, unsigned(intrinsic.ArgumentAttributes.size())); 652 unsigned &N = UniqAttributes[&intrinsic]; 653 if (N) continue; 654 N = ++AttrNum; 655 assert(N < 65536 && "Too many unique attributes for table!"); 656 } 657 658 // Emit an array of AttributeList. Most intrinsics will have at least one 659 // entry, for the function itself (index ~1), which is usually nounwind. 660 OS << " static const uint16_t IntrinsicsToAttributesMap[] = {\n"; 661 662 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 663 const CodeGenIntrinsic &intrinsic = Ints[i]; 664 665 OS << " " << UniqAttributes[&intrinsic] << ", // " 666 << intrinsic.Name << "\n"; 667 } 668 OS << " };\n\n"; 669 670 OS << " AttributeList AS[" << maxArgAttrs + 1 << "];\n"; 671 OS << " unsigned NumAttrs = 0;\n"; 672 OS << " if (id != 0) {\n"; 673 OS << " switch(IntrinsicsToAttributesMap[id - 1]) {\n"; 674 OS << " default: llvm_unreachable(\"Invalid attribute number\");\n"; 675 for (auto UniqAttribute : UniqAttributes) { 676 OS << " case " << UniqAttribute.second << ": {\n"; 677 678 const CodeGenIntrinsic &Intrinsic = *(UniqAttribute.first); 679 680 // Keep track of the number of attributes we're writing out. 681 unsigned numAttrs = 0; 682 683 // The argument attributes are alreadys sorted by argument index. 684 unsigned Ai = 0, Ae = Intrinsic.ArgumentAttributes.size(); 685 if (Ae) { 686 while (Ai != Ae) { 687 unsigned AttrIdx = Intrinsic.ArgumentAttributes[Ai].Index; 688 689 OS << " const Attribute::AttrKind AttrParam" << AttrIdx << "[]= {"; 690 ListSeparator LS(","); 691 692 bool AllValuesAreZero = true; 693 SmallVector<uint64_t, 8> Values; 694 do { 695 switch (Intrinsic.ArgumentAttributes[Ai].Kind) { 696 case CodeGenIntrinsic::NoCapture: 697 OS << LS << "Attribute::NoCapture"; 698 break; 699 case CodeGenIntrinsic::NoAlias: 700 OS << LS << "Attribute::NoAlias"; 701 break; 702 case CodeGenIntrinsic::NoUndef: 703 OS << LS << "Attribute::NoUndef"; 704 break; 705 case CodeGenIntrinsic::Returned: 706 OS << LS << "Attribute::Returned"; 707 break; 708 case CodeGenIntrinsic::ReadOnly: 709 OS << LS << "Attribute::ReadOnly"; 710 break; 711 case CodeGenIntrinsic::WriteOnly: 712 OS << LS << "Attribute::WriteOnly"; 713 break; 714 case CodeGenIntrinsic::ReadNone: 715 OS << LS << "Attribute::ReadNone"; 716 break; 717 case CodeGenIntrinsic::ImmArg: 718 OS << LS << "Attribute::ImmArg"; 719 break; 720 case CodeGenIntrinsic::Alignment: 721 OS << LS << "Attribute::Alignment"; 722 break; 723 } 724 uint64_t V = Intrinsic.ArgumentAttributes[Ai].Value; 725 Values.push_back(V); 726 AllValuesAreZero &= (V == 0); 727 728 ++Ai; 729 } while (Ai != Ae && Intrinsic.ArgumentAttributes[Ai].Index == AttrIdx); 730 OS << "};\n"; 731 732 // Generate attribute value array if not all attribute values are zero. 733 if (!AllValuesAreZero) { 734 OS << " const uint64_t AttrValParam" << AttrIdx << "[]= {"; 735 ListSeparator LSV(","); 736 for (const auto V : Values) 737 OS << LSV << V; 738 OS << "};\n"; 739 } 740 741 OS << " AS[" << numAttrs++ << "] = AttributeList::get(C, " 742 << AttrIdx << ", AttrParam" << AttrIdx; 743 if (!AllValuesAreZero) 744 OS << ", AttrValParam" << AttrIdx; 745 OS << ");\n"; 746 } 747 } 748 749 if (!Intrinsic.canThrow || 750 (Intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem && 751 !Intrinsic.hasSideEffects) || 752 Intrinsic.isNoReturn || Intrinsic.isNoSync || Intrinsic.isNoFree || 753 Intrinsic.isWillReturn || Intrinsic.isCold || Intrinsic.isNoDuplicate || 754 Intrinsic.isNoMerge || Intrinsic.isConvergent || 755 Intrinsic.isSpeculatable) { 756 OS << " const Attribute::AttrKind Atts[] = {"; 757 ListSeparator LS(","); 758 if (!Intrinsic.canThrow) 759 OS << LS << "Attribute::NoUnwind"; 760 if (Intrinsic.isNoReturn) 761 OS << LS << "Attribute::NoReturn"; 762 if (Intrinsic.isNoSync) 763 OS << LS << "Attribute::NoSync"; 764 if (Intrinsic.isNoFree) 765 OS << LS << "Attribute::NoFree"; 766 if (Intrinsic.isWillReturn) 767 OS << LS << "Attribute::WillReturn"; 768 if (Intrinsic.isCold) 769 OS << LS << "Attribute::Cold"; 770 if (Intrinsic.isNoDuplicate) 771 OS << LS << "Attribute::NoDuplicate"; 772 if (Intrinsic.isNoMerge) 773 OS << LS << "Attribute::NoMerge"; 774 if (Intrinsic.isConvergent) 775 OS << LS << "Attribute::Convergent"; 776 if (Intrinsic.isSpeculatable) 777 OS << LS << "Attribute::Speculatable"; 778 779 switch (Intrinsic.ModRef) { 780 case CodeGenIntrinsic::NoMem: 781 if (Intrinsic.hasSideEffects) 782 break; 783 OS << LS; 784 OS << "Attribute::ReadNone"; 785 break; 786 case CodeGenIntrinsic::ReadArgMem: 787 OS << LS; 788 OS << "Attribute::ReadOnly,"; 789 OS << "Attribute::ArgMemOnly"; 790 break; 791 case CodeGenIntrinsic::ReadMem: 792 OS << LS; 793 OS << "Attribute::ReadOnly"; 794 break; 795 case CodeGenIntrinsic::ReadInaccessibleMem: 796 OS << LS; 797 OS << "Attribute::ReadOnly,"; 798 OS << "Attribute::InaccessibleMemOnly"; 799 break; 800 case CodeGenIntrinsic::ReadInaccessibleMemOrArgMem: 801 OS << LS; 802 OS << "Attribute::ReadOnly,"; 803 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 804 break; 805 case CodeGenIntrinsic::WriteArgMem: 806 OS << LS; 807 OS << "Attribute::WriteOnly,"; 808 OS << "Attribute::ArgMemOnly"; 809 break; 810 case CodeGenIntrinsic::WriteMem: 811 OS << LS; 812 OS << "Attribute::WriteOnly"; 813 break; 814 case CodeGenIntrinsic::WriteInaccessibleMem: 815 OS << LS; 816 OS << "Attribute::WriteOnly,"; 817 OS << "Attribute::InaccessibleMemOnly"; 818 break; 819 case CodeGenIntrinsic::WriteInaccessibleMemOrArgMem: 820 OS << LS; 821 OS << "Attribute::WriteOnly,"; 822 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 823 break; 824 case CodeGenIntrinsic::ReadWriteArgMem: 825 OS << LS; 826 OS << "Attribute::ArgMemOnly"; 827 break; 828 case CodeGenIntrinsic::ReadWriteInaccessibleMem: 829 OS << LS; 830 OS << "Attribute::InaccessibleMemOnly"; 831 break; 832 case CodeGenIntrinsic::ReadWriteInaccessibleMemOrArgMem: 833 OS << LS; 834 OS << "Attribute::InaccessibleMemOrArgMemOnly"; 835 break; 836 case CodeGenIntrinsic::ReadWriteMem: 837 break; 838 } 839 OS << "};\n"; 840 OS << " AS[" << numAttrs++ << "] = AttributeList::get(C, " 841 << "AttributeList::FunctionIndex, Atts);\n"; 842 } 843 844 if (numAttrs) { 845 OS << " NumAttrs = " << numAttrs << ";\n"; 846 OS << " break;\n"; 847 OS << " }\n"; 848 } else { 849 OS << " return AttributeList();\n"; 850 OS << " }\n"; 851 } 852 } 853 854 OS << " }\n"; 855 OS << " }\n"; 856 OS << " return AttributeList::get(C, makeArrayRef(AS, NumAttrs));\n"; 857 OS << "}\n"; 858 OS << "#endif // GET_INTRINSIC_ATTRIBUTES\n\n"; 859 } 860 861 void IntrinsicEmitter::EmitIntrinsicToBuiltinMap( 862 const CodeGenIntrinsicTable &Ints, bool IsGCC, raw_ostream &OS) { 863 StringRef CompilerName = (IsGCC ? "GCC" : "MS"); 864 typedef std::map<std::string, std::map<std::string, std::string>> BIMTy; 865 BIMTy BuiltinMap; 866 StringToOffsetTable Table; 867 for (unsigned i = 0, e = Ints.size(); i != e; ++i) { 868 const std::string &BuiltinName = 869 IsGCC ? Ints[i].GCCBuiltinName : Ints[i].MSBuiltinName; 870 if (!BuiltinName.empty()) { 871 // Get the map for this target prefix. 872 std::map<std::string, std::string> &BIM = 873 BuiltinMap[Ints[i].TargetPrefix]; 874 875 if (!BIM.insert(std::make_pair(BuiltinName, Ints[i].EnumName)).second) 876 PrintFatalError(Ints[i].TheDef->getLoc(), 877 "Intrinsic '" + Ints[i].TheDef->getName() + 878 "': duplicate " + CompilerName + " builtin name!"); 879 Table.GetOrAddStringOffset(BuiltinName); 880 } 881 } 882 883 OS << "// Get the LLVM intrinsic that corresponds to a builtin.\n"; 884 OS << "// This is used by the C front-end. The builtin name is passed\n"; 885 OS << "// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed\n"; 886 OS << "// in as TargetPrefix. The result is assigned to 'IntrinsicID'.\n"; 887 OS << "#ifdef GET_LLVM_INTRINSIC_FOR_" << CompilerName << "_BUILTIN\n"; 888 889 OS << "Intrinsic::ID Intrinsic::getIntrinsicFor" << CompilerName 890 << "Builtin(const char " 891 << "*TargetPrefixStr, StringRef BuiltinNameStr) {\n"; 892 893 if (Table.Empty()) { 894 OS << " return Intrinsic::not_intrinsic;\n"; 895 OS << "}\n"; 896 OS << "#endif\n\n"; 897 return; 898 } 899 900 OS << " static const char BuiltinNames[] = {\n"; 901 Table.EmitCharArray(OS); 902 OS << " };\n\n"; 903 904 OS << " struct BuiltinEntry {\n"; 905 OS << " Intrinsic::ID IntrinID;\n"; 906 OS << " unsigned StrTabOffset;\n"; 907 OS << " const char *getName() const {\n"; 908 OS << " return &BuiltinNames[StrTabOffset];\n"; 909 OS << " }\n"; 910 OS << " bool operator<(StringRef RHS) const {\n"; 911 OS << " return strncmp(getName(), RHS.data(), RHS.size()) < 0;\n"; 912 OS << " }\n"; 913 OS << " };\n"; 914 915 OS << " StringRef TargetPrefix(TargetPrefixStr);\n\n"; 916 917 // Note: this could emit significantly better code if we cared. 918 for (auto &I : BuiltinMap) { 919 OS << " "; 920 if (!I.first.empty()) 921 OS << "if (TargetPrefix == \"" << I.first << "\") "; 922 else 923 OS << "/* Target Independent Builtins */ "; 924 OS << "{\n"; 925 926 // Emit the comparisons for this target prefix. 927 OS << " static const BuiltinEntry " << I.first << "Names[] = {\n"; 928 for (const auto &P : I.second) { 929 OS << " {Intrinsic::" << P.second << ", " 930 << Table.GetOrAddStringOffset(P.first) << "}, // " << P.first << "\n"; 931 } 932 OS << " };\n"; 933 OS << " auto I = std::lower_bound(std::begin(" << I.first << "Names),\n"; 934 OS << " std::end(" << I.first << "Names),\n"; 935 OS << " BuiltinNameStr);\n"; 936 OS << " if (I != std::end(" << I.first << "Names) &&\n"; 937 OS << " I->getName() == BuiltinNameStr)\n"; 938 OS << " return I->IntrinID;\n"; 939 OS << " }\n"; 940 } 941 OS << " return "; 942 OS << "Intrinsic::not_intrinsic;\n"; 943 OS << "}\n"; 944 OS << "#endif\n\n"; 945 } 946 947 void llvm::EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS) { 948 IntrinsicEmitter(RK).run(OS, /*Enums=*/true); 949 } 950 951 void llvm::EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS) { 952 IntrinsicEmitter(RK).run(OS, /*Enums=*/false); 953 } 954