xref: /freebsd/contrib/llvm-project/llvm/utils/TableGen/AsmMatcherEmitter.cpp (revision e32fecd0c2c3ee37c47ee100f169e7eb0282a873)
1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend emits a target specifier matcher for converting parsed
10 // assembly operands in the MCInst structures. It also emits a matcher for
11 // custom operand parsing.
12 //
13 // Converting assembly operands into MCInst structures
14 // ---------------------------------------------------
15 //
16 // The input to the target specific matcher is a list of literal tokens and
17 // operands. The target specific parser should generally eliminate any syntax
18 // which is not relevant for matching; for example, comma tokens should have
19 // already been consumed and eliminated by the parser. Most instructions will
20 // end up with a single literal token (the instruction name) and some number of
21 // operands.
22 //
23 // Some example inputs, for X86:
24 //   'addl' (immediate ...) (register ...)
25 //   'add' (immediate ...) (memory ...)
26 //   'call' '*' %epc
27 //
28 // The assembly matcher is responsible for converting this input into a precise
29 // machine instruction (i.e., an instruction with a well defined encoding). This
30 // mapping has several properties which complicate matching:
31 //
32 //  - It may be ambiguous; many architectures can legally encode particular
33 //    variants of an instruction in different ways (for example, using a smaller
34 //    encoding for small immediates). Such ambiguities should never be
35 //    arbitrarily resolved by the assembler, the assembler is always responsible
36 //    for choosing the "best" available instruction.
37 //
38 //  - It may depend on the subtarget or the assembler context. Instructions
39 //    which are invalid for the current mode, but otherwise unambiguous (e.g.,
40 //    an SSE instruction in a file being assembled for i486) should be accepted
41 //    and rejected by the assembler front end. However, if the proper encoding
42 //    for an instruction is dependent on the assembler context then the matcher
43 //    is responsible for selecting the correct machine instruction for the
44 //    current mode.
45 //
46 // The core matching algorithm attempts to exploit the regularity in most
47 // instruction sets to quickly determine the set of possibly matching
48 // instructions, and the simplify the generated code. Additionally, this helps
49 // to ensure that the ambiguities are intentionally resolved by the user.
50 //
51 // The matching is divided into two distinct phases:
52 //
53 //   1. Classification: Each operand is mapped to the unique set which (a)
54 //      contains it, and (b) is the largest such subset for which a single
55 //      instruction could match all members.
56 //
57 //      For register classes, we can generate these subgroups automatically. For
58 //      arbitrary operands, we expect the user to define the classes and their
59 //      relations to one another (for example, 8-bit signed immediates as a
60 //      subset of 32-bit immediates).
61 //
62 //      By partitioning the operands in this way, we guarantee that for any
63 //      tuple of classes, any single instruction must match either all or none
64 //      of the sets of operands which could classify to that tuple.
65 //
66 //      In addition, the subset relation amongst classes induces a partial order
67 //      on such tuples, which we use to resolve ambiguities.
68 //
69 //   2. The input can now be treated as a tuple of classes (static tokens are
70 //      simple singleton sets). Each such tuple should generally map to a single
71 //      instruction (we currently ignore cases where this isn't true, whee!!!),
72 //      which we can emit a simple matcher for.
73 //
74 // Custom Operand Parsing
75 // ----------------------
76 //
77 //  Some targets need a custom way to parse operands, some specific instructions
78 //  can contain arguments that can represent processor flags and other kinds of
79 //  identifiers that need to be mapped to specific values in the final encoded
80 //  instructions. The target specific custom operand parsing works in the
81 //  following way:
82 //
83 //   1. A operand match table is built, each entry contains a mnemonic, an
84 //      operand class, a mask for all operand positions for that same
85 //      class/mnemonic and target features to be checked while trying to match.
86 //
87 //   2. The operand matcher will try every possible entry with the same
88 //      mnemonic and will check if the target feature for this mnemonic also
89 //      matches. After that, if the operand to be matched has its index
90 //      present in the mask, a successful match occurs. Otherwise, fallback
91 //      to the regular operand parsing.
92 //
93 //   3. For a match success, each operand class that has a 'ParserMethod'
94 //      becomes part of a switch from where the custom method is called.
95 //
96 //===----------------------------------------------------------------------===//
97 
98 #include "CodeGenInstruction.h"
99 #include "CodeGenTarget.h"
100 #include "SubtargetFeatureInfo.h"
101 #include "Types.h"
102 #include "llvm/ADT/CachedHashString.h"
103 #include "llvm/ADT/PointerUnion.h"
104 #include "llvm/ADT/STLExtras.h"
105 #include "llvm/ADT/SmallPtrSet.h"
106 #include "llvm/ADT/SmallVector.h"
107 #include "llvm/ADT/StringExtras.h"
108 #include "llvm/Config/llvm-config.h"
109 #include "llvm/Support/CommandLine.h"
110 #include "llvm/Support/Debug.h"
111 #include "llvm/Support/ErrorHandling.h"
112 #include "llvm/TableGen/Error.h"
113 #include "llvm/TableGen/Record.h"
114 #include "llvm/TableGen/StringMatcher.h"
115 #include "llvm/TableGen/StringToOffsetTable.h"
116 #include "llvm/TableGen/TableGenBackend.h"
117 #include <cassert>
118 #include <cctype>
119 #include <forward_list>
120 #include <map>
121 #include <set>
122 
123 using namespace llvm;
124 
125 #define DEBUG_TYPE "asm-matcher-emitter"
126 
127 cl::OptionCategory AsmMatcherEmitterCat("Options for -gen-asm-matcher");
128 
129 static cl::opt<std::string>
130     MatchPrefix("match-prefix", cl::init(""),
131                 cl::desc("Only match instructions with the given prefix"),
132                 cl::cat(AsmMatcherEmitterCat));
133 
134 namespace {
135 class AsmMatcherInfo;
136 
137 // Register sets are used as keys in some second-order sets TableGen creates
138 // when generating its data structures. This means that the order of two
139 // RegisterSets can be seen in the outputted AsmMatcher tables occasionally, and
140 // can even affect compiler output (at least seen in diagnostics produced when
141 // all matches fail). So we use a type that sorts them consistently.
142 typedef std::set<Record*, LessRecordByID> RegisterSet;
143 
144 class AsmMatcherEmitter {
145   RecordKeeper &Records;
146 public:
147   AsmMatcherEmitter(RecordKeeper &R) : Records(R) {}
148 
149   void run(raw_ostream &o);
150 };
151 
152 /// ClassInfo - Helper class for storing the information about a particular
153 /// class of operands which can be matched.
154 struct ClassInfo {
155   enum ClassInfoKind {
156     /// Invalid kind, for use as a sentinel value.
157     Invalid = 0,
158 
159     /// The class for a particular token.
160     Token,
161 
162     /// The (first) register class, subsequent register classes are
163     /// RegisterClass0+1, and so on.
164     RegisterClass0,
165 
166     /// The (first) user defined class, subsequent user defined classes are
167     /// UserClass0+1, and so on.
168     UserClass0 = 1<<16
169   };
170 
171   /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
172   /// N) for the Nth user defined class.
173   unsigned Kind;
174 
175   /// SuperClasses - The super classes of this class. Note that for simplicities
176   /// sake user operands only record their immediate super class, while register
177   /// operands include all superclasses.
178   std::vector<ClassInfo*> SuperClasses;
179 
180   /// Name - The full class name, suitable for use in an enum.
181   std::string Name;
182 
183   /// ClassName - The unadorned generic name for this class (e.g., Token).
184   std::string ClassName;
185 
186   /// ValueName - The name of the value this class represents; for a token this
187   /// is the literal token string, for an operand it is the TableGen class (or
188   /// empty if this is a derived class).
189   std::string ValueName;
190 
191   /// PredicateMethod - The name of the operand method to test whether the
192   /// operand matches this class; this is not valid for Token or register kinds.
193   std::string PredicateMethod;
194 
195   /// RenderMethod - The name of the operand method to add this operand to an
196   /// MCInst; this is not valid for Token or register kinds.
197   std::string RenderMethod;
198 
199   /// ParserMethod - The name of the operand method to do a target specific
200   /// parsing on the operand.
201   std::string ParserMethod;
202 
203   /// For register classes: the records for all the registers in this class.
204   RegisterSet Registers;
205 
206   /// For custom match classes: the diagnostic kind for when the predicate fails.
207   std::string DiagnosticType;
208 
209   /// For custom match classes: the diagnostic string for when the predicate fails.
210   std::string DiagnosticString;
211 
212   /// Is this operand optional and not always required.
213   bool IsOptional;
214 
215   /// DefaultMethod - The name of the method that returns the default operand
216   /// for optional operand
217   std::string DefaultMethod;
218 
219 public:
220   /// isRegisterClass() - Check if this is a register class.
221   bool isRegisterClass() const {
222     return Kind >= RegisterClass0 && Kind < UserClass0;
223   }
224 
225   /// isUserClass() - Check if this is a user defined class.
226   bool isUserClass() const {
227     return Kind >= UserClass0;
228   }
229 
230   /// isRelatedTo - Check whether this class is "related" to \p RHS. Classes
231   /// are related if they are in the same class hierarchy.
232   bool isRelatedTo(const ClassInfo &RHS) const {
233     // Tokens are only related to tokens.
234     if (Kind == Token || RHS.Kind == Token)
235       return Kind == Token && RHS.Kind == Token;
236 
237     // Registers classes are only related to registers classes, and only if
238     // their intersection is non-empty.
239     if (isRegisterClass() || RHS.isRegisterClass()) {
240       if (!isRegisterClass() || !RHS.isRegisterClass())
241         return false;
242 
243       RegisterSet Tmp;
244       std::insert_iterator<RegisterSet> II(Tmp, Tmp.begin());
245       std::set_intersection(Registers.begin(), Registers.end(),
246                             RHS.Registers.begin(), RHS.Registers.end(),
247                             II, LessRecordByID());
248 
249       return !Tmp.empty();
250     }
251 
252     // Otherwise we have two users operands; they are related if they are in the
253     // same class hierarchy.
254     //
255     // FIXME: This is an oversimplification, they should only be related if they
256     // intersect, however we don't have that information.
257     assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
258     const ClassInfo *Root = this;
259     while (!Root->SuperClasses.empty())
260       Root = Root->SuperClasses.front();
261 
262     const ClassInfo *RHSRoot = &RHS;
263     while (!RHSRoot->SuperClasses.empty())
264       RHSRoot = RHSRoot->SuperClasses.front();
265 
266     return Root == RHSRoot;
267   }
268 
269   /// isSubsetOf - Test whether this class is a subset of \p RHS.
270   bool isSubsetOf(const ClassInfo &RHS) const {
271     // This is a subset of RHS if it is the same class...
272     if (this == &RHS)
273       return true;
274 
275     // ... or if any of its super classes are a subset of RHS.
276     SmallVector<const ClassInfo *, 16> Worklist(SuperClasses.begin(),
277                                                 SuperClasses.end());
278     SmallPtrSet<const ClassInfo *, 16> Visited;
279     while (!Worklist.empty()) {
280       auto *CI = Worklist.pop_back_val();
281       if (CI == &RHS)
282         return true;
283       for (auto *Super : CI->SuperClasses)
284         if (Visited.insert(Super).second)
285           Worklist.push_back(Super);
286     }
287 
288     return false;
289   }
290 
291   int getTreeDepth() const {
292     int Depth = 0;
293     const ClassInfo *Root = this;
294     while (!Root->SuperClasses.empty()) {
295       Depth++;
296       Root = Root->SuperClasses.front();
297     }
298     return Depth;
299   }
300 
301   const ClassInfo *findRoot() const {
302     const ClassInfo *Root = this;
303     while (!Root->SuperClasses.empty())
304       Root = Root->SuperClasses.front();
305     return Root;
306   }
307 
308   /// Compare two classes. This does not produce a total ordering, but does
309   /// guarantee that subclasses are sorted before their parents, and that the
310   /// ordering is transitive.
311   bool operator<(const ClassInfo &RHS) const {
312     if (this == &RHS)
313       return false;
314 
315     // First, enforce the ordering between the three different types of class.
316     // Tokens sort before registers, which sort before user classes.
317     if (Kind == Token) {
318       if (RHS.Kind != Token)
319         return true;
320       assert(RHS.Kind == Token);
321     } else if (isRegisterClass()) {
322       if (RHS.Kind == Token)
323         return false;
324       else if (RHS.isUserClass())
325         return true;
326       assert(RHS.isRegisterClass());
327     } else if (isUserClass()) {
328       if (!RHS.isUserClass())
329         return false;
330       assert(RHS.isUserClass());
331     } else {
332       llvm_unreachable("Unknown ClassInfoKind");
333     }
334 
335     if (Kind == Token || isUserClass()) {
336       // Related tokens and user classes get sorted by depth in the inheritence
337       // tree (so that subclasses are before their parents).
338       if (isRelatedTo(RHS)) {
339         if (getTreeDepth() > RHS.getTreeDepth())
340           return true;
341         if (getTreeDepth() < RHS.getTreeDepth())
342           return false;
343       } else {
344         // Unrelated tokens and user classes are ordered by the name of their
345         // root nodes, so that there is a consistent ordering between
346         // unconnected trees.
347         return findRoot()->ValueName < RHS.findRoot()->ValueName;
348       }
349     } else if (isRegisterClass()) {
350       // For register sets, sort by number of registers. This guarantees that
351       // a set will always sort before all of it's strict supersets.
352       if (Registers.size() != RHS.Registers.size())
353         return Registers.size() < RHS.Registers.size();
354     } else {
355       llvm_unreachable("Unknown ClassInfoKind");
356     }
357 
358     // FIXME: We should be able to just return false here, as we only need a
359     // partial order (we use stable sorts, so this is deterministic) and the
360     // name of a class shouldn't be significant. However, some of the backends
361     // accidentally rely on this behaviour, so it will have to stay like this
362     // until they are fixed.
363     return ValueName < RHS.ValueName;
364   }
365 };
366 
367 class AsmVariantInfo {
368 public:
369   StringRef RegisterPrefix;
370   StringRef TokenizingCharacters;
371   StringRef SeparatorCharacters;
372   StringRef BreakCharacters;
373   StringRef Name;
374   int AsmVariantNo;
375 };
376 
377 /// MatchableInfo - Helper class for storing the necessary information for an
378 /// instruction or alias which is capable of being matched.
379 struct MatchableInfo {
380   struct AsmOperand {
381     /// Token - This is the token that the operand came from.
382     StringRef Token;
383 
384     /// The unique class instance this operand should match.
385     ClassInfo *Class;
386 
387     /// The operand name this is, if anything.
388     StringRef SrcOpName;
389 
390     /// The operand name this is, before renaming for tied operands.
391     StringRef OrigSrcOpName;
392 
393     /// The suboperand index within SrcOpName, or -1 for the entire operand.
394     int SubOpIdx;
395 
396     /// Whether the token is "isolated", i.e., it is preceded and followed
397     /// by separators.
398     bool IsIsolatedToken;
399 
400     /// Register record if this token is singleton register.
401     Record *SingletonReg;
402 
403     explicit AsmOperand(bool IsIsolatedToken, StringRef T)
404         : Token(T), Class(nullptr), SubOpIdx(-1),
405           IsIsolatedToken(IsIsolatedToken), SingletonReg(nullptr) {}
406   };
407 
408   /// ResOperand - This represents a single operand in the result instruction
409   /// generated by the match.  In cases (like addressing modes) where a single
410   /// assembler operand expands to multiple MCOperands, this represents the
411   /// single assembler operand, not the MCOperand.
412   struct ResOperand {
413     enum {
414       /// RenderAsmOperand - This represents an operand result that is
415       /// generated by calling the render method on the assembly operand.  The
416       /// corresponding AsmOperand is specified by AsmOperandNum.
417       RenderAsmOperand,
418 
419       /// TiedOperand - This represents a result operand that is a duplicate of
420       /// a previous result operand.
421       TiedOperand,
422 
423       /// ImmOperand - This represents an immediate value that is dumped into
424       /// the operand.
425       ImmOperand,
426 
427       /// RegOperand - This represents a fixed register that is dumped in.
428       RegOperand
429     } Kind;
430 
431     /// Tuple containing the index of the (earlier) result operand that should
432     /// be copied from, as well as the indices of the corresponding (parsed)
433     /// operands in the asm string.
434     struct TiedOperandsTuple {
435       unsigned ResOpnd;
436       unsigned SrcOpnd1Idx;
437       unsigned SrcOpnd2Idx;
438     };
439 
440     union {
441       /// This is the operand # in the AsmOperands list that this should be
442       /// copied from.
443       unsigned AsmOperandNum;
444 
445       /// Description of tied operands.
446       TiedOperandsTuple TiedOperands;
447 
448       /// ImmVal - This is the immediate value added to the instruction.
449       int64_t ImmVal;
450 
451       /// Register - This is the register record.
452       Record *Register;
453     };
454 
455     /// MINumOperands - The number of MCInst operands populated by this
456     /// operand.
457     unsigned MINumOperands;
458 
459     static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) {
460       ResOperand X;
461       X.Kind = RenderAsmOperand;
462       X.AsmOperandNum = AsmOpNum;
463       X.MINumOperands = NumOperands;
464       return X;
465     }
466 
467     static ResOperand getTiedOp(unsigned TiedOperandNum, unsigned SrcOperand1,
468                                 unsigned SrcOperand2) {
469       ResOperand X;
470       X.Kind = TiedOperand;
471       X.TiedOperands = { TiedOperandNum, SrcOperand1, SrcOperand2 };
472       X.MINumOperands = 1;
473       return X;
474     }
475 
476     static ResOperand getImmOp(int64_t Val) {
477       ResOperand X;
478       X.Kind = ImmOperand;
479       X.ImmVal = Val;
480       X.MINumOperands = 1;
481       return X;
482     }
483 
484     static ResOperand getRegOp(Record *Reg) {
485       ResOperand X;
486       X.Kind = RegOperand;
487       X.Register = Reg;
488       X.MINumOperands = 1;
489       return X;
490     }
491   };
492 
493   /// AsmVariantID - Target's assembly syntax variant no.
494   int AsmVariantID;
495 
496   /// AsmString - The assembly string for this instruction (with variants
497   /// removed), e.g. "movsx $src, $dst".
498   std::string AsmString;
499 
500   /// TheDef - This is the definition of the instruction or InstAlias that this
501   /// matchable came from.
502   Record *const TheDef;
503 
504   /// DefRec - This is the definition that it came from.
505   PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec;
506 
507   const CodeGenInstruction *getResultInst() const {
508     if (DefRec.is<const CodeGenInstruction*>())
509       return DefRec.get<const CodeGenInstruction*>();
510     return DefRec.get<const CodeGenInstAlias*>()->ResultInst;
511   }
512 
513   /// ResOperands - This is the operand list that should be built for the result
514   /// MCInst.
515   SmallVector<ResOperand, 8> ResOperands;
516 
517   /// Mnemonic - This is the first token of the matched instruction, its
518   /// mnemonic.
519   StringRef Mnemonic;
520 
521   /// AsmOperands - The textual operands that this instruction matches,
522   /// annotated with a class and where in the OperandList they were defined.
523   /// This directly corresponds to the tokenized AsmString after the mnemonic is
524   /// removed.
525   SmallVector<AsmOperand, 8> AsmOperands;
526 
527   /// Predicates - The required subtarget features to match this instruction.
528   SmallVector<const SubtargetFeatureInfo *, 4> RequiredFeatures;
529 
530   /// ConversionFnKind - The enum value which is passed to the generated
531   /// convertToMCInst to convert parsed operands into an MCInst for this
532   /// function.
533   std::string ConversionFnKind;
534 
535   /// If this instruction is deprecated in some form.
536   bool HasDeprecation;
537 
538   /// If this is an alias, this is use to determine whether or not to using
539   /// the conversion function defined by the instruction's AsmMatchConverter
540   /// or to use the function generated by the alias.
541   bool UseInstAsmMatchConverter;
542 
543   MatchableInfo(const CodeGenInstruction &CGI)
544     : AsmVariantID(0), AsmString(CGI.AsmString), TheDef(CGI.TheDef), DefRec(&CGI),
545       UseInstAsmMatchConverter(true) {
546   }
547 
548   MatchableInfo(std::unique_ptr<const CodeGenInstAlias> Alias)
549     : AsmVariantID(0), AsmString(Alias->AsmString), TheDef(Alias->TheDef),
550       DefRec(Alias.release()),
551       UseInstAsmMatchConverter(
552         TheDef->getValueAsBit("UseInstAsmMatchConverter")) {
553   }
554 
555   // Could remove this and the dtor if PointerUnion supported unique_ptr
556   // elements with a dynamic failure/assertion (like the one below) in the case
557   // where it was copied while being in an owning state.
558   MatchableInfo(const MatchableInfo &RHS)
559       : AsmVariantID(RHS.AsmVariantID), AsmString(RHS.AsmString),
560         TheDef(RHS.TheDef), DefRec(RHS.DefRec), ResOperands(RHS.ResOperands),
561         Mnemonic(RHS.Mnemonic), AsmOperands(RHS.AsmOperands),
562         RequiredFeatures(RHS.RequiredFeatures),
563         ConversionFnKind(RHS.ConversionFnKind),
564         HasDeprecation(RHS.HasDeprecation),
565         UseInstAsmMatchConverter(RHS.UseInstAsmMatchConverter) {
566     assert(!DefRec.is<const CodeGenInstAlias *>());
567   }
568 
569   ~MatchableInfo() {
570     delete DefRec.dyn_cast<const CodeGenInstAlias*>();
571   }
572 
573   // Two-operand aliases clone from the main matchable, but mark the second
574   // operand as a tied operand of the first for purposes of the assembler.
575   void formTwoOperandAlias(StringRef Constraint);
576 
577   void initialize(const AsmMatcherInfo &Info,
578                   SmallPtrSetImpl<Record*> &SingletonRegisters,
579                   AsmVariantInfo const &Variant,
580                   bool HasMnemonicFirst);
581 
582   /// validate - Return true if this matchable is a valid thing to match against
583   /// and perform a bunch of validity checking.
584   bool validate(StringRef CommentDelimiter, bool IsAlias) const;
585 
586   /// findAsmOperand - Find the AsmOperand with the specified name and
587   /// suboperand index.
588   int findAsmOperand(StringRef N, int SubOpIdx) const {
589     auto I = find_if(AsmOperands, [&](const AsmOperand &Op) {
590       return Op.SrcOpName == N && Op.SubOpIdx == SubOpIdx;
591     });
592     return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1;
593   }
594 
595   /// findAsmOperandNamed - Find the first AsmOperand with the specified name.
596   /// This does not check the suboperand index.
597   int findAsmOperandNamed(StringRef N, int LastIdx = -1) const {
598     auto I = std::find_if(AsmOperands.begin() + LastIdx + 1, AsmOperands.end(),
599                      [&](const AsmOperand &Op) { return Op.SrcOpName == N; });
600     return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1;
601   }
602 
603   int findAsmOperandOriginallyNamed(StringRef N) const {
604     auto I =
605         find_if(AsmOperands,
606                 [&](const AsmOperand &Op) { return Op.OrigSrcOpName == N; });
607     return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1;
608   }
609 
610   void buildInstructionResultOperands();
611   void buildAliasResultOperands(bool AliasConstraintsAreChecked);
612 
613   /// operator< - Compare two matchables.
614   bool operator<(const MatchableInfo &RHS) const {
615     // The primary comparator is the instruction mnemonic.
616     if (int Cmp = Mnemonic.compare_insensitive(RHS.Mnemonic))
617       return Cmp == -1;
618 
619     if (AsmOperands.size() != RHS.AsmOperands.size())
620       return AsmOperands.size() < RHS.AsmOperands.size();
621 
622     // Compare lexicographically by operand. The matcher validates that other
623     // orderings wouldn't be ambiguous using \see couldMatchAmbiguouslyWith().
624     for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
625       if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
626         return true;
627       if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
628         return false;
629     }
630 
631     // Give matches that require more features higher precedence. This is useful
632     // because we cannot define AssemblerPredicates with the negation of
633     // processor features. For example, ARM v6 "nop" may be either a HINT or
634     // MOV. With v6, we want to match HINT. The assembler has no way to
635     // predicate MOV under "NoV6", but HINT will always match first because it
636     // requires V6 while MOV does not.
637     if (RequiredFeatures.size() != RHS.RequiredFeatures.size())
638       return RequiredFeatures.size() > RHS.RequiredFeatures.size();
639 
640     // For X86 AVX/AVX512 instructions, we prefer vex encoding because the
641     // vex encoding size is smaller. Since X86InstrSSE.td is included ahead
642     // of X86InstrAVX512.td, the AVX instruction ID is less than AVX512 ID.
643     // We use the ID to sort AVX instruction before AVX512 instruction in
644     // matching table.
645     if (TheDef->isSubClassOf("Instruction") &&
646         TheDef->getValueAsBit("HasPositionOrder"))
647       return TheDef->getID() < RHS.TheDef->getID();
648 
649     return false;
650   }
651 
652   /// couldMatchAmbiguouslyWith - Check whether this matchable could
653   /// ambiguously match the same set of operands as \p RHS (without being a
654   /// strictly superior match).
655   bool couldMatchAmbiguouslyWith(const MatchableInfo &RHS) const {
656     // The primary comparator is the instruction mnemonic.
657     if (Mnemonic != RHS.Mnemonic)
658       return false;
659 
660     // Different variants can't conflict.
661     if (AsmVariantID != RHS.AsmVariantID)
662       return false;
663 
664     // The number of operands is unambiguous.
665     if (AsmOperands.size() != RHS.AsmOperands.size())
666       return false;
667 
668     // Otherwise, make sure the ordering of the two instructions is unambiguous
669     // by checking that either (a) a token or operand kind discriminates them,
670     // or (b) the ordering among equivalent kinds is consistent.
671 
672     // Tokens and operand kinds are unambiguous (assuming a correct target
673     // specific parser).
674     for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
675       if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind ||
676           AsmOperands[i].Class->Kind == ClassInfo::Token)
677         if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class ||
678             *RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
679           return false;
680 
681     // Otherwise, this operand could commute if all operands are equivalent, or
682     // there is a pair of operands that compare less than and a pair that
683     // compare greater than.
684     bool HasLT = false, HasGT = false;
685     for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
686       if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
687         HasLT = true;
688       if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
689         HasGT = true;
690     }
691 
692     return HasLT == HasGT;
693   }
694 
695   void dump() const;
696 
697 private:
698   void tokenizeAsmString(AsmMatcherInfo const &Info,
699                          AsmVariantInfo const &Variant);
700   void addAsmOperand(StringRef Token, bool IsIsolatedToken = false);
701 };
702 
703 struct OperandMatchEntry {
704   unsigned OperandMask;
705   const MatchableInfo* MI;
706   ClassInfo *CI;
707 
708   static OperandMatchEntry create(const MatchableInfo *mi, ClassInfo *ci,
709                                   unsigned opMask) {
710     OperandMatchEntry X;
711     X.OperandMask = opMask;
712     X.CI = ci;
713     X.MI = mi;
714     return X;
715   }
716 };
717 
718 class AsmMatcherInfo {
719 public:
720   /// Tracked Records
721   RecordKeeper &Records;
722 
723   /// The tablegen AsmParser record.
724   Record *AsmParser;
725 
726   /// Target - The target information.
727   CodeGenTarget &Target;
728 
729   /// The classes which are needed for matching.
730   std::forward_list<ClassInfo> Classes;
731 
732   /// The information on the matchables to match.
733   std::vector<std::unique_ptr<MatchableInfo>> Matchables;
734 
735   /// Info for custom matching operands by user defined methods.
736   std::vector<OperandMatchEntry> OperandMatchInfo;
737 
738   /// Map of Register records to their class information.
739   typedef std::map<Record*, ClassInfo*, LessRecordByID> RegisterClassesTy;
740   RegisterClassesTy RegisterClasses;
741 
742   /// Map of Predicate records to their subtarget information.
743   std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures;
744 
745   /// Map of AsmOperandClass records to their class information.
746   std::map<Record*, ClassInfo*> AsmOperandClasses;
747 
748   /// Map of RegisterClass records to their class information.
749   std::map<Record*, ClassInfo*> RegisterClassClasses;
750 
751 private:
752   /// Map of token to class information which has already been constructed.
753   std::map<std::string, ClassInfo*> TokenClasses;
754 
755 private:
756   /// getTokenClass - Lookup or create the class for the given token.
757   ClassInfo *getTokenClass(StringRef Token);
758 
759   /// getOperandClass - Lookup or create the class for the given operand.
760   ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI,
761                              int SubOpIdx);
762   ClassInfo *getOperandClass(Record *Rec, int SubOpIdx);
763 
764   /// buildRegisterClasses - Build the ClassInfo* instances for register
765   /// classes.
766   void buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters);
767 
768   /// buildOperandClasses - Build the ClassInfo* instances for user defined
769   /// operand classes.
770   void buildOperandClasses();
771 
772   void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
773                                         unsigned AsmOpIdx);
774   void buildAliasOperandReference(MatchableInfo *II, StringRef OpName,
775                                   MatchableInfo::AsmOperand &Op);
776 
777 public:
778   AsmMatcherInfo(Record *AsmParser,
779                  CodeGenTarget &Target,
780                  RecordKeeper &Records);
781 
782   /// Construct the various tables used during matching.
783   void buildInfo();
784 
785   /// buildOperandMatchInfo - Build the necessary information to handle user
786   /// defined operand parsing methods.
787   void buildOperandMatchInfo();
788 
789   /// getSubtargetFeature - Lookup or create the subtarget feature info for the
790   /// given operand.
791   const SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
792     assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
793     const auto &I = SubtargetFeatures.find(Def);
794     return I == SubtargetFeatures.end() ? nullptr : &I->second;
795   }
796 
797   RecordKeeper &getRecords() const {
798     return Records;
799   }
800 
801   bool hasOptionalOperands() const {
802     return any_of(Classes,
803                   [](const ClassInfo &Class) { return Class.IsOptional; });
804   }
805 };
806 
807 } // end anonymous namespace
808 
809 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
810 LLVM_DUMP_METHOD void MatchableInfo::dump() const {
811   errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n";
812 
813   errs() << "  variant: " << AsmVariantID << "\n";
814 
815   for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
816     const AsmOperand &Op = AsmOperands[i];
817     errs() << "  op[" << i << "] = " << Op.Class->ClassName << " - ";
818     errs() << '\"' << Op.Token << "\"\n";
819   }
820 }
821 #endif
822 
823 static std::pair<StringRef, StringRef>
824 parseTwoOperandConstraint(StringRef S, ArrayRef<SMLoc> Loc) {
825   // Split via the '='.
826   std::pair<StringRef, StringRef> Ops = S.split('=');
827   if (Ops.second == "")
828     PrintFatalError(Loc, "missing '=' in two-operand alias constraint");
829   // Trim whitespace and the leading '$' on the operand names.
830   size_t start = Ops.first.find_first_of('$');
831   if (start == std::string::npos)
832     PrintFatalError(Loc, "expected '$' prefix on asm operand name");
833   Ops.first = Ops.first.slice(start + 1, std::string::npos);
834   size_t end = Ops.first.find_last_of(" \t");
835   Ops.first = Ops.first.slice(0, end);
836   // Now the second operand.
837   start = Ops.second.find_first_of('$');
838   if (start == std::string::npos)
839     PrintFatalError(Loc, "expected '$' prefix on asm operand name");
840   Ops.second = Ops.second.slice(start + 1, std::string::npos);
841   end = Ops.second.find_last_of(" \t");
842   Ops.first = Ops.first.slice(0, end);
843   return Ops;
844 }
845 
846 void MatchableInfo::formTwoOperandAlias(StringRef Constraint) {
847   // Figure out which operands are aliased and mark them as tied.
848   std::pair<StringRef, StringRef> Ops =
849     parseTwoOperandConstraint(Constraint, TheDef->getLoc());
850 
851   // Find the AsmOperands that refer to the operands we're aliasing.
852   int SrcAsmOperand = findAsmOperandNamed(Ops.first);
853   int DstAsmOperand = findAsmOperandNamed(Ops.second);
854   if (SrcAsmOperand == -1)
855     PrintFatalError(TheDef->getLoc(),
856                     "unknown source two-operand alias operand '" + Ops.first +
857                     "'.");
858   if (DstAsmOperand == -1)
859     PrintFatalError(TheDef->getLoc(),
860                     "unknown destination two-operand alias operand '" +
861                     Ops.second + "'.");
862 
863   // Find the ResOperand that refers to the operand we're aliasing away
864   // and update it to refer to the combined operand instead.
865   for (ResOperand &Op : ResOperands) {
866     if (Op.Kind == ResOperand::RenderAsmOperand &&
867         Op.AsmOperandNum == (unsigned)SrcAsmOperand) {
868       Op.AsmOperandNum = DstAsmOperand;
869       break;
870     }
871   }
872   // Remove the AsmOperand for the alias operand.
873   AsmOperands.erase(AsmOperands.begin() + SrcAsmOperand);
874   // Adjust the ResOperand references to any AsmOperands that followed
875   // the one we just deleted.
876   for (ResOperand &Op : ResOperands) {
877     switch(Op.Kind) {
878     default:
879       // Nothing to do for operands that don't reference AsmOperands.
880       break;
881     case ResOperand::RenderAsmOperand:
882       if (Op.AsmOperandNum > (unsigned)SrcAsmOperand)
883         --Op.AsmOperandNum;
884       break;
885     }
886   }
887 }
888 
889 /// extractSingletonRegisterForAsmOperand - Extract singleton register,
890 /// if present, from specified token.
891 static void
892 extractSingletonRegisterForAsmOperand(MatchableInfo::AsmOperand &Op,
893                                       const AsmMatcherInfo &Info,
894                                       StringRef RegisterPrefix) {
895   StringRef Tok = Op.Token;
896 
897   // If this token is not an isolated token, i.e., it isn't separated from
898   // other tokens (e.g. with whitespace), don't interpret it as a register name.
899   if (!Op.IsIsolatedToken)
900     return;
901 
902   if (RegisterPrefix.empty()) {
903     std::string LoweredTok = Tok.lower();
904     if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(LoweredTok))
905       Op.SingletonReg = Reg->TheDef;
906     return;
907   }
908 
909   if (!Tok.startswith(RegisterPrefix))
910     return;
911 
912   StringRef RegName = Tok.substr(RegisterPrefix.size());
913   if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
914     Op.SingletonReg = Reg->TheDef;
915 
916   // If there is no register prefix (i.e. "%" in "%eax"), then this may
917   // be some random non-register token, just ignore it.
918 }
919 
920 void MatchableInfo::initialize(const AsmMatcherInfo &Info,
921                                SmallPtrSetImpl<Record*> &SingletonRegisters,
922                                AsmVariantInfo const &Variant,
923                                bool HasMnemonicFirst) {
924   AsmVariantID = Variant.AsmVariantNo;
925   AsmString =
926     CodeGenInstruction::FlattenAsmStringVariants(AsmString,
927                                                  Variant.AsmVariantNo);
928 
929   tokenizeAsmString(Info, Variant);
930 
931   // The first token of the instruction is the mnemonic, which must be a
932   // simple string, not a $foo variable or a singleton register.
933   if (AsmOperands.empty())
934     PrintFatalError(TheDef->getLoc(),
935                   "Instruction '" + TheDef->getName() + "' has no tokens");
936 
937   assert(!AsmOperands[0].Token.empty());
938   if (HasMnemonicFirst) {
939     Mnemonic = AsmOperands[0].Token;
940     if (Mnemonic[0] == '$')
941       PrintFatalError(TheDef->getLoc(),
942                       "Invalid instruction mnemonic '" + Mnemonic + "'!");
943 
944     // Remove the first operand, it is tracked in the mnemonic field.
945     AsmOperands.erase(AsmOperands.begin());
946   } else if (AsmOperands[0].Token[0] != '$')
947     Mnemonic = AsmOperands[0].Token;
948 
949   // Compute the require features.
950   for (Record *Predicate : TheDef->getValueAsListOfDefs("Predicates"))
951     if (const SubtargetFeatureInfo *Feature =
952             Info.getSubtargetFeature(Predicate))
953       RequiredFeatures.push_back(Feature);
954 
955   // Collect singleton registers, if used.
956   for (MatchableInfo::AsmOperand &Op : AsmOperands) {
957     extractSingletonRegisterForAsmOperand(Op, Info, Variant.RegisterPrefix);
958     if (Record *Reg = Op.SingletonReg)
959       SingletonRegisters.insert(Reg);
960   }
961 
962   const RecordVal *DepMask = TheDef->getValue("DeprecatedFeatureMask");
963   if (!DepMask)
964     DepMask = TheDef->getValue("ComplexDeprecationPredicate");
965 
966   HasDeprecation =
967       DepMask ? !DepMask->getValue()->getAsUnquotedString().empty() : false;
968 }
969 
970 /// Append an AsmOperand for the given substring of AsmString.
971 void MatchableInfo::addAsmOperand(StringRef Token, bool IsIsolatedToken) {
972   AsmOperands.push_back(AsmOperand(IsIsolatedToken, Token));
973 }
974 
975 /// tokenizeAsmString - Tokenize a simplified assembly string.
976 void MatchableInfo::tokenizeAsmString(const AsmMatcherInfo &Info,
977                                       AsmVariantInfo const &Variant) {
978   StringRef String = AsmString;
979   size_t Prev = 0;
980   bool InTok = false;
981   bool IsIsolatedToken = true;
982   for (size_t i = 0, e = String.size(); i != e; ++i) {
983     char Char = String[i];
984     if (Variant.BreakCharacters.find(Char) != std::string::npos) {
985       if (InTok) {
986         addAsmOperand(String.slice(Prev, i), false);
987         Prev = i;
988         IsIsolatedToken = false;
989       }
990       InTok = true;
991       continue;
992     }
993     if (Variant.TokenizingCharacters.find(Char) != std::string::npos) {
994       if (InTok) {
995         addAsmOperand(String.slice(Prev, i), IsIsolatedToken);
996         InTok = false;
997         IsIsolatedToken = false;
998       }
999       addAsmOperand(String.slice(i, i + 1), IsIsolatedToken);
1000       Prev = i + 1;
1001       IsIsolatedToken = true;
1002       continue;
1003     }
1004     if (Variant.SeparatorCharacters.find(Char) != std::string::npos) {
1005       if (InTok) {
1006         addAsmOperand(String.slice(Prev, i), IsIsolatedToken);
1007         InTok = false;
1008       }
1009       Prev = i + 1;
1010       IsIsolatedToken = true;
1011       continue;
1012     }
1013 
1014     switch (Char) {
1015     case '\\':
1016       if (InTok) {
1017         addAsmOperand(String.slice(Prev, i), false);
1018         InTok = false;
1019         IsIsolatedToken = false;
1020       }
1021       ++i;
1022       assert(i != String.size() && "Invalid quoted character");
1023       addAsmOperand(String.slice(i, i + 1), IsIsolatedToken);
1024       Prev = i + 1;
1025       IsIsolatedToken = false;
1026       break;
1027 
1028     case '$': {
1029       if (InTok) {
1030         addAsmOperand(String.slice(Prev, i), IsIsolatedToken);
1031         InTok = false;
1032         IsIsolatedToken = false;
1033       }
1034 
1035       // If this isn't "${", start new identifier looking like "$xxx"
1036       if (i + 1 == String.size() || String[i + 1] != '{') {
1037         Prev = i;
1038         break;
1039       }
1040 
1041       size_t EndPos = String.find('}', i);
1042       assert(EndPos != StringRef::npos &&
1043              "Missing brace in operand reference!");
1044       addAsmOperand(String.slice(i, EndPos+1), IsIsolatedToken);
1045       Prev = EndPos + 1;
1046       i = EndPos;
1047       IsIsolatedToken = false;
1048       break;
1049     }
1050 
1051     default:
1052       InTok = true;
1053       break;
1054     }
1055   }
1056   if (InTok && Prev != String.size())
1057     addAsmOperand(String.substr(Prev), IsIsolatedToken);
1058 }
1059 
1060 bool MatchableInfo::validate(StringRef CommentDelimiter, bool IsAlias) const {
1061   // Reject matchables with no .s string.
1062   if (AsmString.empty())
1063     PrintFatalError(TheDef->getLoc(), "instruction with empty asm string");
1064 
1065   // Reject any matchables with a newline in them, they should be marked
1066   // isCodeGenOnly if they are pseudo instructions.
1067   if (AsmString.find('\n') != std::string::npos)
1068     PrintFatalError(TheDef->getLoc(),
1069                   "multiline instruction is not valid for the asmparser, "
1070                   "mark it isCodeGenOnly");
1071 
1072   // Remove comments from the asm string.  We know that the asmstring only
1073   // has one line.
1074   if (!CommentDelimiter.empty() &&
1075       StringRef(AsmString).contains(CommentDelimiter))
1076     PrintFatalError(TheDef->getLoc(),
1077                   "asmstring for instruction has comment character in it, "
1078                   "mark it isCodeGenOnly");
1079 
1080   // Reject matchables with operand modifiers, these aren't something we can
1081   // handle, the target should be refactored to use operands instead of
1082   // modifiers.
1083   //
1084   // Also, check for instructions which reference the operand multiple times,
1085   // if they don't define a custom AsmMatcher: this implies a constraint that
1086   // the built-in matching code would not honor.
1087   std::set<std::string> OperandNames;
1088   for (const AsmOperand &Op : AsmOperands) {
1089     StringRef Tok = Op.Token;
1090     if (Tok[0] == '$' && Tok.contains(':'))
1091       PrintFatalError(TheDef->getLoc(),
1092                       "matchable with operand modifier '" + Tok +
1093                       "' not supported by asm matcher.  Mark isCodeGenOnly!");
1094     // Verify that any operand is only mentioned once.
1095     // We reject aliases and ignore instructions for now.
1096     if (!IsAlias && TheDef->getValueAsString("AsmMatchConverter").empty() &&
1097         Tok[0] == '$' && !OperandNames.insert(std::string(Tok)).second) {
1098       LLVM_DEBUG({
1099         errs() << "warning: '" << TheDef->getName() << "': "
1100                << "ignoring instruction with tied operand '"
1101                << Tok << "'\n";
1102       });
1103       return false;
1104     }
1105   }
1106 
1107   return true;
1108 }
1109 
1110 static std::string getEnumNameForToken(StringRef Str) {
1111   std::string Res;
1112 
1113   for (char C : Str) {
1114     switch (C) {
1115     case '*': Res += "_STAR_"; break;
1116     case '%': Res += "_PCT_"; break;
1117     case ':': Res += "_COLON_"; break;
1118     case '!': Res += "_EXCLAIM_"; break;
1119     case '.': Res += "_DOT_"; break;
1120     case '<': Res += "_LT_"; break;
1121     case '>': Res += "_GT_"; break;
1122     case '-': Res += "_MINUS_"; break;
1123     case '#': Res += "_HASH_"; break;
1124     default:
1125       if (isAlnum(C))
1126         Res += C;
1127       else
1128         Res += "_" + utostr((unsigned)C) + "_";
1129     }
1130   }
1131 
1132   return Res;
1133 }
1134 
1135 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
1136   ClassInfo *&Entry = TokenClasses[std::string(Token)];
1137 
1138   if (!Entry) {
1139     Classes.emplace_front();
1140     Entry = &Classes.front();
1141     Entry->Kind = ClassInfo::Token;
1142     Entry->ClassName = "Token";
1143     Entry->Name = "MCK_" + getEnumNameForToken(Token);
1144     Entry->ValueName = std::string(Token);
1145     Entry->PredicateMethod = "<invalid>";
1146     Entry->RenderMethod = "<invalid>";
1147     Entry->ParserMethod = "";
1148     Entry->DiagnosticType = "";
1149     Entry->IsOptional = false;
1150     Entry->DefaultMethod = "<invalid>";
1151   }
1152 
1153   return Entry;
1154 }
1155 
1156 ClassInfo *
1157 AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI,
1158                                 int SubOpIdx) {
1159   Record *Rec = OI.Rec;
1160   if (SubOpIdx != -1)
1161     Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef();
1162   return getOperandClass(Rec, SubOpIdx);
1163 }
1164 
1165 ClassInfo *
1166 AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
1167   if (Rec->isSubClassOf("RegisterOperand")) {
1168     // RegisterOperand may have an associated ParserMatchClass. If it does,
1169     // use it, else just fall back to the underlying register class.
1170     const RecordVal *R = Rec->getValue("ParserMatchClass");
1171     if (!R || !R->getValue())
1172       PrintFatalError(Rec->getLoc(),
1173                       "Record `" + Rec->getName() +
1174                           "' does not have a ParserMatchClass!\n");
1175 
1176     if (DefInit *DI= dyn_cast<DefInit>(R->getValue())) {
1177       Record *MatchClass = DI->getDef();
1178       if (ClassInfo *CI = AsmOperandClasses[MatchClass])
1179         return CI;
1180     }
1181 
1182     // No custom match class. Just use the register class.
1183     Record *ClassRec = Rec->getValueAsDef("RegClass");
1184     if (!ClassRec)
1185       PrintFatalError(Rec->getLoc(), "RegisterOperand `" + Rec->getName() +
1186                     "' has no associated register class!\n");
1187     if (ClassInfo *CI = RegisterClassClasses[ClassRec])
1188       return CI;
1189     PrintFatalError(Rec->getLoc(), "register class has no class info!");
1190   }
1191 
1192   if (Rec->isSubClassOf("RegisterClass")) {
1193     if (ClassInfo *CI = RegisterClassClasses[Rec])
1194       return CI;
1195     PrintFatalError(Rec->getLoc(), "register class has no class info!");
1196   }
1197 
1198   if (!Rec->isSubClassOf("Operand"))
1199     PrintFatalError(Rec->getLoc(), "Operand `" + Rec->getName() +
1200                   "' does not derive from class Operand!\n");
1201   Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
1202   if (ClassInfo *CI = AsmOperandClasses[MatchClass])
1203     return CI;
1204 
1205   PrintFatalError(Rec->getLoc(), "operand has no match class!");
1206 }
1207 
1208 struct LessRegisterSet {
1209   bool operator() (const RegisterSet &LHS, const RegisterSet & RHS) const {
1210     // std::set<T> defines its own compariso "operator<", but it
1211     // performs a lexicographical comparison by T's innate comparison
1212     // for some reason. We don't want non-deterministic pointer
1213     // comparisons so use this instead.
1214     return std::lexicographical_compare(LHS.begin(), LHS.end(),
1215                                         RHS.begin(), RHS.end(),
1216                                         LessRecordByID());
1217   }
1218 };
1219 
1220 void AsmMatcherInfo::
1221 buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
1222   const auto &Registers = Target.getRegBank().getRegisters();
1223   auto &RegClassList = Target.getRegBank().getRegClasses();
1224 
1225   typedef std::set<RegisterSet, LessRegisterSet> RegisterSetSet;
1226 
1227   // The register sets used for matching.
1228   RegisterSetSet RegisterSets;
1229 
1230   // Gather the defined sets.
1231   for (const CodeGenRegisterClass &RC : RegClassList)
1232     RegisterSets.insert(
1233         RegisterSet(RC.getOrder().begin(), RC.getOrder().end()));
1234 
1235   // Add any required singleton sets.
1236   for (Record *Rec : SingletonRegisters) {
1237     RegisterSets.insert(RegisterSet(&Rec, &Rec + 1));
1238   }
1239 
1240   // Introduce derived sets where necessary (when a register does not determine
1241   // a unique register set class), and build the mapping of registers to the set
1242   // they should classify to.
1243   std::map<Record*, RegisterSet> RegisterMap;
1244   for (const CodeGenRegister &CGR : Registers) {
1245     // Compute the intersection of all sets containing this register.
1246     RegisterSet ContainingSet;
1247 
1248     for (const RegisterSet &RS : RegisterSets) {
1249       if (!RS.count(CGR.TheDef))
1250         continue;
1251 
1252       if (ContainingSet.empty()) {
1253         ContainingSet = RS;
1254         continue;
1255       }
1256 
1257       RegisterSet Tmp;
1258       std::swap(Tmp, ContainingSet);
1259       std::insert_iterator<RegisterSet> II(ContainingSet,
1260                                            ContainingSet.begin());
1261       std::set_intersection(Tmp.begin(), Tmp.end(), RS.begin(), RS.end(), II,
1262                             LessRecordByID());
1263     }
1264 
1265     if (!ContainingSet.empty()) {
1266       RegisterSets.insert(ContainingSet);
1267       RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
1268     }
1269   }
1270 
1271   // Construct the register classes.
1272   std::map<RegisterSet, ClassInfo*, LessRegisterSet> RegisterSetClasses;
1273   unsigned Index = 0;
1274   for (const RegisterSet &RS : RegisterSets) {
1275     Classes.emplace_front();
1276     ClassInfo *CI = &Classes.front();
1277     CI->Kind = ClassInfo::RegisterClass0 + Index;
1278     CI->ClassName = "Reg" + utostr(Index);
1279     CI->Name = "MCK_Reg" + utostr(Index);
1280     CI->ValueName = "";
1281     CI->PredicateMethod = ""; // unused
1282     CI->RenderMethod = "addRegOperands";
1283     CI->Registers = RS;
1284     // FIXME: diagnostic type.
1285     CI->DiagnosticType = "";
1286     CI->IsOptional = false;
1287     CI->DefaultMethod = ""; // unused
1288     RegisterSetClasses.insert(std::make_pair(RS, CI));
1289     ++Index;
1290   }
1291 
1292   // Find the superclasses; we could compute only the subgroup lattice edges,
1293   // but there isn't really a point.
1294   for (const RegisterSet &RS : RegisterSets) {
1295     ClassInfo *CI = RegisterSetClasses[RS];
1296     for (const RegisterSet &RS2 : RegisterSets)
1297       if (RS != RS2 &&
1298           std::includes(RS2.begin(), RS2.end(), RS.begin(), RS.end(),
1299                         LessRecordByID()))
1300         CI->SuperClasses.push_back(RegisterSetClasses[RS2]);
1301   }
1302 
1303   // Name the register classes which correspond to a user defined RegisterClass.
1304   for (const CodeGenRegisterClass &RC : RegClassList) {
1305     // Def will be NULL for non-user defined register classes.
1306     Record *Def = RC.getDef();
1307     if (!Def)
1308       continue;
1309     ClassInfo *CI = RegisterSetClasses[RegisterSet(RC.getOrder().begin(),
1310                                                    RC.getOrder().end())];
1311     if (CI->ValueName.empty()) {
1312       CI->ClassName = RC.getName();
1313       CI->Name = "MCK_" + RC.getName();
1314       CI->ValueName = RC.getName();
1315     } else
1316       CI->ValueName = CI->ValueName + "," + RC.getName();
1317 
1318     Init *DiagnosticType = Def->getValueInit("DiagnosticType");
1319     if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
1320       CI->DiagnosticType = std::string(SI->getValue());
1321 
1322     Init *DiagnosticString = Def->getValueInit("DiagnosticString");
1323     if (StringInit *SI = dyn_cast<StringInit>(DiagnosticString))
1324       CI->DiagnosticString = std::string(SI->getValue());
1325 
1326     // If we have a diagnostic string but the diagnostic type is not specified
1327     // explicitly, create an anonymous diagnostic type.
1328     if (!CI->DiagnosticString.empty() && CI->DiagnosticType.empty())
1329       CI->DiagnosticType = RC.getName();
1330 
1331     RegisterClassClasses.insert(std::make_pair(Def, CI));
1332   }
1333 
1334   // Populate the map for individual registers.
1335   for (auto &It : RegisterMap)
1336     RegisterClasses[It.first] = RegisterSetClasses[It.second];
1337 
1338   // Name the register classes which correspond to singleton registers.
1339   for (Record *Rec : SingletonRegisters) {
1340     ClassInfo *CI = RegisterClasses[Rec];
1341     assert(CI && "Missing singleton register class info!");
1342 
1343     if (CI->ValueName.empty()) {
1344       CI->ClassName = std::string(Rec->getName());
1345       CI->Name = "MCK_" + Rec->getName().str();
1346       CI->ValueName = std::string(Rec->getName());
1347     } else
1348       CI->ValueName = CI->ValueName + "," + Rec->getName().str();
1349   }
1350 }
1351 
1352 void AsmMatcherInfo::buildOperandClasses() {
1353   std::vector<Record*> AsmOperands =
1354     Records.getAllDerivedDefinitions("AsmOperandClass");
1355 
1356   // Pre-populate AsmOperandClasses map.
1357   for (Record *Rec : AsmOperands) {
1358     Classes.emplace_front();
1359     AsmOperandClasses[Rec] = &Classes.front();
1360   }
1361 
1362   unsigned Index = 0;
1363   for (Record *Rec : AsmOperands) {
1364     ClassInfo *CI = AsmOperandClasses[Rec];
1365     CI->Kind = ClassInfo::UserClass0 + Index;
1366 
1367     ListInit *Supers = Rec->getValueAsListInit("SuperClasses");
1368     for (Init *I : Supers->getValues()) {
1369       DefInit *DI = dyn_cast<DefInit>(I);
1370       if (!DI) {
1371         PrintError(Rec->getLoc(), "Invalid super class reference!");
1372         continue;
1373       }
1374 
1375       ClassInfo *SC = AsmOperandClasses[DI->getDef()];
1376       if (!SC)
1377         PrintError(Rec->getLoc(), "Invalid super class reference!");
1378       else
1379         CI->SuperClasses.push_back(SC);
1380     }
1381     CI->ClassName = std::string(Rec->getValueAsString("Name"));
1382     CI->Name = "MCK_" + CI->ClassName;
1383     CI->ValueName = std::string(Rec->getName());
1384 
1385     // Get or construct the predicate method name.
1386     Init *PMName = Rec->getValueInit("PredicateMethod");
1387     if (StringInit *SI = dyn_cast<StringInit>(PMName)) {
1388       CI->PredicateMethod = std::string(SI->getValue());
1389     } else {
1390       assert(isa<UnsetInit>(PMName) && "Unexpected PredicateMethod field!");
1391       CI->PredicateMethod = "is" + CI->ClassName;
1392     }
1393 
1394     // Get or construct the render method name.
1395     Init *RMName = Rec->getValueInit("RenderMethod");
1396     if (StringInit *SI = dyn_cast<StringInit>(RMName)) {
1397       CI->RenderMethod = std::string(SI->getValue());
1398     } else {
1399       assert(isa<UnsetInit>(RMName) && "Unexpected RenderMethod field!");
1400       CI->RenderMethod = "add" + CI->ClassName + "Operands";
1401     }
1402 
1403     // Get the parse method name or leave it as empty.
1404     Init *PRMName = Rec->getValueInit("ParserMethod");
1405     if (StringInit *SI = dyn_cast<StringInit>(PRMName))
1406       CI->ParserMethod = std::string(SI->getValue());
1407 
1408     // Get the diagnostic type and string or leave them as empty.
1409     Init *DiagnosticType = Rec->getValueInit("DiagnosticType");
1410     if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
1411       CI->DiagnosticType = std::string(SI->getValue());
1412     Init *DiagnosticString = Rec->getValueInit("DiagnosticString");
1413     if (StringInit *SI = dyn_cast<StringInit>(DiagnosticString))
1414       CI->DiagnosticString = std::string(SI->getValue());
1415     // If we have a DiagnosticString, we need a DiagnosticType for use within
1416     // the matcher.
1417     if (!CI->DiagnosticString.empty() && CI->DiagnosticType.empty())
1418       CI->DiagnosticType = CI->ClassName;
1419 
1420     Init *IsOptional = Rec->getValueInit("IsOptional");
1421     if (BitInit *BI = dyn_cast<BitInit>(IsOptional))
1422       CI->IsOptional = BI->getValue();
1423 
1424     // Get or construct the default method name.
1425     Init *DMName = Rec->getValueInit("DefaultMethod");
1426     if (StringInit *SI = dyn_cast<StringInit>(DMName)) {
1427       CI->DefaultMethod = std::string(SI->getValue());
1428     } else {
1429       assert(isa<UnsetInit>(DMName) && "Unexpected DefaultMethod field!");
1430       CI->DefaultMethod = "default" + CI->ClassName + "Operands";
1431     }
1432 
1433     ++Index;
1434   }
1435 }
1436 
1437 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser,
1438                                CodeGenTarget &target,
1439                                RecordKeeper &records)
1440   : Records(records), AsmParser(asmParser), Target(target) {
1441 }
1442 
1443 /// buildOperandMatchInfo - Build the necessary information to handle user
1444 /// defined operand parsing methods.
1445 void AsmMatcherInfo::buildOperandMatchInfo() {
1446 
1447   /// Map containing a mask with all operands indices that can be found for
1448   /// that class inside a instruction.
1449   typedef std::map<ClassInfo *, unsigned, deref<std::less<>>> OpClassMaskTy;
1450   OpClassMaskTy OpClassMask;
1451 
1452   for (const auto &MI : Matchables) {
1453     OpClassMask.clear();
1454 
1455     // Keep track of all operands of this instructions which belong to the
1456     // same class.
1457     for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
1458       const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
1459       if (Op.Class->ParserMethod.empty())
1460         continue;
1461       unsigned &OperandMask = OpClassMask[Op.Class];
1462       OperandMask |= (1 << i);
1463     }
1464 
1465     // Generate operand match info for each mnemonic/operand class pair.
1466     for (const auto &OCM : OpClassMask) {
1467       unsigned OpMask = OCM.second;
1468       ClassInfo *CI = OCM.first;
1469       OperandMatchInfo.push_back(OperandMatchEntry::create(MI.get(), CI,
1470                                                            OpMask));
1471     }
1472   }
1473 }
1474 
1475 void AsmMatcherInfo::buildInfo() {
1476   // Build information about all of the AssemblerPredicates.
1477   const std::vector<std::pair<Record *, SubtargetFeatureInfo>>
1478       &SubtargetFeaturePairs = SubtargetFeatureInfo::getAll(Records);
1479   SubtargetFeatures.insert(SubtargetFeaturePairs.begin(),
1480                            SubtargetFeaturePairs.end());
1481 #ifndef NDEBUG
1482   for (const auto &Pair : SubtargetFeatures)
1483     LLVM_DEBUG(Pair.second.dump());
1484 #endif // NDEBUG
1485 
1486   bool HasMnemonicFirst = AsmParser->getValueAsBit("HasMnemonicFirst");
1487   bool ReportMultipleNearMisses =
1488       AsmParser->getValueAsBit("ReportMultipleNearMisses");
1489 
1490   // Parse the instructions; we need to do this first so that we can gather the
1491   // singleton register classes.
1492   SmallPtrSet<Record*, 16> SingletonRegisters;
1493   unsigned VariantCount = Target.getAsmParserVariantCount();
1494   for (unsigned VC = 0; VC != VariantCount; ++VC) {
1495     Record *AsmVariant = Target.getAsmParserVariant(VC);
1496     StringRef CommentDelimiter =
1497         AsmVariant->getValueAsString("CommentDelimiter");
1498     AsmVariantInfo Variant;
1499     Variant.RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix");
1500     Variant.TokenizingCharacters =
1501         AsmVariant->getValueAsString("TokenizingCharacters");
1502     Variant.SeparatorCharacters =
1503         AsmVariant->getValueAsString("SeparatorCharacters");
1504     Variant.BreakCharacters =
1505         AsmVariant->getValueAsString("BreakCharacters");
1506     Variant.Name = AsmVariant->getValueAsString("Name");
1507     Variant.AsmVariantNo = AsmVariant->getValueAsInt("Variant");
1508 
1509     for (const CodeGenInstruction *CGI : Target.getInstructionsByEnumValue()) {
1510 
1511       // If the tblgen -match-prefix option is specified (for tblgen hackers),
1512       // filter the set of instructions we consider.
1513       if (!StringRef(CGI->TheDef->getName()).startswith(MatchPrefix))
1514         continue;
1515 
1516       // Ignore "codegen only" instructions.
1517       if (CGI->TheDef->getValueAsBit("isCodeGenOnly"))
1518         continue;
1519 
1520       // Ignore instructions for different instructions
1521       StringRef V = CGI->TheDef->getValueAsString("AsmVariantName");
1522       if (!V.empty() && V != Variant.Name)
1523         continue;
1524 
1525       auto II = std::make_unique<MatchableInfo>(*CGI);
1526 
1527       II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);
1528 
1529       // Ignore instructions which shouldn't be matched and diagnose invalid
1530       // instruction definitions with an error.
1531       if (!II->validate(CommentDelimiter, false))
1532         continue;
1533 
1534       Matchables.push_back(std::move(II));
1535     }
1536 
1537     // Parse all of the InstAlias definitions and stick them in the list of
1538     // matchables.
1539     std::vector<Record*> AllInstAliases =
1540       Records.getAllDerivedDefinitions("InstAlias");
1541     for (Record *InstAlias : AllInstAliases) {
1542       auto Alias = std::make_unique<CodeGenInstAlias>(InstAlias, Target);
1543 
1544       // If the tblgen -match-prefix option is specified (for tblgen hackers),
1545       // filter the set of instruction aliases we consider, based on the target
1546       // instruction.
1547       if (!StringRef(Alias->ResultInst->TheDef->getName())
1548             .startswith( MatchPrefix))
1549         continue;
1550 
1551       StringRef V = Alias->TheDef->getValueAsString("AsmVariantName");
1552       if (!V.empty() && V != Variant.Name)
1553         continue;
1554 
1555       auto II = std::make_unique<MatchableInfo>(std::move(Alias));
1556 
1557       II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);
1558 
1559       // Validate the alias definitions.
1560       II->validate(CommentDelimiter, true);
1561 
1562       Matchables.push_back(std::move(II));
1563     }
1564   }
1565 
1566   // Build info for the register classes.
1567   buildRegisterClasses(SingletonRegisters);
1568 
1569   // Build info for the user defined assembly operand classes.
1570   buildOperandClasses();
1571 
1572   // Build the information about matchables, now that we have fully formed
1573   // classes.
1574   std::vector<std::unique_ptr<MatchableInfo>> NewMatchables;
1575   for (auto &II : Matchables) {
1576     // Parse the tokens after the mnemonic.
1577     // Note: buildInstructionOperandReference may insert new AsmOperands, so
1578     // don't precompute the loop bound.
1579     for (unsigned i = 0; i != II->AsmOperands.size(); ++i) {
1580       MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
1581       StringRef Token = Op.Token;
1582 
1583       // Check for singleton registers.
1584       if (Record *RegRecord = Op.SingletonReg) {
1585         Op.Class = RegisterClasses[RegRecord];
1586         assert(Op.Class && Op.Class->Registers.size() == 1 &&
1587                "Unexpected class for singleton register");
1588         continue;
1589       }
1590 
1591       // Check for simple tokens.
1592       if (Token[0] != '$') {
1593         Op.Class = getTokenClass(Token);
1594         continue;
1595       }
1596 
1597       if (Token.size() > 1 && isdigit(Token[1])) {
1598         Op.Class = getTokenClass(Token);
1599         continue;
1600       }
1601 
1602       // Otherwise this is an operand reference.
1603       StringRef OperandName;
1604       if (Token[1] == '{')
1605         OperandName = Token.substr(2, Token.size() - 3);
1606       else
1607         OperandName = Token.substr(1);
1608 
1609       if (II->DefRec.is<const CodeGenInstruction*>())
1610         buildInstructionOperandReference(II.get(), OperandName, i);
1611       else
1612         buildAliasOperandReference(II.get(), OperandName, Op);
1613     }
1614 
1615     if (II->DefRec.is<const CodeGenInstruction*>()) {
1616       II->buildInstructionResultOperands();
1617       // If the instruction has a two-operand alias, build up the
1618       // matchable here. We'll add them in bulk at the end to avoid
1619       // confusing this loop.
1620       StringRef Constraint =
1621           II->TheDef->getValueAsString("TwoOperandAliasConstraint");
1622       if (Constraint != "") {
1623         // Start by making a copy of the original matchable.
1624         auto AliasII = std::make_unique<MatchableInfo>(*II);
1625 
1626         // Adjust it to be a two-operand alias.
1627         AliasII->formTwoOperandAlias(Constraint);
1628 
1629         // Add the alias to the matchables list.
1630         NewMatchables.push_back(std::move(AliasII));
1631       }
1632     } else
1633       // FIXME: The tied operands checking is not yet integrated with the
1634       // framework for reporting multiple near misses. To prevent invalid
1635       // formats from being matched with an alias if a tied-operands check
1636       // would otherwise have disallowed it, we just disallow such constructs
1637       // in TableGen completely.
1638       II->buildAliasResultOperands(!ReportMultipleNearMisses);
1639   }
1640   if (!NewMatchables.empty())
1641     Matchables.insert(Matchables.end(),
1642                       std::make_move_iterator(NewMatchables.begin()),
1643                       std::make_move_iterator(NewMatchables.end()));
1644 
1645   // Process token alias definitions and set up the associated superclass
1646   // information.
1647   std::vector<Record*> AllTokenAliases =
1648     Records.getAllDerivedDefinitions("TokenAlias");
1649   for (Record *Rec : AllTokenAliases) {
1650     ClassInfo *FromClass = getTokenClass(Rec->getValueAsString("FromToken"));
1651     ClassInfo *ToClass = getTokenClass(Rec->getValueAsString("ToToken"));
1652     if (FromClass == ToClass)
1653       PrintFatalError(Rec->getLoc(),
1654                     "error: Destination value identical to source value.");
1655     FromClass->SuperClasses.push_back(ToClass);
1656   }
1657 
1658   // Reorder classes so that classes precede super classes.
1659   Classes.sort();
1660 
1661 #ifdef EXPENSIVE_CHECKS
1662   // Verify that the table is sorted and operator < works transitively.
1663   for (auto I = Classes.begin(), E = Classes.end(); I != E; ++I) {
1664     for (auto J = I; J != E; ++J) {
1665       assert(!(*J < *I));
1666       assert(I == J || !J->isSubsetOf(*I));
1667     }
1668   }
1669 #endif
1670 }
1671 
1672 /// buildInstructionOperandReference - The specified operand is a reference to a
1673 /// named operand such as $src.  Resolve the Class and OperandInfo pointers.
1674 void AsmMatcherInfo::
1675 buildInstructionOperandReference(MatchableInfo *II,
1676                                  StringRef OperandName,
1677                                  unsigned AsmOpIdx) {
1678   const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
1679   const CGIOperandList &Operands = CGI.Operands;
1680   MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx];
1681 
1682   // Map this token to an operand.
1683   unsigned Idx;
1684   if (!Operands.hasOperandNamed(OperandName, Idx))
1685     PrintFatalError(II->TheDef->getLoc(),
1686                     "error: unable to find operand: '" + OperandName + "'");
1687 
1688   // If the instruction operand has multiple suboperands, but the parser
1689   // match class for the asm operand is still the default "ImmAsmOperand",
1690   // then handle each suboperand separately.
1691   if (Op->SubOpIdx == -1 && Operands[Idx].MINumOperands > 1) {
1692     Record *Rec = Operands[Idx].Rec;
1693     assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
1694     Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
1695     if (MatchClass && MatchClass->getValueAsString("Name") == "Imm") {
1696       // Insert remaining suboperands after AsmOpIdx in II->AsmOperands.
1697       StringRef Token = Op->Token; // save this in case Op gets moved
1698       for (unsigned SI = 1, SE = Operands[Idx].MINumOperands; SI != SE; ++SI) {
1699         MatchableInfo::AsmOperand NewAsmOp(/*IsIsolatedToken=*/true, Token);
1700         NewAsmOp.SubOpIdx = SI;
1701         II->AsmOperands.insert(II->AsmOperands.begin()+AsmOpIdx+SI, NewAsmOp);
1702       }
1703       // Replace Op with first suboperand.
1704       Op = &II->AsmOperands[AsmOpIdx]; // update the pointer in case it moved
1705       Op->SubOpIdx = 0;
1706     }
1707   }
1708 
1709   // Set up the operand class.
1710   Op->Class = getOperandClass(Operands[Idx], Op->SubOpIdx);
1711   Op->OrigSrcOpName = OperandName;
1712 
1713   // If the named operand is tied, canonicalize it to the untied operand.
1714   // For example, something like:
1715   //   (outs GPR:$dst), (ins GPR:$src)
1716   // with an asmstring of
1717   //   "inc $src"
1718   // we want to canonicalize to:
1719   //   "inc $dst"
1720   // so that we know how to provide the $dst operand when filling in the result.
1721   int OITied = -1;
1722   if (Operands[Idx].MINumOperands == 1)
1723     OITied = Operands[Idx].getTiedRegister();
1724   if (OITied != -1) {
1725     // The tied operand index is an MIOperand index, find the operand that
1726     // contains it.
1727     std::pair<unsigned, unsigned> Idx = Operands.getSubOperandNumber(OITied);
1728     OperandName = Operands[Idx.first].Name;
1729     Op->SubOpIdx = Idx.second;
1730   }
1731 
1732   Op->SrcOpName = OperandName;
1733 }
1734 
1735 /// buildAliasOperandReference - When parsing an operand reference out of the
1736 /// matching string (e.g. "movsx $src, $dst"), determine what the class of the
1737 /// operand reference is by looking it up in the result pattern definition.
1738 void AsmMatcherInfo::buildAliasOperandReference(MatchableInfo *II,
1739                                                 StringRef OperandName,
1740                                                 MatchableInfo::AsmOperand &Op) {
1741   const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
1742 
1743   // Set up the operand class.
1744   for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i)
1745     if (CGA.ResultOperands[i].isRecord() &&
1746         CGA.ResultOperands[i].getName() == OperandName) {
1747       // It's safe to go with the first one we find, because CodeGenInstAlias
1748       // validates that all operands with the same name have the same record.
1749       Op.SubOpIdx = CGA.ResultInstOperandIndex[i].second;
1750       // Use the match class from the Alias definition, not the
1751       // destination instruction, as we may have an immediate that's
1752       // being munged by the match class.
1753       Op.Class = getOperandClass(CGA.ResultOperands[i].getRecord(),
1754                                  Op.SubOpIdx);
1755       Op.SrcOpName = OperandName;
1756       Op.OrigSrcOpName = OperandName;
1757       return;
1758     }
1759 
1760   PrintFatalError(II->TheDef->getLoc(),
1761                   "error: unable to find operand: '" + OperandName + "'");
1762 }
1763 
1764 void MatchableInfo::buildInstructionResultOperands() {
1765   const CodeGenInstruction *ResultInst = getResultInst();
1766 
1767   // Loop over all operands of the result instruction, determining how to
1768   // populate them.
1769   for (const CGIOperandList::OperandInfo &OpInfo : ResultInst->Operands) {
1770     // If this is a tied operand, just copy from the previously handled operand.
1771     int TiedOp = -1;
1772     if (OpInfo.MINumOperands == 1)
1773       TiedOp = OpInfo.getTiedRegister();
1774     if (TiedOp != -1) {
1775       int TiedSrcOperand = findAsmOperandOriginallyNamed(OpInfo.Name);
1776       if (TiedSrcOperand != -1 &&
1777           ResOperands[TiedOp].Kind == ResOperand::RenderAsmOperand)
1778         ResOperands.push_back(ResOperand::getTiedOp(
1779             TiedOp, ResOperands[TiedOp].AsmOperandNum, TiedSrcOperand));
1780       else
1781         ResOperands.push_back(ResOperand::getTiedOp(TiedOp, 0, 0));
1782       continue;
1783     }
1784 
1785     int SrcOperand = findAsmOperandNamed(OpInfo.Name);
1786     if (OpInfo.Name.empty() || SrcOperand == -1) {
1787       // This may happen for operands that are tied to a suboperand of a
1788       // complex operand.  Simply use a dummy value here; nobody should
1789       // use this operand slot.
1790       // FIXME: The long term goal is for the MCOperand list to not contain
1791       // tied operands at all.
1792       ResOperands.push_back(ResOperand::getImmOp(0));
1793       continue;
1794     }
1795 
1796     // Check if the one AsmOperand populates the entire operand.
1797     unsigned NumOperands = OpInfo.MINumOperands;
1798     if (AsmOperands[SrcOperand].SubOpIdx == -1) {
1799       ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, NumOperands));
1800       continue;
1801     }
1802 
1803     // Add a separate ResOperand for each suboperand.
1804     for (unsigned AI = 0; AI < NumOperands; ++AI) {
1805       assert(AsmOperands[SrcOperand+AI].SubOpIdx == (int)AI &&
1806              AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name &&
1807              "unexpected AsmOperands for suboperands");
1808       ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand + AI, 1));
1809     }
1810   }
1811 }
1812 
1813 void MatchableInfo::buildAliasResultOperands(bool AliasConstraintsAreChecked) {
1814   const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
1815   const CodeGenInstruction *ResultInst = getResultInst();
1816 
1817   // Map of:  $reg -> #lastref
1818   //   where $reg is the name of the operand in the asm string
1819   //   where #lastref is the last processed index where $reg was referenced in
1820   //   the asm string.
1821   SmallDenseMap<StringRef, int> OperandRefs;
1822 
1823   // Loop over all operands of the result instruction, determining how to
1824   // populate them.
1825   unsigned AliasOpNo = 0;
1826   unsigned LastOpNo = CGA.ResultInstOperandIndex.size();
1827   for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
1828     const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i];
1829 
1830     // If this is a tied operand, just copy from the previously handled operand.
1831     int TiedOp = -1;
1832     if (OpInfo->MINumOperands == 1)
1833       TiedOp = OpInfo->getTiedRegister();
1834     if (TiedOp != -1) {
1835       unsigned SrcOp1 = 0;
1836       unsigned SrcOp2 = 0;
1837 
1838       // If an operand has been specified twice in the asm string,
1839       // add the two source operand's indices to the TiedOp so that
1840       // at runtime the 'tied' constraint is checked.
1841       if (ResOperands[TiedOp].Kind == ResOperand::RenderAsmOperand) {
1842         SrcOp1 = ResOperands[TiedOp].AsmOperandNum;
1843 
1844         // Find the next operand (similarly named operand) in the string.
1845         StringRef Name = AsmOperands[SrcOp1].SrcOpName;
1846         auto Insert = OperandRefs.try_emplace(Name, SrcOp1);
1847         SrcOp2 = findAsmOperandNamed(Name, Insert.first->second);
1848 
1849         // Not updating the record in OperandRefs will cause TableGen
1850         // to fail with an error at the end of this function.
1851         if (AliasConstraintsAreChecked)
1852           Insert.first->second = SrcOp2;
1853 
1854         // In case it only has one reference in the asm string,
1855         // it doesn't need to be checked for tied constraints.
1856         SrcOp2 = (SrcOp2 == (unsigned)-1) ? SrcOp1 : SrcOp2;
1857       }
1858 
1859       // If the alias operand is of a different operand class, we only want
1860       // to benefit from the tied-operands check and just match the operand
1861       // as a normal, but not copy the original (TiedOp) to the result
1862       // instruction. We do this by passing -1 as the tied operand to copy.
1863       if (ResultInst->Operands[i].Rec->getName() !=
1864           ResultInst->Operands[TiedOp].Rec->getName()) {
1865         SrcOp1 = ResOperands[TiedOp].AsmOperandNum;
1866         int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second;
1867         StringRef Name = CGA.ResultOperands[AliasOpNo].getName();
1868         SrcOp2 = findAsmOperand(Name, SubIdx);
1869         ResOperands.push_back(
1870             ResOperand::getTiedOp((unsigned)-1, SrcOp1, SrcOp2));
1871       } else {
1872         ResOperands.push_back(ResOperand::getTiedOp(TiedOp, SrcOp1, SrcOp2));
1873         continue;
1874       }
1875     }
1876 
1877     // Handle all the suboperands for this operand.
1878     const std::string &OpName = OpInfo->Name;
1879     for ( ; AliasOpNo <  LastOpNo &&
1880             CGA.ResultInstOperandIndex[AliasOpNo].first == i; ++AliasOpNo) {
1881       int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second;
1882 
1883       // Find out what operand from the asmparser that this MCInst operand
1884       // comes from.
1885       switch (CGA.ResultOperands[AliasOpNo].Kind) {
1886       case CodeGenInstAlias::ResultOperand::K_Record: {
1887         StringRef Name = CGA.ResultOperands[AliasOpNo].getName();
1888         int SrcOperand = findAsmOperand(Name, SubIdx);
1889         if (SrcOperand == -1)
1890           PrintFatalError(TheDef->getLoc(), "Instruction '" +
1891                         TheDef->getName() + "' has operand '" + OpName +
1892                         "' that doesn't appear in asm string!");
1893 
1894         // Add it to the operand references. If it is added a second time, the
1895         // record won't be updated and it will fail later on.
1896         OperandRefs.try_emplace(Name, SrcOperand);
1897 
1898         unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1);
1899         ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand,
1900                                                         NumOperands));
1901         break;
1902       }
1903       case CodeGenInstAlias::ResultOperand::K_Imm: {
1904         int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm();
1905         ResOperands.push_back(ResOperand::getImmOp(ImmVal));
1906         break;
1907       }
1908       case CodeGenInstAlias::ResultOperand::K_Reg: {
1909         Record *Reg = CGA.ResultOperands[AliasOpNo].getRegister();
1910         ResOperands.push_back(ResOperand::getRegOp(Reg));
1911         break;
1912       }
1913       }
1914     }
1915   }
1916 
1917   // Check that operands are not repeated more times than is supported.
1918   for (auto &T : OperandRefs) {
1919     if (T.second != -1 && findAsmOperandNamed(T.first, T.second) != -1)
1920       PrintFatalError(TheDef->getLoc(),
1921                       "Operand '" + T.first + "' can never be matched");
1922   }
1923 }
1924 
1925 static unsigned
1926 getConverterOperandID(const std::string &Name,
1927                       SmallSetVector<CachedHashString, 16> &Table,
1928                       bool &IsNew) {
1929   IsNew = Table.insert(CachedHashString(Name));
1930 
1931   unsigned ID = IsNew ? Table.size() - 1 : find(Table, Name) - Table.begin();
1932 
1933   assert(ID < Table.size());
1934 
1935   return ID;
1936 }
1937 
1938 static unsigned
1939 emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
1940                  std::vector<std::unique_ptr<MatchableInfo>> &Infos,
1941                  bool HasMnemonicFirst, bool HasOptionalOperands,
1942                  raw_ostream &OS) {
1943   SmallSetVector<CachedHashString, 16> OperandConversionKinds;
1944   SmallSetVector<CachedHashString, 16> InstructionConversionKinds;
1945   std::vector<std::vector<uint8_t> > ConversionTable;
1946   size_t MaxRowLength = 2; // minimum is custom converter plus terminator.
1947 
1948   // TargetOperandClass - This is the target's operand class, like X86Operand.
1949   std::string TargetOperandClass = Target.getName().str() + "Operand";
1950 
1951   // Write the convert function to a separate stream, so we can drop it after
1952   // the enum. We'll build up the conversion handlers for the individual
1953   // operand types opportunistically as we encounter them.
1954   std::string ConvertFnBody;
1955   raw_string_ostream CvtOS(ConvertFnBody);
1956   // Start the unified conversion function.
1957   if (HasOptionalOperands) {
1958     CvtOS << "void " << Target.getName() << ClassName << "::\n"
1959           << "convertToMCInst(unsigned Kind, MCInst &Inst, "
1960           << "unsigned Opcode,\n"
1961           << "                const OperandVector &Operands,\n"
1962           << "                const SmallBitVector &OptionalOperandsMask) {\n";
1963   } else {
1964     CvtOS << "void " << Target.getName() << ClassName << "::\n"
1965           << "convertToMCInst(unsigned Kind, MCInst &Inst, "
1966           << "unsigned Opcode,\n"
1967           << "                const OperandVector &Operands) {\n";
1968   }
1969   CvtOS << "  assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n";
1970   CvtOS << "  const uint8_t *Converter = ConversionTable[Kind];\n";
1971   if (HasOptionalOperands) {
1972     size_t MaxNumOperands = 0;
1973     for (const auto &MI : Infos) {
1974       MaxNumOperands = std::max(MaxNumOperands, MI->AsmOperands.size());
1975     }
1976     CvtOS << "  unsigned DefaultsOffset[" << (MaxNumOperands + 1)
1977           << "] = { 0 };\n";
1978     CvtOS << "  assert(OptionalOperandsMask.size() == " << (MaxNumOperands)
1979           << ");\n";
1980     CvtOS << "  for (unsigned i = 0, NumDefaults = 0; i < " << (MaxNumOperands)
1981           << "; ++i) {\n";
1982     CvtOS << "    DefaultsOffset[i + 1] = NumDefaults;\n";
1983     CvtOS << "    NumDefaults += (OptionalOperandsMask[i] ? 1 : 0);\n";
1984     CvtOS << "  }\n";
1985   }
1986   CvtOS << "  unsigned OpIdx;\n";
1987   CvtOS << "  Inst.setOpcode(Opcode);\n";
1988   CvtOS << "  for (const uint8_t *p = Converter; *p; p += 2) {\n";
1989   if (HasOptionalOperands) {
1990     CvtOS << "    OpIdx = *(p + 1) - DefaultsOffset[*(p + 1)];\n";
1991   } else {
1992     CvtOS << "    OpIdx = *(p + 1);\n";
1993   }
1994   CvtOS << "    switch (*p) {\n";
1995   CvtOS << "    default: llvm_unreachable(\"invalid conversion entry!\");\n";
1996   CvtOS << "    case CVT_Reg:\n";
1997   CvtOS << "      static_cast<" << TargetOperandClass
1998         << " &>(*Operands[OpIdx]).addRegOperands(Inst, 1);\n";
1999   CvtOS << "      break;\n";
2000   CvtOS << "    case CVT_Tied: {\n";
2001   CvtOS << "      assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -\n";
2002   CvtOS << "                              std::begin(TiedAsmOperandTable)) &&\n";
2003   CvtOS << "             \"Tied operand not found\");\n";
2004   CvtOS << "      unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];\n";
2005   CvtOS << "      if (TiedResOpnd != (uint8_t)-1)\n";
2006   CvtOS << "        Inst.addOperand(Inst.getOperand(TiedResOpnd));\n";
2007   CvtOS << "      break;\n";
2008   CvtOS << "    }\n";
2009 
2010   std::string OperandFnBody;
2011   raw_string_ostream OpOS(OperandFnBody);
2012   // Start the operand number lookup function.
2013   OpOS << "void " << Target.getName() << ClassName << "::\n"
2014        << "convertToMapAndConstraints(unsigned Kind,\n";
2015   OpOS.indent(27);
2016   OpOS << "const OperandVector &Operands) {\n"
2017        << "  assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n"
2018        << "  unsigned NumMCOperands = 0;\n"
2019        << "  const uint8_t *Converter = ConversionTable[Kind];\n"
2020        << "  for (const uint8_t *p = Converter; *p; p += 2) {\n"
2021        << "    switch (*p) {\n"
2022        << "    default: llvm_unreachable(\"invalid conversion entry!\");\n"
2023        << "    case CVT_Reg:\n"
2024        << "      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
2025        << "      Operands[*(p + 1)]->setConstraint(\"r\");\n"
2026        << "      ++NumMCOperands;\n"
2027        << "      break;\n"
2028        << "    case CVT_Tied:\n"
2029        << "      ++NumMCOperands;\n"
2030        << "      break;\n";
2031 
2032   // Pre-populate the operand conversion kinds with the standard always
2033   // available entries.
2034   OperandConversionKinds.insert(CachedHashString("CVT_Done"));
2035   OperandConversionKinds.insert(CachedHashString("CVT_Reg"));
2036   OperandConversionKinds.insert(CachedHashString("CVT_Tied"));
2037   enum { CVT_Done, CVT_Reg, CVT_Tied };
2038 
2039   // Map of e.g. <0, 2, 3> -> "Tie_0_2_3" enum label.
2040   std::map<std::tuple<uint8_t, uint8_t, uint8_t>, std::string>
2041   TiedOperandsEnumMap;
2042 
2043   for (auto &II : Infos) {
2044     // Check if we have a custom match function.
2045     StringRef AsmMatchConverter =
2046         II->getResultInst()->TheDef->getValueAsString("AsmMatchConverter");
2047     if (!AsmMatchConverter.empty() && II->UseInstAsmMatchConverter) {
2048       std::string Signature = ("ConvertCustom_" + AsmMatchConverter).str();
2049       II->ConversionFnKind = Signature;
2050 
2051       // Check if we have already generated this signature.
2052       if (!InstructionConversionKinds.insert(CachedHashString(Signature)))
2053         continue;
2054 
2055       // Remember this converter for the kind enum.
2056       unsigned KindID = OperandConversionKinds.size();
2057       OperandConversionKinds.insert(
2058           CachedHashString("CVT_" + getEnumNameForToken(AsmMatchConverter)));
2059 
2060       // Add the converter row for this instruction.
2061       ConversionTable.emplace_back();
2062       ConversionTable.back().push_back(KindID);
2063       ConversionTable.back().push_back(CVT_Done);
2064 
2065       // Add the handler to the conversion driver function.
2066       CvtOS << "    case CVT_"
2067             << getEnumNameForToken(AsmMatchConverter) << ":\n"
2068             << "      " << AsmMatchConverter << "(Inst, Operands);\n"
2069             << "      break;\n";
2070 
2071       // FIXME: Handle the operand number lookup for custom match functions.
2072       continue;
2073     }
2074 
2075     // Build the conversion function signature.
2076     std::string Signature = "Convert";
2077 
2078     std::vector<uint8_t> ConversionRow;
2079 
2080     // Compute the convert enum and the case body.
2081     MaxRowLength = std::max(MaxRowLength, II->ResOperands.size()*2 + 1 );
2082 
2083     for (unsigned i = 0, e = II->ResOperands.size(); i != e; ++i) {
2084       const MatchableInfo::ResOperand &OpInfo = II->ResOperands[i];
2085 
2086       // Generate code to populate each result operand.
2087       switch (OpInfo.Kind) {
2088       case MatchableInfo::ResOperand::RenderAsmOperand: {
2089         // This comes from something we parsed.
2090         const MatchableInfo::AsmOperand &Op =
2091           II->AsmOperands[OpInfo.AsmOperandNum];
2092 
2093         // Registers are always converted the same, don't duplicate the
2094         // conversion function based on them.
2095         Signature += "__";
2096         std::string Class;
2097         Class = Op.Class->isRegisterClass() ? "Reg" : Op.Class->ClassName;
2098         Signature += Class;
2099         Signature += utostr(OpInfo.MINumOperands);
2100         Signature += "_" + itostr(OpInfo.AsmOperandNum);
2101 
2102         // Add the conversion kind, if necessary, and get the associated ID
2103         // the index of its entry in the vector).
2104         std::string Name = "CVT_" + (Op.Class->isRegisterClass() ? "Reg" :
2105                                      Op.Class->RenderMethod);
2106         if (Op.Class->IsOptional) {
2107           // For optional operands we must also care about DefaultMethod
2108           assert(HasOptionalOperands);
2109           Name += "_" + Op.Class->DefaultMethod;
2110         }
2111         Name = getEnumNameForToken(Name);
2112 
2113         bool IsNewConverter = false;
2114         unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
2115                                             IsNewConverter);
2116 
2117         // Add the operand entry to the instruction kind conversion row.
2118         ConversionRow.push_back(ID);
2119         ConversionRow.push_back(OpInfo.AsmOperandNum + HasMnemonicFirst);
2120 
2121         if (!IsNewConverter)
2122           break;
2123 
2124         // This is a new operand kind. Add a handler for it to the
2125         // converter driver.
2126         CvtOS << "    case " << Name << ":\n";
2127         if (Op.Class->IsOptional) {
2128           // If optional operand is not present in actual instruction then we
2129           // should call its DefaultMethod before RenderMethod
2130           assert(HasOptionalOperands);
2131           CvtOS << "      if (OptionalOperandsMask[*(p + 1) - 1]) {\n"
2132                 << "        " << Op.Class->DefaultMethod << "()"
2133                 << "->" << Op.Class->RenderMethod << "(Inst, "
2134                 << OpInfo.MINumOperands << ");\n"
2135                 << "      } else {\n"
2136                 << "        static_cast<" << TargetOperandClass
2137                 << " &>(*Operands[OpIdx])." << Op.Class->RenderMethod
2138                 << "(Inst, " << OpInfo.MINumOperands << ");\n"
2139                 << "      }\n";
2140         } else {
2141           CvtOS << "      static_cast<" << TargetOperandClass
2142                 << " &>(*Operands[OpIdx])." << Op.Class->RenderMethod
2143                 << "(Inst, " << OpInfo.MINumOperands << ");\n";
2144         }
2145         CvtOS << "      break;\n";
2146 
2147         // Add a handler for the operand number lookup.
2148         OpOS << "    case " << Name << ":\n"
2149              << "      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n";
2150 
2151         if (Op.Class->isRegisterClass())
2152           OpOS << "      Operands[*(p + 1)]->setConstraint(\"r\");\n";
2153         else
2154           OpOS << "      Operands[*(p + 1)]->setConstraint(\"m\");\n";
2155         OpOS << "      NumMCOperands += " << OpInfo.MINumOperands << ";\n"
2156              << "      break;\n";
2157         break;
2158       }
2159       case MatchableInfo::ResOperand::TiedOperand: {
2160         // If this operand is tied to a previous one, just copy the MCInst
2161         // operand from the earlier one.We can only tie single MCOperand values.
2162         assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand");
2163         uint8_t TiedOp = OpInfo.TiedOperands.ResOpnd;
2164         uint8_t SrcOp1 =
2165             OpInfo.TiedOperands.SrcOpnd1Idx + HasMnemonicFirst;
2166         uint8_t SrcOp2 =
2167             OpInfo.TiedOperands.SrcOpnd2Idx + HasMnemonicFirst;
2168         assert((i > TiedOp || TiedOp == (uint8_t)-1) &&
2169                "Tied operand precedes its target!");
2170         auto TiedTupleName = std::string("Tie") + utostr(TiedOp) + '_' +
2171                              utostr(SrcOp1) + '_' + utostr(SrcOp2);
2172         Signature += "__" + TiedTupleName;
2173         ConversionRow.push_back(CVT_Tied);
2174         ConversionRow.push_back(TiedOp);
2175         ConversionRow.push_back(SrcOp1);
2176         ConversionRow.push_back(SrcOp2);
2177 
2178         // Also create an 'enum' for this combination of tied operands.
2179         auto Key = std::make_tuple(TiedOp, SrcOp1, SrcOp2);
2180         TiedOperandsEnumMap.emplace(Key, TiedTupleName);
2181         break;
2182       }
2183       case MatchableInfo::ResOperand::ImmOperand: {
2184         int64_t Val = OpInfo.ImmVal;
2185         std::string Ty = "imm_" + itostr(Val);
2186         Ty = getEnumNameForToken(Ty);
2187         Signature += "__" + Ty;
2188 
2189         std::string Name = "CVT_" + Ty;
2190         bool IsNewConverter = false;
2191         unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
2192                                             IsNewConverter);
2193         // Add the operand entry to the instruction kind conversion row.
2194         ConversionRow.push_back(ID);
2195         ConversionRow.push_back(0);
2196 
2197         if (!IsNewConverter)
2198           break;
2199 
2200         CvtOS << "    case " << Name << ":\n"
2201               << "      Inst.addOperand(MCOperand::createImm(" << Val << "));\n"
2202               << "      break;\n";
2203 
2204         OpOS << "    case " << Name << ":\n"
2205              << "      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
2206              << "      Operands[*(p + 1)]->setConstraint(\"\");\n"
2207              << "      ++NumMCOperands;\n"
2208              << "      break;\n";
2209         break;
2210       }
2211       case MatchableInfo::ResOperand::RegOperand: {
2212         std::string Reg, Name;
2213         if (!OpInfo.Register) {
2214           Name = "reg0";
2215           Reg = "0";
2216         } else {
2217           Reg = getQualifiedName(OpInfo.Register);
2218           Name = "reg" + OpInfo.Register->getName().str();
2219         }
2220         Signature += "__" + Name;
2221         Name = "CVT_" + Name;
2222         bool IsNewConverter = false;
2223         unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
2224                                             IsNewConverter);
2225         // Add the operand entry to the instruction kind conversion row.
2226         ConversionRow.push_back(ID);
2227         ConversionRow.push_back(0);
2228 
2229         if (!IsNewConverter)
2230           break;
2231         CvtOS << "    case " << Name << ":\n"
2232               << "      Inst.addOperand(MCOperand::createReg(" << Reg << "));\n"
2233               << "      break;\n";
2234 
2235         OpOS << "    case " << Name << ":\n"
2236              << "      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
2237              << "      Operands[*(p + 1)]->setConstraint(\"m\");\n"
2238              << "      ++NumMCOperands;\n"
2239              << "      break;\n";
2240       }
2241       }
2242     }
2243 
2244     // If there were no operands, add to the signature to that effect
2245     if (Signature == "Convert")
2246       Signature += "_NoOperands";
2247 
2248     II->ConversionFnKind = Signature;
2249 
2250     // Save the signature. If we already have it, don't add a new row
2251     // to the table.
2252     if (!InstructionConversionKinds.insert(CachedHashString(Signature)))
2253       continue;
2254 
2255     // Add the row to the table.
2256     ConversionTable.push_back(std::move(ConversionRow));
2257   }
2258 
2259   // Finish up the converter driver function.
2260   CvtOS << "    }\n  }\n}\n\n";
2261 
2262   // Finish up the operand number lookup function.
2263   OpOS << "    }\n  }\n}\n\n";
2264 
2265   // Output a static table for tied operands.
2266   if (TiedOperandsEnumMap.size()) {
2267     // The number of tied operand combinations will be small in practice,
2268     // but just add the assert to be sure.
2269     assert(TiedOperandsEnumMap.size() <= 254 &&
2270            "Too many tied-operand combinations to reference with "
2271            "an 8bit offset from the conversion table, where index "
2272            "'255' is reserved as operand not to be copied.");
2273 
2274     OS << "enum {\n";
2275     for (auto &KV : TiedOperandsEnumMap) {
2276       OS << "  " << KV.second << ",\n";
2277     }
2278     OS << "};\n\n";
2279 
2280     OS << "static const uint8_t TiedAsmOperandTable[][3] = {\n";
2281     for (auto &KV : TiedOperandsEnumMap) {
2282       OS << "  /* " << KV.second << " */ { "
2283          << utostr(std::get<0>(KV.first)) << ", "
2284          << utostr(std::get<1>(KV.first)) << ", "
2285          << utostr(std::get<2>(KV.first)) << " },\n";
2286     }
2287     OS << "};\n\n";
2288   } else
2289     OS << "static const uint8_t TiedAsmOperandTable[][3] = "
2290           "{ /* empty  */ {0, 0, 0} };\n\n";
2291 
2292   OS << "namespace {\n";
2293 
2294   // Output the operand conversion kind enum.
2295   OS << "enum OperatorConversionKind {\n";
2296   for (const auto &Converter : OperandConversionKinds)
2297     OS << "  " << Converter << ",\n";
2298   OS << "  CVT_NUM_CONVERTERS\n";
2299   OS << "};\n\n";
2300 
2301   // Output the instruction conversion kind enum.
2302   OS << "enum InstructionConversionKind {\n";
2303   for (const auto &Signature : InstructionConversionKinds)
2304     OS << "  " << Signature << ",\n";
2305   OS << "  CVT_NUM_SIGNATURES\n";
2306   OS << "};\n\n";
2307 
2308   OS << "} // end anonymous namespace\n\n";
2309 
2310   // Output the conversion table.
2311   OS << "static const uint8_t ConversionTable[CVT_NUM_SIGNATURES]["
2312      << MaxRowLength << "] = {\n";
2313 
2314   for (unsigned Row = 0, ERow = ConversionTable.size(); Row != ERow; ++Row) {
2315     assert(ConversionTable[Row].size() % 2 == 0 && "bad conversion row!");
2316     OS << "  // " << InstructionConversionKinds[Row] << "\n";
2317     OS << "  { ";
2318     for (unsigned i = 0, e = ConversionTable[Row].size(); i != e; i += 2) {
2319       OS << OperandConversionKinds[ConversionTable[Row][i]] << ", ";
2320       if (OperandConversionKinds[ConversionTable[Row][i]] !=
2321           CachedHashString("CVT_Tied")) {
2322         OS << (unsigned)(ConversionTable[Row][i + 1]) << ", ";
2323         continue;
2324       }
2325 
2326       // For a tied operand, emit a reference to the TiedAsmOperandTable
2327       // that contains the operand to copy, and the parsed operands to
2328       // check for their tied constraints.
2329       auto Key = std::make_tuple((uint8_t)ConversionTable[Row][i + 1],
2330                                  (uint8_t)ConversionTable[Row][i + 2],
2331                                  (uint8_t)ConversionTable[Row][i + 3]);
2332       auto TiedOpndEnum = TiedOperandsEnumMap.find(Key);
2333       assert(TiedOpndEnum != TiedOperandsEnumMap.end() &&
2334              "No record for tied operand pair");
2335       OS << TiedOpndEnum->second << ", ";
2336       i += 2;
2337     }
2338     OS << "CVT_Done },\n";
2339   }
2340 
2341   OS << "};\n\n";
2342 
2343   // Spit out the conversion driver function.
2344   OS << CvtOS.str();
2345 
2346   // Spit out the operand number lookup function.
2347   OS << OpOS.str();
2348 
2349   return ConversionTable.size();
2350 }
2351 
2352 /// emitMatchClassEnumeration - Emit the enumeration for match class kinds.
2353 static void emitMatchClassEnumeration(CodeGenTarget &Target,
2354                                       std::forward_list<ClassInfo> &Infos,
2355                                       raw_ostream &OS) {
2356   OS << "namespace {\n\n";
2357 
2358   OS << "/// MatchClassKind - The kinds of classes which participate in\n"
2359      << "/// instruction matching.\n";
2360   OS << "enum MatchClassKind {\n";
2361   OS << "  InvalidMatchClass = 0,\n";
2362   OS << "  OptionalMatchClass = 1,\n";
2363   ClassInfo::ClassInfoKind LastKind = ClassInfo::Token;
2364   StringRef LastName = "OptionalMatchClass";
2365   for (const auto &CI : Infos) {
2366     if (LastKind == ClassInfo::Token && CI.Kind != ClassInfo::Token) {
2367       OS << "  MCK_LAST_TOKEN = " << LastName << ",\n";
2368     } else if (LastKind < ClassInfo::UserClass0 &&
2369                CI.Kind >= ClassInfo::UserClass0) {
2370       OS << "  MCK_LAST_REGISTER = " << LastName << ",\n";
2371     }
2372     LastKind = (ClassInfo::ClassInfoKind)CI.Kind;
2373     LastName = CI.Name;
2374 
2375     OS << "  " << CI.Name << ", // ";
2376     if (CI.Kind == ClassInfo::Token) {
2377       OS << "'" << CI.ValueName << "'\n";
2378     } else if (CI.isRegisterClass()) {
2379       if (!CI.ValueName.empty())
2380         OS << "register class '" << CI.ValueName << "'\n";
2381       else
2382         OS << "derived register class\n";
2383     } else {
2384       OS << "user defined class '" << CI.ValueName << "'\n";
2385     }
2386   }
2387   OS << "  NumMatchClassKinds\n";
2388   OS << "};\n\n";
2389 
2390   OS << "} // end anonymous namespace\n\n";
2391 }
2392 
2393 /// emitMatchClassDiagStrings - Emit a function to get the diagnostic text to be
2394 /// used when an assembly operand does not match the expected operand class.
2395 static void emitOperandMatchErrorDiagStrings(AsmMatcherInfo &Info, raw_ostream &OS) {
2396   // If the target does not use DiagnosticString for any operands, don't emit
2397   // an unused function.
2398   if (llvm::all_of(Info.Classes, [](const ClassInfo &CI) {
2399         return CI.DiagnosticString.empty();
2400       }))
2401     return;
2402 
2403   OS << "static const char *getMatchKindDiag(" << Info.Target.getName()
2404      << "AsmParser::" << Info.Target.getName()
2405      << "MatchResultTy MatchResult) {\n";
2406   OS << "  switch (MatchResult) {\n";
2407 
2408   for (const auto &CI: Info.Classes) {
2409     if (!CI.DiagnosticString.empty()) {
2410       assert(!CI.DiagnosticType.empty() &&
2411              "DiagnosticString set without DiagnosticType");
2412       OS << "  case " << Info.Target.getName()
2413          << "AsmParser::Match_" << CI.DiagnosticType << ":\n";
2414       OS << "    return \"" << CI.DiagnosticString << "\";\n";
2415     }
2416   }
2417 
2418   OS << "  default:\n";
2419   OS << "    return nullptr;\n";
2420 
2421   OS << "  }\n";
2422   OS << "}\n\n";
2423 }
2424 
2425 static void emitRegisterMatchErrorFunc(AsmMatcherInfo &Info, raw_ostream &OS) {
2426   OS << "static unsigned getDiagKindFromRegisterClass(MatchClassKind "
2427         "RegisterClass) {\n";
2428   if (none_of(Info.Classes, [](const ClassInfo &CI) {
2429         return CI.isRegisterClass() && !CI.DiagnosticType.empty();
2430       })) {
2431     OS << "  return MCTargetAsmParser::Match_InvalidOperand;\n";
2432   } else {
2433     OS << "  switch (RegisterClass) {\n";
2434     for (const auto &CI: Info.Classes) {
2435       if (CI.isRegisterClass() && !CI.DiagnosticType.empty()) {
2436         OS << "  case " << CI.Name << ":\n";
2437         OS << "    return " << Info.Target.getName() << "AsmParser::Match_"
2438            << CI.DiagnosticType << ";\n";
2439       }
2440     }
2441 
2442     OS << "  default:\n";
2443     OS << "    return MCTargetAsmParser::Match_InvalidOperand;\n";
2444 
2445     OS << "  }\n";
2446   }
2447   OS << "}\n\n";
2448 }
2449 
2450 /// emitValidateOperandClass - Emit the function to validate an operand class.
2451 static void emitValidateOperandClass(AsmMatcherInfo &Info,
2452                                      raw_ostream &OS) {
2453   OS << "static unsigned validateOperandClass(MCParsedAsmOperand &GOp, "
2454      << "MatchClassKind Kind) {\n";
2455   OS << "  " << Info.Target.getName() << "Operand &Operand = ("
2456      << Info.Target.getName() << "Operand &)GOp;\n";
2457 
2458   // The InvalidMatchClass is not to match any operand.
2459   OS << "  if (Kind == InvalidMatchClass)\n";
2460   OS << "    return MCTargetAsmParser::Match_InvalidOperand;\n\n";
2461 
2462   // Check for Token operands first.
2463   // FIXME: Use a more specific diagnostic type.
2464   OS << "  if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)\n";
2465   OS << "    return isSubclass(matchTokenString(Operand.getToken()), Kind) ?\n"
2466      << "             MCTargetAsmParser::Match_Success :\n"
2467      << "             MCTargetAsmParser::Match_InvalidOperand;\n\n";
2468 
2469   // Check the user classes. We don't care what order since we're only
2470   // actually matching against one of them.
2471   OS << "  switch (Kind) {\n"
2472         "  default: break;\n";
2473   for (const auto &CI : Info.Classes) {
2474     if (!CI.isUserClass())
2475       continue;
2476 
2477     OS << "  // '" << CI.ClassName << "' class\n";
2478     OS << "  case " << CI.Name << ": {\n";
2479     OS << "    DiagnosticPredicate DP(Operand." << CI.PredicateMethod
2480        << "());\n";
2481     OS << "    if (DP.isMatch())\n";
2482     OS << "      return MCTargetAsmParser::Match_Success;\n";
2483     if (!CI.DiagnosticType.empty()) {
2484       OS << "    if (DP.isNearMatch())\n";
2485       OS << "      return " << Info.Target.getName() << "AsmParser::Match_"
2486          << CI.DiagnosticType << ";\n";
2487       OS << "    break;\n";
2488     }
2489     else
2490       OS << "    break;\n";
2491     OS << "    }\n";
2492   }
2493   OS << "  } // end switch (Kind)\n\n";
2494 
2495   // Check for register operands, including sub-classes.
2496   OS << "  if (Operand.isReg()) {\n";
2497   OS << "    MatchClassKind OpKind;\n";
2498   OS << "    switch (Operand.getReg()) {\n";
2499   OS << "    default: OpKind = InvalidMatchClass; break;\n";
2500   for (const auto &RC : Info.RegisterClasses)
2501     OS << "    case " << RC.first->getValueAsString("Namespace") << "::"
2502        << RC.first->getName() << ": OpKind = " << RC.second->Name
2503        << "; break;\n";
2504   OS << "    }\n";
2505   OS << "    return isSubclass(OpKind, Kind) ? "
2506      << "(unsigned)MCTargetAsmParser::Match_Success :\n                     "
2507      << "                 getDiagKindFromRegisterClass(Kind);\n  }\n\n";
2508 
2509   // Expected operand is a register, but actual is not.
2510   OS << "  if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)\n";
2511   OS << "    return getDiagKindFromRegisterClass(Kind);\n\n";
2512 
2513   // Generic fallthrough match failure case for operands that don't have
2514   // specialized diagnostic types.
2515   OS << "  return MCTargetAsmParser::Match_InvalidOperand;\n";
2516   OS << "}\n\n";
2517 }
2518 
2519 /// emitIsSubclass - Emit the subclass predicate function.
2520 static void emitIsSubclass(CodeGenTarget &Target,
2521                            std::forward_list<ClassInfo> &Infos,
2522                            raw_ostream &OS) {
2523   OS << "/// isSubclass - Compute whether \\p A is a subclass of \\p B.\n";
2524   OS << "static bool isSubclass(MatchClassKind A, MatchClassKind B) {\n";
2525   OS << "  if (A == B)\n";
2526   OS << "    return true;\n\n";
2527 
2528   bool EmittedSwitch = false;
2529   for (const auto &A : Infos) {
2530     std::vector<StringRef> SuperClasses;
2531     if (A.IsOptional)
2532       SuperClasses.push_back("OptionalMatchClass");
2533     for (const auto &B : Infos) {
2534       if (&A != &B && A.isSubsetOf(B))
2535         SuperClasses.push_back(B.Name);
2536     }
2537 
2538     if (SuperClasses.empty())
2539       continue;
2540 
2541     // If this is the first SuperClass, emit the switch header.
2542     if (!EmittedSwitch) {
2543       OS << "  switch (A) {\n";
2544       OS << "  default:\n";
2545       OS << "    return false;\n";
2546       EmittedSwitch = true;
2547     }
2548 
2549     OS << "\n  case " << A.Name << ":\n";
2550 
2551     if (SuperClasses.size() == 1) {
2552       OS << "    return B == " << SuperClasses.back() << ";\n";
2553       continue;
2554     }
2555 
2556     if (!SuperClasses.empty()) {
2557       OS << "    switch (B) {\n";
2558       OS << "    default: return false;\n";
2559       for (StringRef SC : SuperClasses)
2560         OS << "    case " << SC << ": return true;\n";
2561       OS << "    }\n";
2562     } else {
2563       // No case statement to emit
2564       OS << "    return false;\n";
2565     }
2566   }
2567 
2568   // If there were case statements emitted into the string stream write the
2569   // default.
2570   if (EmittedSwitch)
2571     OS << "  }\n";
2572   else
2573     OS << "  return false;\n";
2574 
2575   OS << "}\n\n";
2576 }
2577 
2578 /// emitMatchTokenString - Emit the function to match a token string to the
2579 /// appropriate match class value.
2580 static void emitMatchTokenString(CodeGenTarget &Target,
2581                                  std::forward_list<ClassInfo> &Infos,
2582                                  raw_ostream &OS) {
2583   // Construct the match list.
2584   std::vector<StringMatcher::StringPair> Matches;
2585   for (const auto &CI : Infos) {
2586     if (CI.Kind == ClassInfo::Token)
2587       Matches.emplace_back(CI.ValueName, "return " + CI.Name + ";");
2588   }
2589 
2590   OS << "static MatchClassKind matchTokenString(StringRef Name) {\n";
2591 
2592   StringMatcher("Name", Matches, OS).Emit();
2593 
2594   OS << "  return InvalidMatchClass;\n";
2595   OS << "}\n\n";
2596 }
2597 
2598 /// emitMatchRegisterName - Emit the function to match a string to the target
2599 /// specific register enum.
2600 static void emitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
2601                                   raw_ostream &OS) {
2602   // Construct the match list.
2603   std::vector<StringMatcher::StringPair> Matches;
2604   const auto &Regs = Target.getRegBank().getRegisters();
2605   for (const CodeGenRegister &Reg : Regs) {
2606     if (Reg.TheDef->getValueAsString("AsmName").empty())
2607       continue;
2608 
2609     Matches.emplace_back(std::string(Reg.TheDef->getValueAsString("AsmName")),
2610                          "return " + utostr(Reg.EnumValue) + ";");
2611   }
2612 
2613   OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
2614 
2615   bool IgnoreDuplicates =
2616       AsmParser->getValueAsBit("AllowDuplicateRegisterNames");
2617   StringMatcher("Name", Matches, OS).Emit(0, IgnoreDuplicates);
2618 
2619   OS << "  return 0;\n";
2620   OS << "}\n\n";
2621 }
2622 
2623 /// Emit the function to match a string to the target
2624 /// specific register enum.
2625 static void emitMatchRegisterAltName(CodeGenTarget &Target, Record *AsmParser,
2626                                      raw_ostream &OS) {
2627   // Construct the match list.
2628   std::vector<StringMatcher::StringPair> Matches;
2629   const auto &Regs = Target.getRegBank().getRegisters();
2630   for (const CodeGenRegister &Reg : Regs) {
2631 
2632     auto AltNames = Reg.TheDef->getValueAsListOfStrings("AltNames");
2633 
2634     for (auto AltName : AltNames) {
2635       AltName = StringRef(AltName).trim();
2636 
2637       // don't handle empty alternative names
2638       if (AltName.empty())
2639         continue;
2640 
2641       Matches.emplace_back(std::string(AltName),
2642                            "return " + utostr(Reg.EnumValue) + ";");
2643     }
2644   }
2645 
2646   OS << "static unsigned MatchRegisterAltName(StringRef Name) {\n";
2647 
2648   bool IgnoreDuplicates =
2649       AsmParser->getValueAsBit("AllowDuplicateRegisterNames");
2650   StringMatcher("Name", Matches, OS).Emit(0, IgnoreDuplicates);
2651 
2652   OS << "  return 0;\n";
2653   OS << "}\n\n";
2654 }
2655 
2656 /// emitOperandDiagnosticTypes - Emit the operand matching diagnostic types.
2657 static void emitOperandDiagnosticTypes(AsmMatcherInfo &Info, raw_ostream &OS) {
2658   // Get the set of diagnostic types from all of the operand classes.
2659   std::set<StringRef> Types;
2660   for (const auto &OpClassEntry : Info.AsmOperandClasses) {
2661     if (!OpClassEntry.second->DiagnosticType.empty())
2662       Types.insert(OpClassEntry.second->DiagnosticType);
2663   }
2664   for (const auto &OpClassEntry : Info.RegisterClassClasses) {
2665     if (!OpClassEntry.second->DiagnosticType.empty())
2666       Types.insert(OpClassEntry.second->DiagnosticType);
2667   }
2668 
2669   if (Types.empty()) return;
2670 
2671   // Now emit the enum entries.
2672   for (StringRef Type : Types)
2673     OS << "  Match_" << Type << ",\n";
2674   OS << "  END_OPERAND_DIAGNOSTIC_TYPES\n";
2675 }
2676 
2677 /// emitGetSubtargetFeatureName - Emit the helper function to get the
2678 /// user-level name for a subtarget feature.
2679 static void emitGetSubtargetFeatureName(AsmMatcherInfo &Info, raw_ostream &OS) {
2680   OS << "// User-level names for subtarget features that participate in\n"
2681      << "// instruction matching.\n"
2682      << "static const char *getSubtargetFeatureName(uint64_t Val) {\n";
2683   if (!Info.SubtargetFeatures.empty()) {
2684     OS << "  switch(Val) {\n";
2685     for (const auto &SF : Info.SubtargetFeatures) {
2686       const SubtargetFeatureInfo &SFI = SF.second;
2687       // FIXME: Totally just a placeholder name to get the algorithm working.
2688       OS << "  case " << SFI.getEnumBitName() << ": return \""
2689          << SFI.TheDef->getValueAsString("PredicateName") << "\";\n";
2690     }
2691     OS << "  default: return \"(unknown)\";\n";
2692     OS << "  }\n";
2693   } else {
2694     // Nothing to emit, so skip the switch
2695     OS << "  return \"(unknown)\";\n";
2696   }
2697   OS << "}\n\n";
2698 }
2699 
2700 static std::string GetAliasRequiredFeatures(Record *R,
2701                                             const AsmMatcherInfo &Info) {
2702   std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
2703   std::string Result;
2704 
2705   if (ReqFeatures.empty())
2706     return Result;
2707 
2708   for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
2709     const SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
2710 
2711     if (!F)
2712       PrintFatalError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
2713                     "' is not marked as an AssemblerPredicate!");
2714 
2715     if (i)
2716       Result += " && ";
2717 
2718     Result += "Features.test(" + F->getEnumBitName() + ')';
2719   }
2720 
2721   return Result;
2722 }
2723 
2724 static void emitMnemonicAliasVariant(raw_ostream &OS,const AsmMatcherInfo &Info,
2725                                      std::vector<Record*> &Aliases,
2726                                      unsigned Indent = 0,
2727                                   StringRef AsmParserVariantName = StringRef()){
2728   // Keep track of all the aliases from a mnemonic.  Use an std::map so that the
2729   // iteration order of the map is stable.
2730   std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
2731 
2732   for (Record *R : Aliases) {
2733     // FIXME: Allow AssemblerVariantName to be a comma separated list.
2734     StringRef AsmVariantName = R->getValueAsString("AsmVariantName");
2735     if (AsmVariantName != AsmParserVariantName)
2736       continue;
2737     AliasesFromMnemonic[R->getValueAsString("FromMnemonic").lower()]
2738         .push_back(R);
2739   }
2740   if (AliasesFromMnemonic.empty())
2741     return;
2742 
2743   // Process each alias a "from" mnemonic at a time, building the code executed
2744   // by the string remapper.
2745   std::vector<StringMatcher::StringPair> Cases;
2746   for (const auto &AliasEntry : AliasesFromMnemonic) {
2747     const std::vector<Record*> &ToVec = AliasEntry.second;
2748 
2749     // Loop through each alias and emit code that handles each case.  If there
2750     // are two instructions without predicates, emit an error.  If there is one,
2751     // emit it last.
2752     std::string MatchCode;
2753     int AliasWithNoPredicate = -1;
2754 
2755     for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
2756       Record *R = ToVec[i];
2757       std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
2758 
2759       // If this unconditionally matches, remember it for later and diagnose
2760       // duplicates.
2761       if (FeatureMask.empty()) {
2762         if (AliasWithNoPredicate != -1 &&
2763             R->getValueAsString("ToMnemonic") !=
2764                 ToVec[AliasWithNoPredicate]->getValueAsString("ToMnemonic")) {
2765           // We can't have two different aliases from the same mnemonic with no
2766           // predicate.
2767           PrintError(
2768               ToVec[AliasWithNoPredicate]->getLoc(),
2769               "two different MnemonicAliases with the same 'from' mnemonic!");
2770           PrintFatalError(R->getLoc(), "this is the other MnemonicAlias.");
2771         }
2772 
2773         AliasWithNoPredicate = i;
2774         continue;
2775       }
2776       if (R->getValueAsString("ToMnemonic") == AliasEntry.first)
2777         PrintFatalError(R->getLoc(), "MnemonicAlias to the same string");
2778 
2779       if (!MatchCode.empty())
2780         MatchCode += "else ";
2781       MatchCode += "if (" + FeatureMask + ")\n";
2782       MatchCode += "  Mnemonic = \"";
2783       MatchCode += R->getValueAsString("ToMnemonic").lower();
2784       MatchCode += "\";\n";
2785     }
2786 
2787     if (AliasWithNoPredicate != -1) {
2788       Record *R = ToVec[AliasWithNoPredicate];
2789       if (!MatchCode.empty())
2790         MatchCode += "else\n  ";
2791       MatchCode += "Mnemonic = \"";
2792       MatchCode += R->getValueAsString("ToMnemonic").lower();
2793       MatchCode += "\";\n";
2794     }
2795 
2796     MatchCode += "return;";
2797 
2798     Cases.push_back(std::make_pair(AliasEntry.first, MatchCode));
2799   }
2800   StringMatcher("Mnemonic", Cases, OS).Emit(Indent);
2801 }
2802 
2803 /// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
2804 /// emit a function for them and return true, otherwise return false.
2805 static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info,
2806                                 CodeGenTarget &Target) {
2807   // Ignore aliases when match-prefix is set.
2808   if (!MatchPrefix.empty())
2809     return false;
2810 
2811   std::vector<Record*> Aliases =
2812     Info.getRecords().getAllDerivedDefinitions("MnemonicAlias");
2813   if (Aliases.empty()) return false;
2814 
2815   OS << "static void applyMnemonicAliases(StringRef &Mnemonic, "
2816     "const FeatureBitset &Features, unsigned VariantID) {\n";
2817   OS << "  switch (VariantID) {\n";
2818   unsigned VariantCount = Target.getAsmParserVariantCount();
2819   for (unsigned VC = 0; VC != VariantCount; ++VC) {
2820     Record *AsmVariant = Target.getAsmParserVariant(VC);
2821     int AsmParserVariantNo = AsmVariant->getValueAsInt("Variant");
2822     StringRef AsmParserVariantName = AsmVariant->getValueAsString("Name");
2823     OS << "  case " << AsmParserVariantNo << ":\n";
2824     emitMnemonicAliasVariant(OS, Info, Aliases, /*Indent=*/2,
2825                              AsmParserVariantName);
2826     OS << "    break;\n";
2827   }
2828   OS << "  }\n";
2829 
2830   // Emit aliases that apply to all variants.
2831   emitMnemonicAliasVariant(OS, Info, Aliases);
2832 
2833   OS << "}\n\n";
2834 
2835   return true;
2836 }
2837 
2838 static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
2839                               const AsmMatcherInfo &Info, StringRef ClassName,
2840                               StringToOffsetTable &StringTable,
2841                               unsigned MaxMnemonicIndex,
2842                               unsigned MaxFeaturesIndex,
2843                               bool HasMnemonicFirst) {
2844   unsigned MaxMask = 0;
2845   for (const OperandMatchEntry &OMI : Info.OperandMatchInfo) {
2846     MaxMask |= OMI.OperandMask;
2847   }
2848 
2849   // Emit the static custom operand parsing table;
2850   OS << "namespace {\n";
2851   OS << "  struct OperandMatchEntry {\n";
2852   OS << "    " << getMinimalTypeForRange(MaxMnemonicIndex)
2853                << " Mnemonic;\n";
2854   OS << "    " << getMinimalTypeForRange(MaxMask)
2855                << " OperandMask;\n";
2856   OS << "    " << getMinimalTypeForRange(std::distance(
2857                       Info.Classes.begin(), Info.Classes.end())) << " Class;\n";
2858   OS << "    " << getMinimalTypeForRange(MaxFeaturesIndex)
2859                << " RequiredFeaturesIdx;\n\n";
2860   OS << "    StringRef getMnemonic() const {\n";
2861   OS << "      return StringRef(MnemonicTable + Mnemonic + 1,\n";
2862   OS << "                       MnemonicTable[Mnemonic]);\n";
2863   OS << "    }\n";
2864   OS << "  };\n\n";
2865 
2866   OS << "  // Predicate for searching for an opcode.\n";
2867   OS << "  struct LessOpcodeOperand {\n";
2868   OS << "    bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {\n";
2869   OS << "      return LHS.getMnemonic()  < RHS;\n";
2870   OS << "    }\n";
2871   OS << "    bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {\n";
2872   OS << "      return LHS < RHS.getMnemonic();\n";
2873   OS << "    }\n";
2874   OS << "    bool operator()(const OperandMatchEntry &LHS,";
2875   OS << " const OperandMatchEntry &RHS) {\n";
2876   OS << "      return LHS.getMnemonic() < RHS.getMnemonic();\n";
2877   OS << "    }\n";
2878   OS << "  };\n";
2879 
2880   OS << "} // end anonymous namespace\n\n";
2881 
2882   OS << "static const OperandMatchEntry OperandMatchTable["
2883      << Info.OperandMatchInfo.size() << "] = {\n";
2884 
2885   OS << "  /* Operand List Mnemonic, Mask, Operand Class, Features */\n";
2886   for (const OperandMatchEntry &OMI : Info.OperandMatchInfo) {
2887     const MatchableInfo &II = *OMI.MI;
2888 
2889     OS << "  { ";
2890 
2891     // Store a pascal-style length byte in the mnemonic.
2892     std::string LenMnemonic = char(II.Mnemonic.size()) + II.Mnemonic.lower();
2893     OS << StringTable.GetOrAddStringOffset(LenMnemonic, false)
2894        << " /* " << II.Mnemonic << " */, ";
2895 
2896     OS << OMI.OperandMask;
2897     OS << " /* ";
2898     ListSeparator LS;
2899     for (int i = 0, e = 31; i !=e; ++i)
2900       if (OMI.OperandMask & (1 << i))
2901         OS << LS << i;
2902     OS << " */, ";
2903 
2904     OS << OMI.CI->Name;
2905 
2906     // Write the required features mask.
2907     OS << ", AMFBS";
2908     if (II.RequiredFeatures.empty())
2909       OS << "_None";
2910     else
2911       for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i)
2912         OS << '_' << II.RequiredFeatures[i]->TheDef->getName();
2913 
2914     OS << " },\n";
2915   }
2916   OS << "};\n\n";
2917 
2918   // Emit the operand class switch to call the correct custom parser for
2919   // the found operand class.
2920   OS << "OperandMatchResultTy " << Target.getName() << ClassName << "::\n"
2921      << "tryCustomParseOperand(OperandVector"
2922      << " &Operands,\n                      unsigned MCK) {\n\n"
2923      << "  switch(MCK) {\n";
2924 
2925   for (const auto &CI : Info.Classes) {
2926     if (CI.ParserMethod.empty())
2927       continue;
2928     OS << "  case " << CI.Name << ":\n"
2929        << "    return " << CI.ParserMethod << "(Operands);\n";
2930   }
2931 
2932   OS << "  default:\n";
2933   OS << "    return MatchOperand_NoMatch;\n";
2934   OS << "  }\n";
2935   OS << "  return MatchOperand_NoMatch;\n";
2936   OS << "}\n\n";
2937 
2938   // Emit the static custom operand parser. This code is very similar with
2939   // the other matcher. Also use MatchResultTy here just in case we go for
2940   // a better error handling.
2941   OS << "OperandMatchResultTy " << Target.getName() << ClassName << "::\n"
2942      << "MatchOperandParserImpl(OperandVector"
2943      << " &Operands,\n                       StringRef Mnemonic,\n"
2944      << "                       bool ParseForAllFeatures) {\n";
2945 
2946   // Emit code to get the available features.
2947   OS << "  // Get the current feature set.\n";
2948   OS << "  const FeatureBitset &AvailableFeatures = getAvailableFeatures();\n\n";
2949 
2950   OS << "  // Get the next operand index.\n";
2951   OS << "  unsigned NextOpNum = Operands.size()"
2952      << (HasMnemonicFirst ? " - 1" : "") << ";\n";
2953 
2954   // Emit code to search the table.
2955   OS << "  // Search the table.\n";
2956   if (HasMnemonicFirst) {
2957     OS << "  auto MnemonicRange =\n";
2958     OS << "    std::equal_range(std::begin(OperandMatchTable), "
2959           "std::end(OperandMatchTable),\n";
2960     OS << "                     Mnemonic, LessOpcodeOperand());\n\n";
2961   } else {
2962     OS << "  auto MnemonicRange = std::make_pair(std::begin(OperandMatchTable),"
2963           " std::end(OperandMatchTable));\n";
2964     OS << "  if (!Mnemonic.empty())\n";
2965     OS << "    MnemonicRange =\n";
2966     OS << "      std::equal_range(std::begin(OperandMatchTable), "
2967           "std::end(OperandMatchTable),\n";
2968     OS << "                       Mnemonic, LessOpcodeOperand());\n\n";
2969   }
2970 
2971   OS << "  if (MnemonicRange.first == MnemonicRange.second)\n";
2972   OS << "    return MatchOperand_NoMatch;\n\n";
2973 
2974   OS << "  for (const OperandMatchEntry *it = MnemonicRange.first,\n"
2975      << "       *ie = MnemonicRange.second; it != ie; ++it) {\n";
2976 
2977   OS << "    // equal_range guarantees that instruction mnemonic matches.\n";
2978   OS << "    assert(Mnemonic == it->getMnemonic());\n\n";
2979 
2980   // Emit check that the required features are available.
2981   OS << "    // check if the available features match\n";
2982   OS << "    const FeatureBitset &RequiredFeatures = "
2983         "FeatureBitsets[it->RequiredFeaturesIdx];\n";
2984   OS << "    if (!ParseForAllFeatures && (AvailableFeatures & "
2985         "RequiredFeatures) != RequiredFeatures)\n";
2986   OS << "      continue;\n\n";
2987 
2988   // Emit check to ensure the operand number matches.
2989   OS << "    // check if the operand in question has a custom parser.\n";
2990   OS << "    if (!(it->OperandMask & (1 << NextOpNum)))\n";
2991   OS << "      continue;\n\n";
2992 
2993   // Emit call to the custom parser method
2994   OS << "    // call custom parse method to handle the operand\n";
2995   OS << "    OperandMatchResultTy Result = ";
2996   OS << "tryCustomParseOperand(Operands, it->Class);\n";
2997   OS << "    if (Result != MatchOperand_NoMatch)\n";
2998   OS << "      return Result;\n";
2999   OS << "  }\n\n";
3000 
3001   OS << "  // Okay, we had no match.\n";
3002   OS << "  return MatchOperand_NoMatch;\n";
3003   OS << "}\n\n";
3004 }
3005 
3006 static void emitAsmTiedOperandConstraints(CodeGenTarget &Target,
3007                                           AsmMatcherInfo &Info,
3008                                           raw_ostream &OS) {
3009   std::string AsmParserName =
3010       std::string(Info.AsmParser->getValueAsString("AsmParserClassName"));
3011   OS << "static bool ";
3012   OS << "checkAsmTiedOperandConstraints(const " << Target.getName()
3013      << AsmParserName << "&AsmParser,\n";
3014   OS << "                               unsigned Kind,\n";
3015   OS << "                               const OperandVector &Operands,\n";
3016   OS << "                               uint64_t &ErrorInfo) {\n";
3017   OS << "  assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n";
3018   OS << "  const uint8_t *Converter = ConversionTable[Kind];\n";
3019   OS << "  for (const uint8_t *p = Converter; *p; p += 2) {\n";
3020   OS << "    switch (*p) {\n";
3021   OS << "    case CVT_Tied: {\n";
3022   OS << "      unsigned OpIdx = *(p + 1);\n";
3023   OS << "      assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -\n";
3024   OS << "                              std::begin(TiedAsmOperandTable)) &&\n";
3025   OS << "             \"Tied operand not found\");\n";
3026   OS << "      unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];\n";
3027   OS << "      unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];\n";
3028   OS << "      if (OpndNum1 != OpndNum2) {\n";
3029   OS << "        auto &SrcOp1 = Operands[OpndNum1];\n";
3030   OS << "        auto &SrcOp2 = Operands[OpndNum2];\n";
3031   OS << "        if (SrcOp1->isReg() && SrcOp2->isReg()) {\n";
3032   OS << "          if (!AsmParser.regsEqual(*SrcOp1, *SrcOp2)) {\n";
3033   OS << "            ErrorInfo = OpndNum2;\n";
3034   OS << "            return false;\n";
3035   OS << "          }\n";
3036   OS << "        }\n";
3037   OS << "      }\n";
3038   OS << "      break;\n";
3039   OS << "    }\n";
3040   OS << "    default:\n";
3041   OS << "      break;\n";
3042   OS << "    }\n";
3043   OS << "  }\n";
3044   OS << "  return true;\n";
3045   OS << "}\n\n";
3046 }
3047 
3048 static void emitMnemonicSpellChecker(raw_ostream &OS, CodeGenTarget &Target,
3049                                      unsigned VariantCount) {
3050   OS << "static std::string " << Target.getName()
3051      << "MnemonicSpellCheck(StringRef S, const FeatureBitset &FBS,"
3052      << " unsigned VariantID) {\n";
3053   if (!VariantCount)
3054     OS <<  "  return \"\";";
3055   else {
3056     OS << "  const unsigned MaxEditDist = 2;\n";
3057     OS << "  std::vector<StringRef> Candidates;\n";
3058     OS << "  StringRef Prev = \"\";\n\n";
3059 
3060     OS << "  // Find the appropriate table for this asm variant.\n";
3061     OS << "  const MatchEntry *Start, *End;\n";
3062     OS << "  switch (VariantID) {\n";
3063     OS << "  default: llvm_unreachable(\"invalid variant!\");\n";
3064     for (unsigned VC = 0; VC != VariantCount; ++VC) {
3065       Record *AsmVariant = Target.getAsmParserVariant(VC);
3066       int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
3067       OS << "  case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC
3068          << "); End = std::end(MatchTable" << VC << "); break;\n";
3069     }
3070     OS << "  }\n\n";
3071     OS << "  for (auto I = Start; I < End; I++) {\n";
3072     OS << "    // Ignore unsupported instructions.\n";
3073     OS << "    const FeatureBitset &RequiredFeatures = "
3074           "FeatureBitsets[I->RequiredFeaturesIdx];\n";
3075     OS << "    if ((FBS & RequiredFeatures) != RequiredFeatures)\n";
3076     OS << "      continue;\n";
3077     OS << "\n";
3078     OS << "    StringRef T = I->getMnemonic();\n";
3079     OS << "    // Avoid recomputing the edit distance for the same string.\n";
3080     OS << "    if (T.equals(Prev))\n";
3081     OS << "      continue;\n";
3082     OS << "\n";
3083     OS << "    Prev = T;\n";
3084     OS << "    unsigned Dist = S.edit_distance(T, false, MaxEditDist);\n";
3085     OS << "    if (Dist <= MaxEditDist)\n";
3086     OS << "      Candidates.push_back(T);\n";
3087     OS << "  }\n";
3088     OS << "\n";
3089     OS << "  if (Candidates.empty())\n";
3090     OS << "    return \"\";\n";
3091     OS << "\n";
3092     OS << "  std::string Res = \", did you mean: \";\n";
3093     OS << "  unsigned i = 0;\n";
3094     OS << "  for (; i < Candidates.size() - 1; i++)\n";
3095     OS << "    Res += Candidates[i].str() + \", \";\n";
3096     OS << "  return Res + Candidates[i].str() + \"?\";\n";
3097   }
3098   OS << "}\n";
3099   OS << "\n";
3100 }
3101 
3102 static void emitMnemonicChecker(raw_ostream &OS,
3103                                 CodeGenTarget &Target,
3104                                 unsigned VariantCount,
3105                                 bool HasMnemonicFirst,
3106                                 bool HasMnemonicAliases) {
3107   OS << "static bool " << Target.getName()
3108      << "CheckMnemonic(StringRef Mnemonic,\n";
3109   OS << "                                "
3110      << "const FeatureBitset &AvailableFeatures,\n";
3111   OS << "                                "
3112      << "unsigned VariantID) {\n";
3113 
3114   if (!VariantCount) {
3115     OS <<  "  return false;\n";
3116   } else {
3117     if (HasMnemonicAliases) {
3118       OS << "  // Process all MnemonicAliases to remap the mnemonic.\n";
3119       OS << "  applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);";
3120       OS << "\n\n";
3121     }
3122     OS << "  // Find the appropriate table for this asm variant.\n";
3123     OS << "  const MatchEntry *Start, *End;\n";
3124     OS << "  switch (VariantID) {\n";
3125     OS << "  default: llvm_unreachable(\"invalid variant!\");\n";
3126     for (unsigned VC = 0; VC != VariantCount; ++VC) {
3127       Record *AsmVariant = Target.getAsmParserVariant(VC);
3128       int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
3129       OS << "  case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC
3130          << "); End = std::end(MatchTable" << VC << "); break;\n";
3131     }
3132     OS << "  }\n\n";
3133 
3134     OS << "  // Search the table.\n";
3135     if (HasMnemonicFirst) {
3136       OS << "  auto MnemonicRange = "
3137             "std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
3138     } else {
3139       OS << "  auto MnemonicRange = std::make_pair(Start, End);\n";
3140       OS << "  unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
3141       OS << "  if (!Mnemonic.empty())\n";
3142       OS << "    MnemonicRange = "
3143          << "std::equal_range(Start, End, Mnemonic.lower(), LessOpcode());\n\n";
3144     }
3145 
3146     OS << "  if (MnemonicRange.first == MnemonicRange.second)\n";
3147     OS << "    return false;\n\n";
3148 
3149     OS << "  for (const MatchEntry *it = MnemonicRange.first, "
3150        << "*ie = MnemonicRange.second;\n";
3151     OS << "       it != ie; ++it) {\n";
3152     OS << "    const FeatureBitset &RequiredFeatures =\n";
3153     OS << "      FeatureBitsets[it->RequiredFeaturesIdx];\n";
3154     OS << "    if ((AvailableFeatures & RequiredFeatures) == ";
3155     OS << "RequiredFeatures)\n";
3156     OS << "      return true;\n";
3157     OS << "  }\n";
3158     OS << "  return false;\n";
3159   }
3160   OS << "}\n";
3161   OS << "\n";
3162 }
3163 
3164 // Emit a function mapping match classes to strings, for debugging.
3165 static void emitMatchClassKindNames(std::forward_list<ClassInfo> &Infos,
3166                                     raw_ostream &OS) {
3167   OS << "#ifndef NDEBUG\n";
3168   OS << "const char *getMatchClassName(MatchClassKind Kind) {\n";
3169   OS << "  switch (Kind) {\n";
3170 
3171   OS << "  case InvalidMatchClass: return \"InvalidMatchClass\";\n";
3172   OS << "  case OptionalMatchClass: return \"OptionalMatchClass\";\n";
3173   for (const auto &CI : Infos) {
3174     OS << "  case " << CI.Name << ": return \"" << CI.Name << "\";\n";
3175   }
3176   OS << "  case NumMatchClassKinds: return \"NumMatchClassKinds\";\n";
3177 
3178   OS << "  }\n";
3179   OS << "  llvm_unreachable(\"unhandled MatchClassKind!\");\n";
3180   OS << "}\n\n";
3181   OS << "#endif // NDEBUG\n";
3182 }
3183 
3184 static std::string
3185 getNameForFeatureBitset(const std::vector<Record *> &FeatureBitset) {
3186   std::string Name = "AMFBS";
3187   for (const auto &Feature : FeatureBitset)
3188     Name += ("_" + Feature->getName()).str();
3189   return Name;
3190 }
3191 
3192 void AsmMatcherEmitter::run(raw_ostream &OS) {
3193   CodeGenTarget Target(Records);
3194   Record *AsmParser = Target.getAsmParser();
3195   StringRef ClassName = AsmParser->getValueAsString("AsmParserClassName");
3196 
3197   // Compute the information on the instructions to match.
3198   AsmMatcherInfo Info(AsmParser, Target, Records);
3199   Info.buildInfo();
3200 
3201   // Sort the instruction table using the partial order on classes. We use
3202   // stable_sort to ensure that ambiguous instructions are still
3203   // deterministically ordered.
3204   llvm::stable_sort(
3205       Info.Matchables,
3206       [](const std::unique_ptr<MatchableInfo> &a,
3207          const std::unique_ptr<MatchableInfo> &b) { return *a < *b; });
3208 
3209 #ifdef EXPENSIVE_CHECKS
3210   // Verify that the table is sorted and operator < works transitively.
3211   for (auto I = Info.Matchables.begin(), E = Info.Matchables.end(); I != E;
3212        ++I) {
3213     for (auto J = I; J != E; ++J) {
3214       assert(!(**J < **I));
3215     }
3216   }
3217 #endif
3218 
3219   DEBUG_WITH_TYPE("instruction_info", {
3220       for (const auto &MI : Info.Matchables)
3221         MI->dump();
3222     });
3223 
3224   // Check for ambiguous matchables.
3225   DEBUG_WITH_TYPE("ambiguous_instrs", {
3226     unsigned NumAmbiguous = 0;
3227     for (auto I = Info.Matchables.begin(), E = Info.Matchables.end(); I != E;
3228          ++I) {
3229       for (auto J = std::next(I); J != E; ++J) {
3230         const MatchableInfo &A = **I;
3231         const MatchableInfo &B = **J;
3232 
3233         if (A.couldMatchAmbiguouslyWith(B)) {
3234           errs() << "warning: ambiguous matchables:\n";
3235           A.dump();
3236           errs() << "\nis incomparable with:\n";
3237           B.dump();
3238           errs() << "\n\n";
3239           ++NumAmbiguous;
3240         }
3241       }
3242     }
3243     if (NumAmbiguous)
3244       errs() << "warning: " << NumAmbiguous
3245              << " ambiguous matchables!\n";
3246   });
3247 
3248   // Compute the information on the custom operand parsing.
3249   Info.buildOperandMatchInfo();
3250 
3251   bool HasMnemonicFirst = AsmParser->getValueAsBit("HasMnemonicFirst");
3252   bool HasOptionalOperands = Info.hasOptionalOperands();
3253   bool ReportMultipleNearMisses =
3254       AsmParser->getValueAsBit("ReportMultipleNearMisses");
3255 
3256   // Write the output.
3257 
3258   // Information for the class declaration.
3259   OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
3260   OS << "#undef GET_ASSEMBLER_HEADER\n";
3261   OS << "  // This should be included into the middle of the declaration of\n";
3262   OS << "  // your subclasses implementation of MCTargetAsmParser.\n";
3263   OS << "  FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;\n";
3264   if (HasOptionalOperands) {
3265     OS << "  void convertToMCInst(unsigned Kind, MCInst &Inst, "
3266        << "unsigned Opcode,\n"
3267        << "                       const OperandVector &Operands,\n"
3268        << "                       const SmallBitVector &OptionalOperandsMask);\n";
3269   } else {
3270     OS << "  void convertToMCInst(unsigned Kind, MCInst &Inst, "
3271        << "unsigned Opcode,\n"
3272        << "                       const OperandVector &Operands);\n";
3273   }
3274   OS << "  void convertToMapAndConstraints(unsigned Kind,\n                ";
3275   OS << "           const OperandVector &Operands) override;\n";
3276   OS << "  unsigned MatchInstructionImpl(const OperandVector &Operands,\n"
3277      << "                                MCInst &Inst,\n";
3278   if (ReportMultipleNearMisses)
3279     OS << "                                SmallVectorImpl<NearMissInfo> *NearMisses,\n";
3280   else
3281     OS << "                                uint64_t &ErrorInfo,\n"
3282        << "                                FeatureBitset &MissingFeatures,\n";
3283   OS << "                                bool matchingInlineAsm,\n"
3284      << "                                unsigned VariantID = 0);\n";
3285   if (!ReportMultipleNearMisses)
3286     OS << "  unsigned MatchInstructionImpl(const OperandVector &Operands,\n"
3287        << "                                MCInst &Inst,\n"
3288        << "                                uint64_t &ErrorInfo,\n"
3289        << "                                bool matchingInlineAsm,\n"
3290        << "                                unsigned VariantID = 0) {\n"
3291        << "    FeatureBitset MissingFeatures;\n"
3292        << "    return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,\n"
3293        << "                                matchingInlineAsm, VariantID);\n"
3294        << "  }\n\n";
3295 
3296 
3297   if (!Info.OperandMatchInfo.empty()) {
3298     OS << "  OperandMatchResultTy MatchOperandParserImpl(\n";
3299     OS << "    OperandVector &Operands,\n";
3300     OS << "    StringRef Mnemonic,\n";
3301     OS << "    bool ParseForAllFeatures = false);\n";
3302 
3303     OS << "  OperandMatchResultTy tryCustomParseOperand(\n";
3304     OS << "    OperandVector &Operands,\n";
3305     OS << "    unsigned MCK);\n\n";
3306   }
3307 
3308   OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
3309 
3310   // Emit the operand match diagnostic enum names.
3311   OS << "\n#ifdef GET_OPERAND_DIAGNOSTIC_TYPES\n";
3312   OS << "#undef GET_OPERAND_DIAGNOSTIC_TYPES\n\n";
3313   emitOperandDiagnosticTypes(Info, OS);
3314   OS << "#endif // GET_OPERAND_DIAGNOSTIC_TYPES\n\n";
3315 
3316   OS << "\n#ifdef GET_REGISTER_MATCHER\n";
3317   OS << "#undef GET_REGISTER_MATCHER\n\n";
3318 
3319   // Emit the subtarget feature enumeration.
3320   SubtargetFeatureInfo::emitSubtargetFeatureBitEnumeration(
3321       Info.SubtargetFeatures, OS);
3322 
3323   // Emit the function to match a register name to number.
3324   // This should be omitted for Mips target
3325   if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterName"))
3326     emitMatchRegisterName(Target, AsmParser, OS);
3327 
3328   if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterAltName"))
3329     emitMatchRegisterAltName(Target, AsmParser, OS);
3330 
3331   OS << "#endif // GET_REGISTER_MATCHER\n\n";
3332 
3333   OS << "\n#ifdef GET_SUBTARGET_FEATURE_NAME\n";
3334   OS << "#undef GET_SUBTARGET_FEATURE_NAME\n\n";
3335 
3336   // Generate the helper function to get the names for subtarget features.
3337   emitGetSubtargetFeatureName(Info, OS);
3338 
3339   OS << "#endif // GET_SUBTARGET_FEATURE_NAME\n\n";
3340 
3341   OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n";
3342   OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
3343 
3344   // Generate the function that remaps for mnemonic aliases.
3345   bool HasMnemonicAliases = emitMnemonicAliases(OS, Info, Target);
3346 
3347   // Generate the convertToMCInst function to convert operands into an MCInst.
3348   // Also, generate the convertToMapAndConstraints function for MS-style inline
3349   // assembly.  The latter doesn't actually generate a MCInst.
3350   unsigned NumConverters = emitConvertFuncs(Target, ClassName, Info.Matchables,
3351                                             HasMnemonicFirst,
3352                                             HasOptionalOperands, OS);
3353 
3354   // Emit the enumeration for classes which participate in matching.
3355   emitMatchClassEnumeration(Target, Info.Classes, OS);
3356 
3357   // Emit a function to get the user-visible string to describe an operand
3358   // match failure in diagnostics.
3359   emitOperandMatchErrorDiagStrings(Info, OS);
3360 
3361   // Emit a function to map register classes to operand match failure codes.
3362   emitRegisterMatchErrorFunc(Info, OS);
3363 
3364   // Emit the routine to match token strings to their match class.
3365   emitMatchTokenString(Target, Info.Classes, OS);
3366 
3367   // Emit the subclass predicate routine.
3368   emitIsSubclass(Target, Info.Classes, OS);
3369 
3370   // Emit the routine to validate an operand against a match class.
3371   emitValidateOperandClass(Info, OS);
3372 
3373   emitMatchClassKindNames(Info.Classes, OS);
3374 
3375   // Emit the available features compute function.
3376   SubtargetFeatureInfo::emitComputeAssemblerAvailableFeatures(
3377       Info.Target.getName(), ClassName, "ComputeAvailableFeatures",
3378       Info.SubtargetFeatures, OS);
3379 
3380   if (!ReportMultipleNearMisses)
3381     emitAsmTiedOperandConstraints(Target, Info, OS);
3382 
3383   StringToOffsetTable StringTable;
3384 
3385   size_t MaxNumOperands = 0;
3386   unsigned MaxMnemonicIndex = 0;
3387   bool HasDeprecation = false;
3388   for (const auto &MI : Info.Matchables) {
3389     MaxNumOperands = std::max(MaxNumOperands, MI->AsmOperands.size());
3390     HasDeprecation |= MI->HasDeprecation;
3391 
3392     // Store a pascal-style length byte in the mnemonic.
3393     std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.lower();
3394     MaxMnemonicIndex = std::max(MaxMnemonicIndex,
3395                         StringTable.GetOrAddStringOffset(LenMnemonic, false));
3396   }
3397 
3398   OS << "static const char MnemonicTable[] =\n";
3399   StringTable.EmitString(OS);
3400   OS << ";\n\n";
3401 
3402   std::vector<std::vector<Record *>> FeatureBitsets;
3403   for (const auto &MI : Info.Matchables) {
3404     if (MI->RequiredFeatures.empty())
3405       continue;
3406     FeatureBitsets.emplace_back();
3407     for (unsigned I = 0, E = MI->RequiredFeatures.size(); I != E; ++I)
3408       FeatureBitsets.back().push_back(MI->RequiredFeatures[I]->TheDef);
3409   }
3410 
3411   llvm::sort(FeatureBitsets, [&](const std::vector<Record *> &A,
3412                                  const std::vector<Record *> &B) {
3413     if (A.size() < B.size())
3414       return true;
3415     if (A.size() > B.size())
3416       return false;
3417     for (auto Pair : zip(A, B)) {
3418       if (std::get<0>(Pair)->getName() < std::get<1>(Pair)->getName())
3419         return true;
3420       if (std::get<0>(Pair)->getName() > std::get<1>(Pair)->getName())
3421         return false;
3422     }
3423     return false;
3424   });
3425   FeatureBitsets.erase(
3426       std::unique(FeatureBitsets.begin(), FeatureBitsets.end()),
3427       FeatureBitsets.end());
3428   OS << "// Feature bitsets.\n"
3429      << "enum : " << getMinimalTypeForRange(FeatureBitsets.size()) << " {\n"
3430      << "  AMFBS_None,\n";
3431   for (const auto &FeatureBitset : FeatureBitsets) {
3432     if (FeatureBitset.empty())
3433       continue;
3434     OS << "  " << getNameForFeatureBitset(FeatureBitset) << ",\n";
3435   }
3436   OS << "};\n\n"
3437      << "static constexpr FeatureBitset FeatureBitsets[] = {\n"
3438      << "  {}, // AMFBS_None\n";
3439   for (const auto &FeatureBitset : FeatureBitsets) {
3440     if (FeatureBitset.empty())
3441       continue;
3442     OS << "  {";
3443     for (const auto &Feature : FeatureBitset) {
3444       const auto &I = Info.SubtargetFeatures.find(Feature);
3445       assert(I != Info.SubtargetFeatures.end() && "Didn't import predicate?");
3446       OS << I->second.getEnumBitName() << ", ";
3447     }
3448     OS << "},\n";
3449   }
3450   OS << "};\n\n";
3451 
3452   // Emit the static match table; unused classes get initialized to 0 which is
3453   // guaranteed to be InvalidMatchClass.
3454   //
3455   // FIXME: We can reduce the size of this table very easily. First, we change
3456   // it so that store the kinds in separate bit-fields for each index, which
3457   // only needs to be the max width used for classes at that index (we also need
3458   // to reject based on this during classification). If we then make sure to
3459   // order the match kinds appropriately (putting mnemonics last), then we
3460   // should only end up using a few bits for each class, especially the ones
3461   // following the mnemonic.
3462   OS << "namespace {\n";
3463   OS << "  struct MatchEntry {\n";
3464   OS << "    " << getMinimalTypeForRange(MaxMnemonicIndex)
3465                << " Mnemonic;\n";
3466   OS << "    uint16_t Opcode;\n";
3467   OS << "    " << getMinimalTypeForRange(NumConverters)
3468                << " ConvertFn;\n";
3469   OS << "    " << getMinimalTypeForRange(FeatureBitsets.size())
3470                << " RequiredFeaturesIdx;\n";
3471   OS << "    " << getMinimalTypeForRange(
3472                       std::distance(Info.Classes.begin(), Info.Classes.end()))
3473      << " Classes[" << MaxNumOperands << "];\n";
3474   OS << "    StringRef getMnemonic() const {\n";
3475   OS << "      return StringRef(MnemonicTable + Mnemonic + 1,\n";
3476   OS << "                       MnemonicTable[Mnemonic]);\n";
3477   OS << "    }\n";
3478   OS << "  };\n\n";
3479 
3480   OS << "  // Predicate for searching for an opcode.\n";
3481   OS << "  struct LessOpcode {\n";
3482   OS << "    bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
3483   OS << "      return LHS.getMnemonic() < RHS;\n";
3484   OS << "    }\n";
3485   OS << "    bool operator()(StringRef LHS, const MatchEntry &RHS) {\n";
3486   OS << "      return LHS < RHS.getMnemonic();\n";
3487   OS << "    }\n";
3488   OS << "    bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n";
3489   OS << "      return LHS.getMnemonic() < RHS.getMnemonic();\n";
3490   OS << "    }\n";
3491   OS << "  };\n";
3492 
3493   OS << "} // end anonymous namespace\n\n";
3494 
3495   unsigned VariantCount = Target.getAsmParserVariantCount();
3496   for (unsigned VC = 0; VC != VariantCount; ++VC) {
3497     Record *AsmVariant = Target.getAsmParserVariant(VC);
3498     int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
3499 
3500     OS << "static const MatchEntry MatchTable" << VC << "[] = {\n";
3501 
3502     for (const auto &MI : Info.Matchables) {
3503       if (MI->AsmVariantID != AsmVariantNo)
3504         continue;
3505 
3506       // Store a pascal-style length byte in the mnemonic.
3507       std::string LenMnemonic =
3508           char(MI->Mnemonic.size()) + MI->Mnemonic.lower();
3509       OS << "  { " << StringTable.GetOrAddStringOffset(LenMnemonic, false)
3510          << " /* " << MI->Mnemonic << " */, "
3511          << Target.getInstNamespace() << "::"
3512          << MI->getResultInst()->TheDef->getName() << ", "
3513          << MI->ConversionFnKind << ", ";
3514 
3515       // Write the required features mask.
3516       OS << "AMFBS";
3517       if (MI->RequiredFeatures.empty())
3518         OS << "_None";
3519       else
3520         for (unsigned i = 0, e = MI->RequiredFeatures.size(); i != e; ++i)
3521           OS << '_' << MI->RequiredFeatures[i]->TheDef->getName();
3522 
3523       OS << ", { ";
3524       ListSeparator LS;
3525       for (const MatchableInfo::AsmOperand &Op : MI->AsmOperands)
3526         OS << LS << Op.Class->Name;
3527       OS << " }, },\n";
3528     }
3529 
3530     OS << "};\n\n";
3531   }
3532 
3533   OS << "#include \"llvm/Support/Debug.h\"\n";
3534   OS << "#include \"llvm/Support/Format.h\"\n\n";
3535 
3536   // Finally, build the match function.
3537   OS << "unsigned " << Target.getName() << ClassName << "::\n"
3538      << "MatchInstructionImpl(const OperandVector &Operands,\n";
3539   OS << "                     MCInst &Inst,\n";
3540   if (ReportMultipleNearMisses)
3541     OS << "                     SmallVectorImpl<NearMissInfo> *NearMisses,\n";
3542   else
3543     OS << "                     uint64_t &ErrorInfo,\n"
3544        << "                     FeatureBitset &MissingFeatures,\n";
3545   OS << "                     bool matchingInlineAsm, unsigned VariantID) {\n";
3546 
3547   if (!ReportMultipleNearMisses) {
3548     OS << "  // Eliminate obvious mismatches.\n";
3549     OS << "  if (Operands.size() > "
3550        << (MaxNumOperands + HasMnemonicFirst) << ") {\n";
3551     OS << "    ErrorInfo = "
3552        << (MaxNumOperands + HasMnemonicFirst) << ";\n";
3553     OS << "    return Match_InvalidOperand;\n";
3554     OS << "  }\n\n";
3555   }
3556 
3557   // Emit code to get the available features.
3558   OS << "  // Get the current feature set.\n";
3559   OS << "  const FeatureBitset &AvailableFeatures = getAvailableFeatures();\n\n";
3560 
3561   OS << "  // Get the instruction mnemonic, which is the first token.\n";
3562   if (HasMnemonicFirst) {
3563     OS << "  StringRef Mnemonic = ((" << Target.getName()
3564        << "Operand &)*Operands[0]).getToken();\n\n";
3565   } else {
3566     OS << "  StringRef Mnemonic;\n";
3567     OS << "  if (Operands[0]->isToken())\n";
3568     OS << "    Mnemonic = ((" << Target.getName()
3569        << "Operand &)*Operands[0]).getToken();\n\n";
3570   }
3571 
3572   if (HasMnemonicAliases) {
3573     OS << "  // Process all MnemonicAliases to remap the mnemonic.\n";
3574     OS << "  applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);\n\n";
3575   }
3576 
3577   // Emit code to compute the class list for this operand vector.
3578   if (!ReportMultipleNearMisses) {
3579     OS << "  // Some state to try to produce better error messages.\n";
3580     OS << "  bool HadMatchOtherThanFeatures = false;\n";
3581     OS << "  bool HadMatchOtherThanPredicate = false;\n";
3582     OS << "  unsigned RetCode = Match_InvalidOperand;\n";
3583     OS << "  MissingFeatures.set();\n";
3584     OS << "  // Set ErrorInfo to the operand that mismatches if it is\n";
3585     OS << "  // wrong for all instances of the instruction.\n";
3586     OS << "  ErrorInfo = ~0ULL;\n";
3587   }
3588 
3589   if (HasOptionalOperands) {
3590     OS << "  SmallBitVector OptionalOperandsMask(" << MaxNumOperands << ");\n";
3591   }
3592 
3593   // Emit code to search the table.
3594   OS << "  // Find the appropriate table for this asm variant.\n";
3595   OS << "  const MatchEntry *Start, *End;\n";
3596   OS << "  switch (VariantID) {\n";
3597   OS << "  default: llvm_unreachable(\"invalid variant!\");\n";
3598   for (unsigned VC = 0; VC != VariantCount; ++VC) {
3599     Record *AsmVariant = Target.getAsmParserVariant(VC);
3600     int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
3601     OS << "  case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC
3602        << "); End = std::end(MatchTable" << VC << "); break;\n";
3603   }
3604   OS << "  }\n";
3605 
3606   OS << "  // Search the table.\n";
3607   if (HasMnemonicFirst) {
3608     OS << "  auto MnemonicRange = "
3609           "std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
3610   } else {
3611     OS << "  auto MnemonicRange = std::make_pair(Start, End);\n";
3612     OS << "  unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
3613     OS << "  if (!Mnemonic.empty())\n";
3614     OS << "    MnemonicRange = "
3615           "std::equal_range(Start, End, Mnemonic.lower(), LessOpcode());\n\n";
3616   }
3617 
3618   OS << "  DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"AsmMatcher: found \" <<\n"
3619      << "  std::distance(MnemonicRange.first, MnemonicRange.second) <<\n"
3620      << "  \" encodings with mnemonic '\" << Mnemonic << \"'\\n\");\n\n";
3621 
3622   OS << "  // Return a more specific error code if no mnemonics match.\n";
3623   OS << "  if (MnemonicRange.first == MnemonicRange.second)\n";
3624   OS << "    return Match_MnemonicFail;\n\n";
3625 
3626   OS << "  for (const MatchEntry *it = MnemonicRange.first, "
3627      << "*ie = MnemonicRange.second;\n";
3628   OS << "       it != ie; ++it) {\n";
3629   OS << "    const FeatureBitset &RequiredFeatures = "
3630         "FeatureBitsets[it->RequiredFeaturesIdx];\n";
3631   OS << "    bool HasRequiredFeatures =\n";
3632   OS << "      (AvailableFeatures & RequiredFeatures) == RequiredFeatures;\n";
3633   OS << "    DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Trying to match opcode \"\n";
3634   OS << "                                          << MII.getName(it->Opcode) << \"\\n\");\n";
3635 
3636   if (ReportMultipleNearMisses) {
3637     OS << "    // Some state to record ways in which this instruction did not match.\n";
3638     OS << "    NearMissInfo OperandNearMiss = NearMissInfo::getSuccess();\n";
3639     OS << "    NearMissInfo FeaturesNearMiss = NearMissInfo::getSuccess();\n";
3640     OS << "    NearMissInfo EarlyPredicateNearMiss = NearMissInfo::getSuccess();\n";
3641     OS << "    NearMissInfo LatePredicateNearMiss = NearMissInfo::getSuccess();\n";
3642     OS << "    bool MultipleInvalidOperands = false;\n";
3643   }
3644 
3645   if (HasMnemonicFirst) {
3646     OS << "    // equal_range guarantees that instruction mnemonic matches.\n";
3647     OS << "    assert(Mnemonic == it->getMnemonic());\n";
3648   }
3649 
3650   // Emit check that the subclasses match.
3651   if (!ReportMultipleNearMisses)
3652     OS << "    bool OperandsValid = true;\n";
3653   if (HasOptionalOperands) {
3654     OS << "    OptionalOperandsMask.reset(0, " << MaxNumOperands << ");\n";
3655   }
3656   OS << "    for (unsigned FormalIdx = " << (HasMnemonicFirst ? "0" : "SIndex")
3657      << ", ActualIdx = " << (HasMnemonicFirst ? "1" : "SIndex")
3658      << "; FormalIdx != " << MaxNumOperands << "; ++FormalIdx) {\n";
3659   OS << "      auto Formal = "
3660      << "static_cast<MatchClassKind>(it->Classes[FormalIdx]);\n";
3661   OS << "      DEBUG_WITH_TYPE(\"asm-matcher\",\n";
3662   OS << "                      dbgs() << \"  Matching formal operand class \" << getMatchClassName(Formal)\n";
3663   OS << "                             << \" against actual operand at index \" << ActualIdx);\n";
3664   OS << "      if (ActualIdx < Operands.size())\n";
3665   OS << "        DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \" (\";\n";
3666   OS << "                        Operands[ActualIdx]->print(dbgs()); dbgs() << \"): \");\n";
3667   OS << "      else\n";
3668   OS << "        DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \": \");\n";
3669   OS << "      if (ActualIdx >= Operands.size()) {\n";
3670   OS << "        DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"actual operand index out of range \");\n";
3671   if (ReportMultipleNearMisses) {
3672     OS << "        bool ThisOperandValid = (Formal == " <<"InvalidMatchClass) || "
3673                                    "isSubclass(Formal, OptionalMatchClass);\n";
3674     OS << "        if (!ThisOperandValid) {\n";
3675     OS << "          if (!OperandNearMiss) {\n";
3676     OS << "            // Record info about match failure for later use.\n";
3677     OS << "            DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"recording too-few-operands near miss\\n\");\n";
3678     OS << "            OperandNearMiss =\n";
3679     OS << "                NearMissInfo::getTooFewOperands(Formal, it->Opcode);\n";
3680     OS << "          } else if (OperandNearMiss.getKind() != NearMissInfo::NearMissTooFewOperands) {\n";
3681     OS << "            // If more than one operand is invalid, give up on this match entry.\n";
3682     OS << "            DEBUG_WITH_TYPE(\n";
3683     OS << "                \"asm-matcher\",\n";
3684     OS << "                dbgs() << \"second invalid operand, giving up on this opcode\\n\");\n";
3685     OS << "            MultipleInvalidOperands = true;\n";
3686     OS << "            break;\n";
3687     OS << "          }\n";
3688     OS << "        } else {\n";
3689     OS << "          DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"but formal operand not required\\n\");\n";
3690     OS << "          break;\n";
3691     OS << "        }\n";
3692     OS << "        continue;\n";
3693   } else {
3694     OS << "        OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass);\n";
3695     OS << "        if (!OperandsValid) ErrorInfo = ActualIdx;\n";
3696     if (HasOptionalOperands) {
3697       OS << "        OptionalOperandsMask.set(FormalIdx, " << MaxNumOperands
3698          << ");\n";
3699     }
3700     OS << "        break;\n";
3701   }
3702   OS << "      }\n";
3703   OS << "      MCParsedAsmOperand &Actual = *Operands[ActualIdx];\n";
3704   OS << "      unsigned Diag = validateOperandClass(Actual, Formal);\n";
3705   OS << "      if (Diag == Match_Success) {\n";
3706   OS << "        DEBUG_WITH_TYPE(\"asm-matcher\",\n";
3707   OS << "                        dbgs() << \"match success using generic matcher\\n\");\n";
3708   OS << "        ++ActualIdx;\n";
3709   OS << "        continue;\n";
3710   OS << "      }\n";
3711   OS << "      // If the generic handler indicates an invalid operand\n";
3712   OS << "      // failure, check for a special case.\n";
3713   OS << "      if (Diag != Match_Success) {\n";
3714   OS << "        unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);\n";
3715   OS << "        if (TargetDiag == Match_Success) {\n";
3716   OS << "          DEBUG_WITH_TYPE(\"asm-matcher\",\n";
3717   OS << "                          dbgs() << \"match success using target matcher\\n\");\n";
3718   OS << "          ++ActualIdx;\n";
3719   OS << "          continue;\n";
3720   OS << "        }\n";
3721   OS << "        // If the target matcher returned a specific error code use\n";
3722   OS << "        // that, else use the one from the generic matcher.\n";
3723   OS << "        if (TargetDiag != Match_InvalidOperand && "
3724         "HasRequiredFeatures)\n";
3725   OS << "          Diag = TargetDiag;\n";
3726   OS << "      }\n";
3727   OS << "      // If current formal operand wasn't matched and it is optional\n"
3728      << "      // then try to match next formal operand\n";
3729   OS << "      if (Diag == Match_InvalidOperand "
3730      << "&& isSubclass(Formal, OptionalMatchClass)) {\n";
3731   if (HasOptionalOperands) {
3732     OS << "        OptionalOperandsMask.set(FormalIdx);\n";
3733   }
3734     OS << "        DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"ignoring optional operand\\n\");\n";
3735   OS << "        continue;\n";
3736   OS << "      }\n";
3737 
3738   if (ReportMultipleNearMisses) {
3739     OS << "      if (!OperandNearMiss) {\n";
3740     OS << "        // If this is the first invalid operand we have seen, record some\n";
3741     OS << "        // information about it.\n";
3742     OS << "        DEBUG_WITH_TYPE(\n";
3743     OS << "            \"asm-matcher\",\n";
3744     OS << "            dbgs()\n";
3745     OS << "                << \"operand match failed, recording near-miss with diag code \"\n";
3746     OS << "                << Diag << \"\\n\");\n";
3747     OS << "        OperandNearMiss =\n";
3748     OS << "            NearMissInfo::getMissedOperand(Diag, Formal, it->Opcode, ActualIdx);\n";
3749     OS << "        ++ActualIdx;\n";
3750     OS << "      } else {\n";
3751     OS << "        // If more than one operand is invalid, give up on this match entry.\n";
3752     OS << "        DEBUG_WITH_TYPE(\n";
3753     OS << "            \"asm-matcher\",\n";
3754     OS << "            dbgs() << \"second operand mismatch, skipping this opcode\\n\");\n";
3755     OS << "        MultipleInvalidOperands = true;\n";
3756     OS << "        break;\n";
3757     OS << "      }\n";
3758     OS << "    }\n\n";
3759   } else {
3760     OS << "      // If this operand is broken for all of the instances of this\n";
3761     OS << "      // mnemonic, keep track of it so we can report loc info.\n";
3762     OS << "      // If we already had a match that only failed due to a\n";
3763     OS << "      // target predicate, that diagnostic is preferred.\n";
3764     OS << "      if (!HadMatchOtherThanPredicate &&\n";
3765     OS << "          (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {\n";
3766     OS << "        if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag "
3767           "!= Match_InvalidOperand))\n";
3768     OS << "          RetCode = Diag;\n";
3769     OS << "        ErrorInfo = ActualIdx;\n";
3770     OS << "      }\n";
3771     OS << "      // Otherwise, just reject this instance of the mnemonic.\n";
3772     OS << "      OperandsValid = false;\n";
3773     OS << "      break;\n";
3774     OS << "    }\n\n";
3775   }
3776 
3777   if (ReportMultipleNearMisses)
3778     OS << "    if (MultipleInvalidOperands) {\n";
3779   else
3780     OS << "    if (!OperandsValid) {\n";
3781   OS << "      DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Opcode result: multiple \"\n";
3782   OS << "                                               \"operand mismatches, ignoring \"\n";
3783   OS << "                                               \"this opcode\\n\");\n";
3784   OS << "      continue;\n";
3785   OS << "    }\n";
3786 
3787   // Emit check that the required features are available.
3788   OS << "    if (!HasRequiredFeatures) {\n";
3789   if (!ReportMultipleNearMisses)
3790     OS << "      HadMatchOtherThanFeatures = true;\n";
3791   OS << "      FeatureBitset NewMissingFeatures = RequiredFeatures & "
3792         "~AvailableFeatures;\n";
3793   OS << "      DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Missing target features:\";\n";
3794   OS << "                      for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I)\n";
3795   OS << "                        if (NewMissingFeatures[I])\n";
3796   OS << "                          dbgs() << ' ' << I;\n";
3797   OS << "                      dbgs() << \"\\n\");\n";
3798   if (ReportMultipleNearMisses) {
3799     OS << "      FeaturesNearMiss = NearMissInfo::getMissedFeature(NewMissingFeatures);\n";
3800   } else {
3801     OS << "      if (NewMissingFeatures.count() <=\n"
3802           "          MissingFeatures.count())\n";
3803     OS << "        MissingFeatures = NewMissingFeatures;\n";
3804     OS << "      continue;\n";
3805   }
3806   OS << "    }\n";
3807   OS << "\n";
3808   OS << "    Inst.clear();\n\n";
3809   OS << "    Inst.setOpcode(it->Opcode);\n";
3810   // Verify the instruction with the target-specific match predicate function.
3811   OS << "    // We have a potential match but have not rendered the operands.\n"
3812      << "    // Check the target predicate to handle any context sensitive\n"
3813         "    // constraints.\n"
3814      << "    // For example, Ties that are referenced multiple times must be\n"
3815         "    // checked here to ensure the input is the same for each match\n"
3816         "    // constraints. If we leave it any later the ties will have been\n"
3817         "    // canonicalized\n"
3818      << "    unsigned MatchResult;\n"
3819      << "    if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, "
3820         "Operands)) != Match_Success) {\n"
3821      << "      Inst.clear();\n";
3822   OS << "      DEBUG_WITH_TYPE(\n";
3823   OS << "          \"asm-matcher\",\n";
3824   OS << "          dbgs() << \"Early target match predicate failed with diag code \"\n";
3825   OS << "                 << MatchResult << \"\\n\");\n";
3826   if (ReportMultipleNearMisses) {
3827     OS << "      EarlyPredicateNearMiss = NearMissInfo::getMissedPredicate(MatchResult);\n";
3828   } else {
3829     OS << "      RetCode = MatchResult;\n"
3830        << "      HadMatchOtherThanPredicate = true;\n"
3831        << "      continue;\n";
3832   }
3833   OS << "    }\n\n";
3834 
3835   if (ReportMultipleNearMisses) {
3836     OS << "    // If we did not successfully match the operands, then we can't convert to\n";
3837     OS << "    // an MCInst, so bail out on this instruction variant now.\n";
3838     OS << "    if (OperandNearMiss) {\n";
3839     OS << "      // If the operand mismatch was the only problem, reprrt it as a near-miss.\n";
3840     OS << "      if (NearMisses && !FeaturesNearMiss && !EarlyPredicateNearMiss) {\n";
3841     OS << "        DEBUG_WITH_TYPE(\n";
3842     OS << "            \"asm-matcher\",\n";
3843     OS << "            dbgs()\n";
3844     OS << "                << \"Opcode result: one mismatched operand, adding near-miss\\n\");\n";
3845     OS << "        NearMisses->push_back(OperandNearMiss);\n";
3846     OS << "      } else {\n";
3847     OS << "        DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Opcode result: multiple \"\n";
3848     OS << "                                                 \"types of mismatch, so not \"\n";
3849     OS << "                                                 \"reporting near-miss\\n\");\n";
3850     OS << "      }\n";
3851     OS << "      continue;\n";
3852     OS << "    }\n\n";
3853   }
3854 
3855   OS << "    if (matchingInlineAsm) {\n";
3856   OS << "      convertToMapAndConstraints(it->ConvertFn, Operands);\n";
3857   if (!ReportMultipleNearMisses) {
3858     OS << "      if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, "
3859           "Operands, ErrorInfo))\n";
3860     OS << "        return Match_InvalidTiedOperand;\n";
3861     OS << "\n";
3862   }
3863   OS << "      return Match_Success;\n";
3864   OS << "    }\n\n";
3865   OS << "    // We have selected a definite instruction, convert the parsed\n"
3866      << "    // operands into the appropriate MCInst.\n";
3867   if (HasOptionalOperands) {
3868     OS << "    convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands,\n"
3869        << "                    OptionalOperandsMask);\n";
3870   } else {
3871     OS << "    convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
3872   }
3873   OS << "\n";
3874 
3875   // Verify the instruction with the target-specific match predicate function.
3876   OS << "    // We have a potential match. Check the target predicate to\n"
3877      << "    // handle any context sensitive constraints.\n"
3878      << "    if ((MatchResult = checkTargetMatchPredicate(Inst)) !="
3879      << " Match_Success) {\n"
3880      << "      DEBUG_WITH_TYPE(\"asm-matcher\",\n"
3881      << "                      dbgs() << \"Target match predicate failed with diag code \"\n"
3882      << "                             << MatchResult << \"\\n\");\n"
3883      << "      Inst.clear();\n";
3884   if (ReportMultipleNearMisses) {
3885     OS << "      LatePredicateNearMiss = NearMissInfo::getMissedPredicate(MatchResult);\n";
3886   } else {
3887     OS << "      RetCode = MatchResult;\n"
3888        << "      HadMatchOtherThanPredicate = true;\n"
3889        << "      continue;\n";
3890   }
3891   OS << "    }\n\n";
3892 
3893   if (ReportMultipleNearMisses) {
3894     OS << "    int NumNearMisses = ((int)(bool)OperandNearMiss +\n";
3895     OS << "                         (int)(bool)FeaturesNearMiss +\n";
3896     OS << "                         (int)(bool)EarlyPredicateNearMiss +\n";
3897     OS << "                         (int)(bool)LatePredicateNearMiss);\n";
3898     OS << "    if (NumNearMisses == 1) {\n";
3899     OS << "      // We had exactly one type of near-miss, so add that to the list.\n";
3900     OS << "      assert(!OperandNearMiss && \"OperandNearMiss was handled earlier\");\n";
3901     OS << "      DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Opcode result: found one type of \"\n";
3902     OS << "                                            \"mismatch, so reporting a \"\n";
3903     OS << "                                            \"near-miss\\n\");\n";
3904     OS << "      if (NearMisses && FeaturesNearMiss)\n";
3905     OS << "        NearMisses->push_back(FeaturesNearMiss);\n";
3906     OS << "      else if (NearMisses && EarlyPredicateNearMiss)\n";
3907     OS << "        NearMisses->push_back(EarlyPredicateNearMiss);\n";
3908     OS << "      else if (NearMisses && LatePredicateNearMiss)\n";
3909     OS << "        NearMisses->push_back(LatePredicateNearMiss);\n";
3910     OS << "\n";
3911     OS << "      continue;\n";
3912     OS << "    } else if (NumNearMisses > 1) {\n";
3913     OS << "      // This instruction missed in more than one way, so ignore it.\n";
3914     OS << "      DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Opcode result: multiple \"\n";
3915     OS << "                                               \"types of mismatch, so not \"\n";
3916     OS << "                                               \"reporting near-miss\\n\");\n";
3917     OS << "      continue;\n";
3918     OS << "    }\n";
3919   }
3920 
3921   // Call the post-processing function, if used.
3922   StringRef InsnCleanupFn = AsmParser->getValueAsString("AsmParserInstCleanup");
3923   if (!InsnCleanupFn.empty())
3924     OS << "    " << InsnCleanupFn << "(Inst);\n";
3925 
3926   if (HasDeprecation) {
3927     OS << "    std::string Info;\n";
3928     OS << "    if (!getParser().getTargetParser().getTargetOptions().MCNoDeprecatedWarn &&\n";
3929     OS << "        MII.getDeprecatedInfo(Inst, getSTI(), Info)) {\n";
3930     OS << "      SMLoc Loc = ((" << Target.getName()
3931        << "Operand &)*Operands[0]).getStartLoc();\n";
3932     OS << "      getParser().Warning(Loc, Info, None);\n";
3933     OS << "    }\n";
3934   }
3935 
3936   if (!ReportMultipleNearMisses) {
3937     OS << "    if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, "
3938           "Operands, ErrorInfo))\n";
3939     OS << "      return Match_InvalidTiedOperand;\n";
3940     OS << "\n";
3941   }
3942 
3943   OS << "    DEBUG_WITH_TYPE(\n";
3944   OS << "        \"asm-matcher\",\n";
3945   OS << "        dbgs() << \"Opcode result: complete match, selecting this opcode\\n\");\n";
3946   OS << "    return Match_Success;\n";
3947   OS << "  }\n\n";
3948 
3949   if (ReportMultipleNearMisses) {
3950     OS << "  // No instruction variants matched exactly.\n";
3951     OS << "  return Match_NearMisses;\n";
3952   } else {
3953     OS << "  // Okay, we had no match.  Try to return a useful error code.\n";
3954     OS << "  if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)\n";
3955     OS << "    return RetCode;\n\n";
3956     OS << "  ErrorInfo = 0;\n";
3957     OS << "  return Match_MissingFeature;\n";
3958   }
3959   OS << "}\n\n";
3960 
3961   if (!Info.OperandMatchInfo.empty())
3962     emitCustomOperandParsing(OS, Target, Info, ClassName, StringTable,
3963                              MaxMnemonicIndex, FeatureBitsets.size(),
3964                              HasMnemonicFirst);
3965 
3966   OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";
3967 
3968   OS << "\n#ifdef GET_MNEMONIC_SPELL_CHECKER\n";
3969   OS << "#undef GET_MNEMONIC_SPELL_CHECKER\n\n";
3970 
3971   emitMnemonicSpellChecker(OS, Target, VariantCount);
3972 
3973   OS << "#endif // GET_MNEMONIC_SPELL_CHECKER\n\n";
3974 
3975   OS << "\n#ifdef GET_MNEMONIC_CHECKER\n";
3976   OS << "#undef GET_MNEMONIC_CHECKER\n\n";
3977 
3978   emitMnemonicChecker(OS, Target, VariantCount,
3979                       HasMnemonicFirst, HasMnemonicAliases);
3980 
3981   OS << "#endif // GET_MNEMONIC_CHECKER\n\n";
3982 }
3983 
3984 namespace llvm {
3985 
3986 void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) {
3987   emitSourceFileHeader("Assembly Matcher Source Fragment", OS);
3988   AsmMatcherEmitter(RK).run(OS);
3989 }
3990 
3991 } // end namespace llvm
3992