1*0b57cec5SDimitry Andric //===--------------------- InstructionInfoView.h ----------------*- C++ -*-===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric /// \file 9*0b57cec5SDimitry Andric /// 10*0b57cec5SDimitry Andric /// This file implements the instruction info view. 11*0b57cec5SDimitry Andric /// 12*0b57cec5SDimitry Andric /// The goal fo the instruction info view is to print the latency and reciprocal 13*0b57cec5SDimitry Andric /// throughput information for every instruction in the input sequence. 14*0b57cec5SDimitry Andric /// This section also reports extra information related to the number of micro 15*0b57cec5SDimitry Andric /// opcodes, and opcode properties (i.e. 'MayLoad', 'MayStore', 'HasSideEffects) 16*0b57cec5SDimitry Andric /// 17*0b57cec5SDimitry Andric /// Example: 18*0b57cec5SDimitry Andric /// 19*0b57cec5SDimitry Andric /// Instruction Info: 20*0b57cec5SDimitry Andric /// [1]: #uOps 21*0b57cec5SDimitry Andric /// [2]: Latency 22*0b57cec5SDimitry Andric /// [3]: RThroughput 23*0b57cec5SDimitry Andric /// [4]: MayLoad 24*0b57cec5SDimitry Andric /// [5]: MayStore 25*0b57cec5SDimitry Andric /// [6]: HasSideEffects 26*0b57cec5SDimitry Andric /// 27*0b57cec5SDimitry Andric /// [1] [2] [3] [4] [5] [6] Instructions: 28*0b57cec5SDimitry Andric /// 1 2 1.00 vmulps %xmm0, %xmm1, %xmm2 29*0b57cec5SDimitry Andric /// 1 3 1.00 vhaddps %xmm2, %xmm2, %xmm3 30*0b57cec5SDimitry Andric /// 1 3 1.00 vhaddps %xmm3, %xmm3, %xmm4 31*0b57cec5SDimitry Andric // 32*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 33*0b57cec5SDimitry Andric 34*0b57cec5SDimitry Andric #ifndef LLVM_TOOLS_LLVM_MCA_INSTRUCTIONINFOVIEW_H 35*0b57cec5SDimitry Andric #define LLVM_TOOLS_LLVM_MCA_INSTRUCTIONINFOVIEW_H 36*0b57cec5SDimitry Andric 37*0b57cec5SDimitry Andric #include "Views/View.h" 38*0b57cec5SDimitry Andric #include "llvm/ADT/ArrayRef.h" 39*0b57cec5SDimitry Andric #include "llvm/MC/MCInst.h" 40*0b57cec5SDimitry Andric #include "llvm/MC/MCInstPrinter.h" 41*0b57cec5SDimitry Andric #include "llvm/MC/MCInstrInfo.h" 42*0b57cec5SDimitry Andric #include "llvm/MC/MCSubtargetInfo.h" 43*0b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h" 44*0b57cec5SDimitry Andric 45*0b57cec5SDimitry Andric #define DEBUG_TYPE "llvm-mca" 46*0b57cec5SDimitry Andric 47*0b57cec5SDimitry Andric namespace llvm { 48*0b57cec5SDimitry Andric namespace mca { 49*0b57cec5SDimitry Andric 50*0b57cec5SDimitry Andric /// A view that prints out generic instruction information. 51*0b57cec5SDimitry Andric class InstructionInfoView : public View { 52*0b57cec5SDimitry Andric const llvm::MCSubtargetInfo &STI; 53*0b57cec5SDimitry Andric const llvm::MCInstrInfo &MCII; 54*0b57cec5SDimitry Andric llvm::ArrayRef<llvm::MCInst> Source; 55*0b57cec5SDimitry Andric llvm::MCInstPrinter &MCIP; 56*0b57cec5SDimitry Andric 57*0b57cec5SDimitry Andric public: 58*0b57cec5SDimitry Andric InstructionInfoView(const llvm::MCSubtargetInfo &sti, 59*0b57cec5SDimitry Andric const llvm::MCInstrInfo &mcii, 60*0b57cec5SDimitry Andric llvm::ArrayRef<llvm::MCInst> S, llvm::MCInstPrinter &IP) 61*0b57cec5SDimitry Andric : STI(sti), MCII(mcii), Source(S), MCIP(IP) {} 62*0b57cec5SDimitry Andric 63*0b57cec5SDimitry Andric void printView(llvm::raw_ostream &OS) const override; 64*0b57cec5SDimitry Andric }; 65*0b57cec5SDimitry Andric } // namespace mca 66*0b57cec5SDimitry Andric } // namespace llvm 67*0b57cec5SDimitry Andric 68*0b57cec5SDimitry Andric #endif 69