1 //===--------------------- DispatchStatistics.cpp ---------------------*- C++ 2 //-*-===// 3 // 4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 5 // See https://llvm.org/LICENSE.txt for license information. 6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// 11 /// This file implements the DispatchStatistics interface. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "Views/DispatchStatistics.h" 16 #include "llvm/Support/Format.h" 17 18 namespace llvm { 19 namespace mca { 20 21 void DispatchStatistics::onEvent(const HWStallEvent &Event) { 22 if (Event.Type < HWStallEvent::LastGenericEvent) 23 HWStalls[Event.Type]++; 24 } 25 26 void DispatchStatistics::onEvent(const HWInstructionEvent &Event) { 27 if (Event.Type != HWInstructionEvent::Dispatched) 28 return; 29 30 const auto &DE = static_cast<const HWInstructionDispatchedEvent &>(Event); 31 NumDispatched += DE.MicroOpcodes; 32 } 33 34 void DispatchStatistics::printDispatchHistogram(raw_ostream &OS) const { 35 std::string Buffer; 36 raw_string_ostream TempStream(Buffer); 37 TempStream << "\n\nDispatch Logic - " 38 << "number of cycles where we saw N micro opcodes dispatched:\n"; 39 TempStream << "[# dispatched], [# cycles]\n"; 40 for (const std::pair<const unsigned, unsigned> &Entry : 41 DispatchGroupSizePerCycle) { 42 double Percentage = ((double)Entry.second / NumCycles) * 100.0; 43 TempStream << " " << Entry.first << ", " << Entry.second 44 << " (" << format("%.1f", floor((Percentage * 10) + 0.5) / 10) 45 << "%)\n"; 46 } 47 48 TempStream.flush(); 49 OS << Buffer; 50 } 51 52 static void printStalls(raw_ostream &OS, unsigned NumStalls, 53 unsigned NumCycles) { 54 if (!NumStalls) { 55 OS << NumStalls; 56 return; 57 } 58 59 double Percentage = ((double)NumStalls / NumCycles) * 100.0; 60 OS << NumStalls << " (" 61 << format("%.1f", floor((Percentage * 10) + 0.5) / 10) << "%)"; 62 } 63 64 void DispatchStatistics::printDispatchStalls(raw_ostream &OS) const { 65 std::string Buffer; 66 raw_string_ostream SS(Buffer); 67 SS << "\n\nDynamic Dispatch Stall Cycles:\n"; 68 SS << "RAT - Register unavailable: "; 69 printStalls(SS, HWStalls[HWStallEvent::RegisterFileStall], NumCycles); 70 SS << "\nRCU - Retire tokens unavailable: "; 71 printStalls(SS, HWStalls[HWStallEvent::RetireControlUnitStall], NumCycles); 72 SS << "\nSCHEDQ - Scheduler full: "; 73 printStalls(SS, HWStalls[HWStallEvent::SchedulerQueueFull], NumCycles); 74 SS << "\nLQ - Load queue full: "; 75 printStalls(SS, HWStalls[HWStallEvent::LoadQueueFull], NumCycles); 76 SS << "\nSQ - Store queue full: "; 77 printStalls(SS, HWStalls[HWStallEvent::StoreQueueFull], NumCycles); 78 SS << "\nGROUP - Static restrictions on the dispatch group: "; 79 printStalls(SS, HWStalls[HWStallEvent::DispatchGroupStall], NumCycles); 80 SS << '\n'; 81 SS.flush(); 82 OS << Buffer; 83 } 84 85 } // namespace mca 86 } // namespace llvm 87