xref: /freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/DispatchStatistics.cpp (revision 53071ed1c96db7f89defc99c95b0ad1031d48f45)
1 //===--------------------- DispatchStatistics.cpp ---------------------*- C++
2 //-*-===//
3 //
4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // See https://llvm.org/LICENSE.txt for license information.
6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 ///
11 /// This file implements the DispatchStatistics interface.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "Views/DispatchStatistics.h"
16 #include "llvm/Support/Format.h"
17 
18 namespace llvm {
19 namespace mca {
20 
21 void DispatchStatistics::onEvent(const HWStallEvent &Event) {
22   if (Event.Type < HWStallEvent::LastGenericEvent)
23     HWStalls[Event.Type]++;
24 }
25 
26 void DispatchStatistics::onEvent(const HWInstructionEvent &Event) {
27   if (Event.Type != HWInstructionEvent::Dispatched)
28     return;
29 
30   const auto &DE = static_cast<const HWInstructionDispatchedEvent &>(Event);
31   NumDispatched += DE.MicroOpcodes;
32 }
33 
34 void DispatchStatistics::printDispatchHistogram(raw_ostream &OS) const {
35   std::string Buffer;
36   raw_string_ostream TempStream(Buffer);
37   TempStream << "\n\nDispatch Logic - "
38              << "number of cycles where we saw N micro opcodes dispatched:\n";
39   TempStream << "[# dispatched], [# cycles]\n";
40   for (const std::pair<unsigned, unsigned> &Entry : DispatchGroupSizePerCycle) {
41     double Percentage = ((double)Entry.second / NumCycles) * 100.0;
42     TempStream << " " << Entry.first << ",              " << Entry.second
43                << "  (" << format("%.1f", floor((Percentage * 10) + 0.5) / 10)
44                << "%)\n";
45   }
46 
47   TempStream.flush();
48   OS << Buffer;
49 }
50 
51 static void printStalls(raw_ostream &OS, unsigned NumStalls,
52                         unsigned NumCycles) {
53   if (!NumStalls) {
54     OS << NumStalls;
55     return;
56   }
57 
58   double Percentage = ((double)NumStalls / NumCycles) * 100.0;
59   OS << NumStalls << "  ("
60      << format("%.1f", floor((Percentage * 10) + 0.5) / 10) << "%)";
61 }
62 
63 void DispatchStatistics::printDispatchStalls(raw_ostream &OS) const {
64   std::string Buffer;
65   raw_string_ostream SS(Buffer);
66   SS << "\n\nDynamic Dispatch Stall Cycles:\n";
67   SS << "RAT     - Register unavailable:                      ";
68   printStalls(SS, HWStalls[HWStallEvent::RegisterFileStall], NumCycles);
69   SS << "\nRCU     - Retire tokens unavailable:                 ";
70   printStalls(SS, HWStalls[HWStallEvent::RetireControlUnitStall], NumCycles);
71   SS << "\nSCHEDQ  - Scheduler full:                            ";
72   printStalls(SS, HWStalls[HWStallEvent::SchedulerQueueFull], NumCycles);
73   SS << "\nLQ      - Load queue full:                           ";
74   printStalls(SS, HWStalls[HWStallEvent::LoadQueueFull], NumCycles);
75   SS << "\nSQ      - Store queue full:                          ";
76   printStalls(SS, HWStalls[HWStallEvent::StoreQueueFull], NumCycles);
77   SS << "\nGROUP   - Static restrictions on the dispatch group: ";
78   printStalls(SS, HWStalls[HWStallEvent::DispatchGroupStall], NumCycles);
79   SS << '\n';
80   SS.flush();
81   OS << Buffer;
82 }
83 
84 } // namespace mca
85 } // namespace llvm
86