1//===- Xtensa.td - Describe the Xtensa Target Machine ------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 6// See https://llvm.org/LICENSE.txt for license information. 7// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 8// 9//===----------------------------------------------------------------------===// 10 11//===----------------------------------------------------------------------===// 12// Target-independent interfaces 13//===----------------------------------------------------------------------===// 14 15include "llvm/Target/Target.td" 16 17//===----------------------------------------------------------------------===// 18// Subtarget Features. 19//===----------------------------------------------------------------------===// 20def FeatureDensity : SubtargetFeature<"density", "HasDensity", "true", 21 "Enable Density instructions">; 22def HasDensity : Predicate<"Subtarget->hasDensity()">, 23 AssemblerPredicate<(all_of FeatureDensity)>; 24//===----------------------------------------------------------------------===// 25// Xtensa supported processors. 26//===----------------------------------------------------------------------===// 27class Proc<string Name, list<SubtargetFeature> Features> 28 : Processor<Name, NoItineraries, Features>; 29 30def : Proc<"generic", []>; 31 32//===----------------------------------------------------------------------===// 33// Register File Description 34//===----------------------------------------------------------------------===// 35 36include "XtensaRegisterInfo.td" 37 38//===----------------------------------------------------------------------===// 39// Instruction Descriptions 40//===----------------------------------------------------------------------===// 41 42include "XtensaInstrInfo.td" 43 44def XtensaInstrInfo : InstrInfo; 45 46//===----------------------------------------------------------------------===// 47// Target Declaration 48//===----------------------------------------------------------------------===// 49 50def XtensaAsmParser : AsmParser { 51 let ShouldEmitMatchRegisterAltName = 1; 52} 53 54def XtensaInstPrinter : AsmWriter { 55 string AsmWriterClassName = "InstPrinter"; 56} 57 58def Xtensa : Target { 59 let InstructionSet = XtensaInstrInfo; 60 let AssemblyWriters = [XtensaInstPrinter]; 61 let AssemblyParsers = [XtensaAsmParser]; 62} 63 64