1*0b57cec5SDimitry Andric //===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric // 9*0b57cec5SDimitry Andric // This file defines the X86 subclass for SelectionDAGTargetInfo. 10*0b57cec5SDimitry Andric // 11*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 12*0b57cec5SDimitry Andric 13*0b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H 14*0b57cec5SDimitry Andric #define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H 15*0b57cec5SDimitry Andric 16*0b57cec5SDimitry Andric #include "llvm/CodeGen/SelectionDAGTargetInfo.h" 17*0b57cec5SDimitry Andric #include "llvm/MC/MCRegisterInfo.h" 18*0b57cec5SDimitry Andric 19*0b57cec5SDimitry Andric namespace llvm { 20*0b57cec5SDimitry Andric 21*0b57cec5SDimitry Andric class X86TargetLowering; 22*0b57cec5SDimitry Andric class X86TargetMachine; 23*0b57cec5SDimitry Andric class X86Subtarget; 24*0b57cec5SDimitry Andric 25*0b57cec5SDimitry Andric class X86SelectionDAGInfo : public SelectionDAGTargetInfo { 26*0b57cec5SDimitry Andric /// Returns true if it is possible for the base register to conflict with the 27*0b57cec5SDimitry Andric /// given set of clobbers for a memory intrinsic. 28*0b57cec5SDimitry Andric bool isBaseRegConflictPossible(SelectionDAG &DAG, 29*0b57cec5SDimitry Andric ArrayRef<MCPhysReg> ClobberSet) const; 30*0b57cec5SDimitry Andric 31*0b57cec5SDimitry Andric public: 32*0b57cec5SDimitry Andric explicit X86SelectionDAGInfo() = default; 33*0b57cec5SDimitry Andric 34*0b57cec5SDimitry Andric SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, 35*0b57cec5SDimitry Andric SDValue Chain, SDValue Dst, SDValue Src, 36*0b57cec5SDimitry Andric SDValue Size, unsigned Align, bool isVolatile, 37*0b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo) const override; 38*0b57cec5SDimitry Andric 39*0b57cec5SDimitry Andric SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 40*0b57cec5SDimitry Andric SDValue Chain, SDValue Dst, SDValue Src, 41*0b57cec5SDimitry Andric SDValue Size, unsigned Align, bool isVolatile, 42*0b57cec5SDimitry Andric bool AlwaysInline, 43*0b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo, 44*0b57cec5SDimitry Andric MachinePointerInfo SrcPtrInfo) const override; 45*0b57cec5SDimitry Andric }; 46*0b57cec5SDimitry Andric 47*0b57cec5SDimitry Andric } 48*0b57cec5SDimitry Andric 49*0b57cec5SDimitry Andric #endif 50