1 //===-- X86MachineFunctionInfo.h - X86 machine function info ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares X86-specific per-machine-function information. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_X86_X86MACHINEFUNCTIONINFO_H 14 #define LLVM_LIB_TARGET_X86_X86MACHINEFUNCTIONINFO_H 15 16 #include "llvm/ADT/ArrayRef.h" 17 #include "llvm/ADT/SmallVector.h" 18 #include "llvm/CodeGen/CallingConvLower.h" 19 #include "llvm/CodeGen/MachineFunction.h" 20 21 namespace llvm { 22 23 /// X86MachineFunctionInfo - This class is derived from MachineFunction and 24 /// contains private X86 target-specific information for each MachineFunction. 25 class X86MachineFunctionInfo : public MachineFunctionInfo { 26 virtual void anchor(); 27 28 /// ForceFramePointer - True if the function is required to use of frame 29 /// pointer for reasons other than it containing dynamic allocation or 30 /// that FP eliminatation is turned off. For example, Cygwin main function 31 /// contains stack pointer re-alignment code which requires FP. 32 bool ForceFramePointer = false; 33 34 /// RestoreBasePointerOffset - Non-zero if the function has base pointer 35 /// and makes call to llvm.eh.sjlj.setjmp. When non-zero, the value is a 36 /// displacement from the frame pointer to a slot where the base pointer 37 /// is stashed. 38 signed char RestoreBasePointerOffset = 0; 39 40 /// WinEHXMMSlotInfo - Slot information of XMM registers in the stack frame 41 /// in bytes. 42 DenseMap<int, unsigned> WinEHXMMSlotInfo; 43 44 /// CalleeSavedFrameSize - Size of the callee-saved register portion of the 45 /// stack frame in bytes. 46 unsigned CalleeSavedFrameSize = 0; 47 48 /// BytesToPopOnReturn - Number of bytes function pops on return (in addition 49 /// to the space used by the return address). 50 /// Used on windows platform for stdcall & fastcall name decoration 51 unsigned BytesToPopOnReturn = 0; 52 53 /// ReturnAddrIndex - FrameIndex for return slot. 54 int ReturnAddrIndex = 0; 55 56 /// FrameIndex for return slot. 57 int FrameAddrIndex = 0; 58 59 /// TailCallReturnAddrDelta - The number of bytes by which return address 60 /// stack slot is moved as the result of tail call optimization. 61 int TailCallReturnAddrDelta = 0; 62 63 /// SRetReturnReg - Some subtargets require that sret lowering includes 64 /// returning the value of the returned struct in a register. This field 65 /// holds the virtual register into which the sret argument is passed. 66 Register SRetReturnReg; 67 68 /// GlobalBaseReg - keeps track of the virtual register initialized for 69 /// use as the global base register. This is used for PIC in some PIC 70 /// relocation models. 71 Register GlobalBaseReg; 72 73 /// VarArgsFrameIndex - FrameIndex for start of varargs area. 74 int VarArgsFrameIndex = 0; 75 /// RegSaveFrameIndex - X86-64 vararg func register save area. 76 int RegSaveFrameIndex = 0; 77 /// VarArgsGPOffset - X86-64 vararg func int reg offset. 78 unsigned VarArgsGPOffset = 0; 79 /// VarArgsFPOffset - X86-64 vararg func fp reg offset. 80 unsigned VarArgsFPOffset = 0; 81 /// ArgumentStackSize - The number of bytes on stack consumed by the arguments 82 /// being passed on the stack. 83 unsigned ArgumentStackSize = 0; 84 /// NumLocalDynamics - Number of local-dynamic TLS accesses. 85 unsigned NumLocalDynamics = 0; 86 /// HasPushSequences - Keeps track of whether this function uses sequences 87 /// of pushes to pass function parameters. 88 bool HasPushSequences = false; 89 90 /// True if the function recovers from an SEH exception, and therefore needs 91 /// to spill and restore the frame pointer. 92 bool HasSEHFramePtrSave = false; 93 94 /// The frame index of a stack object containing the original frame pointer 95 /// used to address arguments in a function using a base pointer. 96 int SEHFramePtrSaveIndex = 0; 97 98 /// True if this function has a subset of CSRs that is handled explicitly via 99 /// copies. 100 bool IsSplitCSR = false; 101 102 /// True if this function uses the red zone. 103 bool UsesRedZone = false; 104 105 /// True if this function has DYN_ALLOCA instructions. 106 bool HasDynAlloca = false; 107 108 /// True if this function has any preallocated calls. 109 bool HasPreallocatedCall = false; 110 111 /// Whether this function has an extended frame record [Ctx, RBP, Return 112 /// addr]. If so, bit 60 of the in-memory frame pointer will be 1 to enable 113 /// other tools to detect the extended record. 114 bool HasSwiftAsyncContext = false; 115 116 /// True if this function has tile virtual register. This is used to 117 /// determine if we should insert tilerelease in frame lowering. 118 bool HasVirtualTileReg = false; 119 120 Optional<int> SwiftAsyncContextFrameIdx; 121 122 // Preallocated fields are only used during isel. 123 // FIXME: Can we find somewhere else to store these? 124 DenseMap<const Value *, size_t> PreallocatedIds; 125 SmallVector<size_t, 0> PreallocatedStackSizes; 126 SmallVector<SmallVector<size_t, 4>, 0> PreallocatedArgOffsets; 127 128 private: 129 /// ForwardedMustTailRegParms - A list of virtual and physical registers 130 /// that must be forwarded to every musttail call. 131 SmallVector<ForwardedRegister, 1> ForwardedMustTailRegParms; 132 133 public: 134 X86MachineFunctionInfo() = default; 135 136 explicit X86MachineFunctionInfo(MachineFunction &MF) {} 137 explicit X86MachineFunctionInfo(const X86MachineFunctionInfo &) = default; 138 139 MachineFunctionInfo * 140 clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, 141 const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB) 142 const override; 143 144 bool getForceFramePointer() const { return ForceFramePointer;} 145 void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; } 146 147 bool getHasPushSequences() const { return HasPushSequences; } 148 void setHasPushSequences(bool HasPush) { HasPushSequences = HasPush; } 149 150 bool getRestoreBasePointer() const { return RestoreBasePointerOffset!=0; } 151 void setRestoreBasePointer(const MachineFunction *MF); 152 int getRestoreBasePointerOffset() const {return RestoreBasePointerOffset; } 153 154 DenseMap<int, unsigned>& getWinEHXMMSlotInfo() { return WinEHXMMSlotInfo; } 155 const DenseMap<int, unsigned>& getWinEHXMMSlotInfo() const { 156 return WinEHXMMSlotInfo; } 157 158 unsigned getCalleeSavedFrameSize() const { return CalleeSavedFrameSize; } 159 void setCalleeSavedFrameSize(unsigned bytes) { CalleeSavedFrameSize = bytes; } 160 161 unsigned getBytesToPopOnReturn() const { return BytesToPopOnReturn; } 162 void setBytesToPopOnReturn (unsigned bytes) { BytesToPopOnReturn = bytes;} 163 164 int getRAIndex() const { return ReturnAddrIndex; } 165 void setRAIndex(int Index) { ReturnAddrIndex = Index; } 166 167 int getFAIndex() const { return FrameAddrIndex; } 168 void setFAIndex(int Index) { FrameAddrIndex = Index; } 169 170 int getTCReturnAddrDelta() const { return TailCallReturnAddrDelta; } 171 void setTCReturnAddrDelta(int delta) {TailCallReturnAddrDelta = delta;} 172 173 Register getSRetReturnReg() const { return SRetReturnReg; } 174 void setSRetReturnReg(Register Reg) { SRetReturnReg = Reg; } 175 176 Register getGlobalBaseReg() const { return GlobalBaseReg; } 177 void setGlobalBaseReg(Register Reg) { GlobalBaseReg = Reg; } 178 179 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } 180 void setVarArgsFrameIndex(int Idx) { VarArgsFrameIndex = Idx; } 181 182 int getRegSaveFrameIndex() const { return RegSaveFrameIndex; } 183 void setRegSaveFrameIndex(int Idx) { RegSaveFrameIndex = Idx; } 184 185 unsigned getVarArgsGPOffset() const { return VarArgsGPOffset; } 186 void setVarArgsGPOffset(unsigned Offset) { VarArgsGPOffset = Offset; } 187 188 unsigned getVarArgsFPOffset() const { return VarArgsFPOffset; } 189 void setVarArgsFPOffset(unsigned Offset) { VarArgsFPOffset = Offset; } 190 191 unsigned getArgumentStackSize() const { return ArgumentStackSize; } 192 void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; } 193 194 unsigned getNumLocalDynamicTLSAccesses() const { return NumLocalDynamics; } 195 void incNumLocalDynamicTLSAccesses() { ++NumLocalDynamics; } 196 197 bool getHasSEHFramePtrSave() const { return HasSEHFramePtrSave; } 198 void setHasSEHFramePtrSave(bool V) { HasSEHFramePtrSave = V; } 199 200 int getSEHFramePtrSaveIndex() const { return SEHFramePtrSaveIndex; } 201 void setSEHFramePtrSaveIndex(int Index) { SEHFramePtrSaveIndex = Index; } 202 203 SmallVectorImpl<ForwardedRegister> &getForwardedMustTailRegParms() { 204 return ForwardedMustTailRegParms; 205 } 206 207 bool isSplitCSR() const { return IsSplitCSR; } 208 void setIsSplitCSR(bool s) { IsSplitCSR = s; } 209 210 bool getUsesRedZone() const { return UsesRedZone; } 211 void setUsesRedZone(bool V) { UsesRedZone = V; } 212 213 bool hasDynAlloca() const { return HasDynAlloca; } 214 void setHasDynAlloca(bool v) { HasDynAlloca = v; } 215 216 bool hasPreallocatedCall() const { return HasPreallocatedCall; } 217 void setHasPreallocatedCall(bool v) { HasPreallocatedCall = v; } 218 219 bool hasSwiftAsyncContext() const { return HasSwiftAsyncContext; } 220 void setHasSwiftAsyncContext(bool v) { HasSwiftAsyncContext = v; } 221 222 bool hasVirtualTileReg() const { return HasVirtualTileReg; } 223 void setHasVirtualTileReg(bool v) { HasVirtualTileReg = v; } 224 225 Optional<int> getSwiftAsyncContextFrameIdx() const { 226 return SwiftAsyncContextFrameIdx; 227 } 228 void setSwiftAsyncContextFrameIdx(int v) { SwiftAsyncContextFrameIdx = v; } 229 230 size_t getPreallocatedIdForCallSite(const Value *CS) { 231 auto Insert = PreallocatedIds.insert({CS, PreallocatedIds.size()}); 232 if (Insert.second) { 233 PreallocatedStackSizes.push_back(0); 234 PreallocatedArgOffsets.emplace_back(); 235 } 236 return Insert.first->second; 237 } 238 239 void setPreallocatedStackSize(size_t Id, size_t StackSize) { 240 PreallocatedStackSizes[Id] = StackSize; 241 } 242 243 size_t getPreallocatedStackSize(const size_t Id) { 244 assert(PreallocatedStackSizes[Id] != 0 && "stack size not set"); 245 return PreallocatedStackSizes[Id]; 246 } 247 248 void setPreallocatedArgOffsets(size_t Id, ArrayRef<size_t> AO) { 249 PreallocatedArgOffsets[Id].assign(AO.begin(), AO.end()); 250 } 251 252 ArrayRef<size_t> getPreallocatedArgOffsets(const size_t Id) { 253 assert(!PreallocatedArgOffsets[Id].empty() && "arg offsets not set"); 254 return PreallocatedArgOffsets[Id]; 255 } 256 }; 257 258 } // End llvm namespace 259 260 #endif 261