1//===---------------------------*-tablegen-*-------------------------------===// 2//===------------- X86InstrKL.td - KL Instruction Set Extension -----------===// 3// 4// The LLVM Compiler Infrastructure 5// 6// This file is distributed under the University of Illinois Open Source 7// License. See LICENSE.TXT for details. 8// 9//===----------------------------------------------------------------------===// 10// 11// This file describes the instructions that make up the Intel key locker 12// instruction set. 13// 14//===----------------------------------------------------------------------===// 15 16//===----------------------------------------------------------------------===// 17// Key Locker instructions 18 19let SchedRW = [WriteSystem], Predicates = [HasKL] in { 20 let Uses = [XMM0, EAX], Defs = [EFLAGS] in { 21 def LOADIWKEY : I<0xDC, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2), 22 "loadiwkey\t{$src2, $src1|$src1, $src2}", 23 [(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8XS, 24 NotMemoryFoldable; 25 } 26 27 let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in { 28 def ENCODEKEY128 : I<0xFA, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src), 29 "encodekey128\t{$src, $dst|$dst, $src}", []>, T8XS, 30 NotMemoryFoldable; 31 } 32 33 let Uses = [XMM0, XMM1], Defs = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, EFLAGS] in { 34 def ENCODEKEY256 : I<0xFB, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src), 35 "encodekey256\t{$src, $dst|$dst, $src}", []>, T8XS, 36 NotMemoryFoldable; 37 } 38 39 let Constraints = "$src1 = $dst", 40 Defs = [EFLAGS] in { 41 def AESENC128KL : I<0xDC, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2), 42 "aesenc128kl\t{$src2, $src1|$src1, $src2}", 43 [(set VR128:$dst, EFLAGS, 44 (X86aesenc128kl VR128:$src1, addr:$src2))]>, T8XS, 45 NotMemoryFoldable; 46 47 def AESDEC128KL : I<0xDD, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2), 48 "aesdec128kl\t{$src2, $src1|$src1, $src2}", 49 [(set VR128:$dst, EFLAGS, 50 (X86aesdec128kl VR128:$src1, addr:$src2))]>, T8XS, 51 NotMemoryFoldable; 52 53 def AESENC256KL : I<0xDE, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2), 54 "aesenc256kl\t{$src2, $src1|$src1, $src2}", 55 [(set VR128:$dst, EFLAGS, 56 (X86aesenc256kl VR128:$src1, addr:$src2))]>, T8XS, 57 NotMemoryFoldable; 58 59 def AESDEC256KL : I<0xDF, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2), 60 "aesdec256kl\t{$src2, $src1|$src1, $src2}", 61 [(set VR128:$dst, EFLAGS, 62 (X86aesdec256kl VR128:$src1, addr:$src2))]>, T8XS, 63 NotMemoryFoldable; 64 } 65 66} // SchedRW, Predicates 67 68let SchedRW = [WriteSystem], Predicates = [HasWIDEKL] in { 69 let Uses = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7], 70 Defs = [EFLAGS, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7], 71 mayLoad = 1 in { 72 def AESENCWIDE128KL : I<0xD8, MRM0m, (outs), (ins opaquemem:$src), 73 "aesencwide128kl\t$src", []>, T8XS, 74 NotMemoryFoldable; 75 def AESDECWIDE128KL : I<0xD8, MRM1m, (outs), (ins opaquemem:$src), 76 "aesdecwide128kl\t$src", []>, T8XS, 77 NotMemoryFoldable; 78 def AESENCWIDE256KL : I<0xD8, MRM2m, (outs), (ins opaquemem:$src), 79 "aesencwide256kl\t$src", []>, T8XS, 80 NotMemoryFoldable; 81 def AESDECWIDE256KL : I<0xD8, MRM3m, (outs), (ins opaquemem:$src), 82 "aesdecwide256kl\t$src", []>, T8XS, 83 NotMemoryFoldable; 84 } 85 86} // SchedRW, Predicates 87