1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file provides pattern fragments useful for SIMD instructions. 10// 11//===----------------------------------------------------------------------===// 12 13//===----------------------------------------------------------------------===// 14// MMX specific DAG Nodes. 15//===----------------------------------------------------------------------===// 16 17// Low word of MMX to GPR. 18def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1, 19 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>; 20// GPR to low word of MMX. 21def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1, 22 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>; 23 24//===----------------------------------------------------------------------===// 25// MMX Pattern Fragments 26//===----------------------------------------------------------------------===// 27 28def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>; 29 30//===----------------------------------------------------------------------===// 31// SSE specific DAG Nodes. 32//===----------------------------------------------------------------------===// 33 34def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>, 35 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, 36 SDTCisVT<3, i8>]>; 37 38def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>; 39def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>; 40def X86fmins : SDNode<"X86ISD::FMINS", SDTFPBinOp>; 41def X86fmaxs : SDNode<"X86ISD::FMAXS", SDTFPBinOp>; 42 43// Commutative and Associative FMIN and FMAX. 44def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp, 45 [SDNPCommutative, SDNPAssociative]>; 46def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp, 47 [SDNPCommutative, SDNPAssociative]>; 48 49def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp, 50 [SDNPCommutative, SDNPAssociative]>; 51def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp, 52 [SDNPCommutative, SDNPAssociative]>; 53def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp, 54 [SDNPCommutative, SDNPAssociative]>; 55def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp>; 56def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>; 57def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>; 58def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>; 59def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>; 60def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>; 61def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>; 62def X86comi : SDNode<"X86ISD::COMI", SDTX86FCmp>; 63def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86FCmp>; 64 65def SDTX86Cmps : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<0, 1>, 66 SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>; 67def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>; 68 69def X86pshufb : SDNode<"X86ISD::PSHUFB", 70 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i8>, SDTCisSameAs<0,1>, 71 SDTCisSameAs<0,2>]>>; 72def X86psadbw : SDNode<"X86ISD::PSADBW", 73 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>, 74 SDTCVecEltisVT<1, i8>, 75 SDTCisSameSizeAs<0,1>, 76 SDTCisSameAs<1,2>]>, [SDNPCommutative]>; 77def X86dbpsadbw : SDNode<"X86ISD::DBPSADBW", 78 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, i16>, 79 SDTCVecEltisVT<1, i8>, 80 SDTCisSameSizeAs<0,1>, 81 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>>; 82def X86andnp : SDNode<"X86ISD::ANDNP", 83 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, 84 SDTCisSameAs<0,2>]>>; 85def X86multishift : SDNode<"X86ISD::MULTISHIFT", 86 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, 87 SDTCisSameAs<1,2>]>>; 88def X86pextrb : SDNode<"X86ISD::PEXTRB", 89 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>, 90 SDTCisVT<2, i8>]>>; 91def X86pextrw : SDNode<"X86ISD::PEXTRW", 92 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>, 93 SDTCisVT<2, i8>]>>; 94def X86pinsrb : SDNode<"X86ISD::PINSRB", 95 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>, 96 SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>; 97def X86pinsrw : SDNode<"X86ISD::PINSRW", 98 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>, 99 SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>; 100def X86insertps : SDNode<"X86ISD::INSERTPS", 101 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>, 102 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>; 103def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL", 104 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>; 105 106def X86vzld : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad, 107 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 108def X86vextractst : SDNode<"X86ISD::VEXTRACT_STORE", SDTStore, 109 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 110def X86VBroadcastld : SDNode<"X86ISD::VBROADCAST_LOAD", SDTLoad, 111 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 112def X86SubVBroadcastld : SDNode<"X86ISD::SUBV_BROADCAST_LOAD", SDTLoad, 113 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 114 115def SDTVtrunc : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>, 116 SDTCisInt<0>, SDTCisInt<1>, 117 SDTCisOpSmallerThanOp<0, 1>]>; 118def SDTVmtrunc : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>, 119 SDTCisInt<0>, SDTCisInt<1>, 120 SDTCisOpSmallerThanOp<0, 1>, 121 SDTCisSameAs<0, 2>, 122 SDTCVecEltisVT<3, i1>, 123 SDTCisSameNumEltsAs<1, 3>]>; 124 125def X86vtrunc : SDNode<"X86ISD::VTRUNC", SDTVtrunc>; 126def X86vtruncs : SDNode<"X86ISD::VTRUNCS", SDTVtrunc>; 127def X86vtruncus : SDNode<"X86ISD::VTRUNCUS", SDTVtrunc>; 128def X86vmtrunc : SDNode<"X86ISD::VMTRUNC", SDTVmtrunc>; 129def X86vmtruncs : SDNode<"X86ISD::VMTRUNCS", SDTVmtrunc>; 130def X86vmtruncus : SDNode<"X86ISD::VMTRUNCUS", SDTVmtrunc>; 131 132def X86vfpext : SDNode<"X86ISD::VFPEXT", 133 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>, 134 SDTCisFP<1>, SDTCisVec<1>]>>; 135 136def X86strict_vfpext : SDNode<"X86ISD::STRICT_VFPEXT", 137 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>, 138 SDTCisFP<1>, SDTCisVec<1>]>, 139 [SDNPHasChain]>; 140 141def X86any_vfpext : PatFrags<(ops node:$src), 142 [(X86strict_vfpext node:$src), 143 (X86vfpext node:$src)]>; 144 145def X86vfpround: SDNode<"X86ISD::VFPROUND", 146 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>, 147 SDTCisFP<1>, SDTCisVec<1>, 148 SDTCisOpSmallerThanOp<0, 1>]>>; 149 150def X86strict_vfpround: SDNode<"X86ISD::STRICT_VFPROUND", 151 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>, 152 SDTCisFP<1>, SDTCisVec<1>, 153 SDTCisOpSmallerThanOp<0, 1>]>, 154 [SDNPHasChain]>; 155 156def X86any_vfpround : PatFrags<(ops node:$src), 157 [(X86strict_vfpround node:$src), 158 (X86vfpround node:$src)]>; 159 160def X86frounds : SDNode<"X86ISD::VFPROUNDS", 161 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>, 162 SDTCisSameAs<0, 1>, 163 SDTCisFP<2>, SDTCisVec<2>, 164 SDTCisSameSizeAs<0, 2>]>>; 165 166def X86froundsRnd: SDNode<"X86ISD::VFPROUNDS_RND", 167 SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>, 168 SDTCisSameAs<0, 1>, 169 SDTCisFP<2>, SDTCisVec<2>, 170 SDTCisSameSizeAs<0, 2>, 171 SDTCisVT<3, i32>]>>; 172 173def X86fpexts : SDNode<"X86ISD::VFPEXTS", 174 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>, 175 SDTCisSameAs<0, 1>, 176 SDTCisFP<2>, SDTCisVec<2>, 177 SDTCisSameSizeAs<0, 2>]>>; 178def X86fpextsSAE : SDNode<"X86ISD::VFPEXTS_SAE", 179 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>, 180 SDTCisSameAs<0, 1>, 181 SDTCisFP<2>, SDTCisVec<2>, 182 SDTCisSameSizeAs<0, 2>]>>; 183 184def X86vmfpround: SDNode<"X86ISD::VMFPROUND", 185 SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>, 186 SDTCisFP<1>, SDTCisVec<1>, 187 SDTCisSameAs<0, 2>, 188 SDTCVecEltisVT<3, i1>, 189 SDTCisSameNumEltsAs<1, 3>]>>; 190 191def X86vshiftimm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, 192 SDTCisVT<2, i8>, SDTCisInt<0>]>; 193 194def X86vshldq : SDNode<"X86ISD::VSHLDQ", X86vshiftimm>; 195def X86vshrdq : SDNode<"X86ISD::VSRLDQ", X86vshiftimm>; 196def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>; 197def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>; 198 199def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>; 200def X86strict_cmpp : SDNode<"X86ISD::STRICT_CMPP", SDTX86VFCMP, [SDNPHasChain]>; 201def X86any_cmpp : PatFrags<(ops node:$src1, node:$src2, node:$src3), 202 [(X86strict_cmpp node:$src1, node:$src2, node:$src3), 203 (X86cmpp node:$src1, node:$src2, node:$src3)]>; 204 205def X86CmpMaskCC : 206 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>, 207 SDTCisVec<1>, SDTCisSameAs<2, 1>, 208 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>; 209def X86MaskCmpMaskCC : 210 SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>, 211 SDTCisVec<1>, SDTCisSameAs<2, 1>, 212 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>, SDTCisSameAs<4, 0>]>; 213def X86CmpMaskCCScalar : 214 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisFP<1>, SDTCisSameAs<1, 2>, 215 SDTCisVT<3, i8>]>; 216 217def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>; 218def X86cmpmm : SDNode<"X86ISD::CMPMM", X86MaskCmpMaskCC>; 219def X86strict_cmpm : SDNode<"X86ISD::STRICT_CMPM", X86CmpMaskCC, [SDNPHasChain]>; 220def X86any_cmpm : PatFrags<(ops node:$src1, node:$src2, node:$src3), 221 [(X86strict_cmpm node:$src1, node:$src2, node:$src3), 222 (X86cmpm node:$src1, node:$src2, node:$src3)]>; 223def X86cmpmmSAE : SDNode<"X86ISD::CMPMM_SAE", X86MaskCmpMaskCC>; 224def X86cmpms : SDNode<"X86ISD::FSETCCM", X86CmpMaskCCScalar>; 225def X86cmpmsSAE : SDNode<"X86ISD::FSETCCM_SAE", X86CmpMaskCCScalar>; 226 227def X86phminpos: SDNode<"X86ISD::PHMINPOS", 228 SDTypeProfile<1, 1, [SDTCisVT<0, v8i16>, SDTCisVT<1, v8i16>]>>; 229 230def X86vshiftuniform : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, 231 SDTCisVec<2>, SDTCisInt<0>, 232 SDTCisInt<2>]>; 233 234def X86vshl : SDNode<"X86ISD::VSHL", X86vshiftuniform>; 235def X86vsrl : SDNode<"X86ISD::VSRL", X86vshiftuniform>; 236def X86vsra : SDNode<"X86ISD::VSRA", X86vshiftuniform>; 237 238def X86vshiftvariable : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, 239 SDTCisSameAs<0,2>, SDTCisInt<0>]>; 240 241def X86vshlv : SDNode<"X86ISD::VSHLV", X86vshiftvariable>; 242def X86vsrlv : SDNode<"X86ISD::VSRLV", X86vshiftvariable>; 243def X86vsrav : SDNode<"X86ISD::VSRAV", X86vshiftvariable>; 244 245def X86vshli : SDNode<"X86ISD::VSHLI", X86vshiftimm>; 246def X86vsrli : SDNode<"X86ISD::VSRLI", X86vshiftimm>; 247def X86vsrai : SDNode<"X86ISD::VSRAI", X86vshiftimm>; 248 249def X86kshiftl : SDNode<"X86ISD::KSHIFTL", 250 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i1>, 251 SDTCisSameAs<0, 1>, 252 SDTCisVT<2, i8>]>>; 253def X86kshiftr : SDNode<"X86ISD::KSHIFTR", 254 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i1>, 255 SDTCisSameAs<0, 1>, 256 SDTCisVT<2, i8>]>>; 257 258def X86kadd : SDNode<"X86ISD::KADD", SDTIntBinOp, [SDNPCommutative]>; 259 260def X86vrotli : SDNode<"X86ISD::VROTLI", X86vshiftimm>; 261def X86vrotri : SDNode<"X86ISD::VROTRI", X86vshiftimm>; 262 263def X86vpshl : SDNode<"X86ISD::VPSHL", X86vshiftvariable>; 264def X86vpsha : SDNode<"X86ISD::VPSHA", X86vshiftvariable>; 265 266def X86vpcom : SDNode<"X86ISD::VPCOM", 267 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>, 268 SDTCisSameAs<0,2>, 269 SDTCisVT<3, i8>, SDTCisInt<0>]>>; 270def X86vpcomu : SDNode<"X86ISD::VPCOMU", 271 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>, 272 SDTCisSameAs<0,2>, 273 SDTCisVT<3, i8>, SDTCisInt<0>]>>; 274def X86vpermil2 : SDNode<"X86ISD::VPERMIL2", 275 SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>, 276 SDTCisSameAs<0,2>, 277 SDTCisFP<0>, SDTCisInt<3>, 278 SDTCisSameNumEltsAs<0, 3>, 279 SDTCisSameSizeAs<0,3>, 280 SDTCisVT<4, i8>]>>; 281def X86vpperm : SDNode<"X86ISD::VPPERM", 282 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>, 283 SDTCisSameAs<0,2>, SDTCisSameAs<0, 3>]>>; 284 285def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, 286 SDTCisVec<1>, 287 SDTCisSameAs<2, 1>]>; 288 289def X86mulhrs : SDNode<"X86ISD::MULHRS", SDTIntBinOp, [SDNPCommutative]>; 290def X86avg : SDNode<"X86ISD::AVG" , SDTIntBinOp, [SDNPCommutative]>; 291def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>; 292def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>; 293def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>; 294def X86ktest : SDNode<"X86ISD::KTEST", SDTX86CmpPTest>; 295 296def X86movmsk : SDNode<"X86ISD::MOVMSK", 297 SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisVec<1>]>>; 298 299def X86selects : SDNode<"X86ISD::SELECTS", 300 SDTypeProfile<1, 3, [SDTCisVT<1, v1i1>, 301 SDTCisSameAs<0, 2>, 302 SDTCisSameAs<2, 3>]>>; 303 304def X86pmuludq : SDNode<"X86ISD::PMULUDQ", 305 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>, 306 SDTCisSameAs<0,1>, 307 SDTCisSameAs<1,2>]>, 308 [SDNPCommutative]>; 309def X86pmuldq : SDNode<"X86ISD::PMULDQ", 310 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i64>, 311 SDTCisSameAs<0,1>, 312 SDTCisSameAs<1,2>]>, 313 [SDNPCommutative]>; 314 315def X86extrqi : SDNode<"X86ISD::EXTRQI", 316 SDTypeProfile<1, 3, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>, 317 SDTCisVT<2, i8>, SDTCisVT<3, i8>]>>; 318def X86insertqi : SDNode<"X86ISD::INSERTQI", 319 SDTypeProfile<1, 4, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>, 320 SDTCisSameAs<1,2>, SDTCisVT<3, i8>, 321 SDTCisVT<4, i8>]>>; 322 323// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get 324// translated into one of the target nodes below during lowering. 325// Note: this is a work in progress... 326def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>; 327def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, 328 SDTCisSameAs<0,2>]>; 329def SDTShuff2OpFP : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisFP<0>, 330 SDTCisSameAs<0,1>, SDTCisSameAs<0,2>]>; 331 332def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, 333 SDTCisFP<0>, SDTCisInt<2>, 334 SDTCisSameNumEltsAs<0,2>, 335 SDTCisSameSizeAs<0,2>]>; 336def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>, 337 SDTCisSameAs<0,1>, SDTCisVT<2, i8>]>; 338def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>, 339 SDTCisSameAs<0,2>, SDTCisVT<3, i8>]>; 340def SDTFPBinOpImm: SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>, 341 SDTCisSameAs<0,1>, 342 SDTCisSameAs<0,2>, 343 SDTCisVT<3, i32>]>; 344def SDTFPTernaryOpImm: SDTypeProfile<1, 4, [SDTCisFP<0>, SDTCisSameAs<0,1>, 345 SDTCisSameAs<0,2>, 346 SDTCisInt<3>, 347 SDTCisSameSizeAs<0, 3>, 348 SDTCisSameNumEltsAs<0, 3>, 349 SDTCisVT<4, i32>]>; 350def SDTFPUnaryOpImm: SDTypeProfile<1, 2, [SDTCisFP<0>, 351 SDTCisSameAs<0,1>, 352 SDTCisVT<2, i32>]>; 353 354def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>; 355def SDTVBroadcastm : SDTypeProfile<1, 1, [SDTCisVec<0>, 356 SDTCisInt<0>, SDTCisInt<1>]>; 357 358def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>, 359 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>; 360 361def SDTTernlog : SDTypeProfile<1, 4, [SDTCisInt<0>, SDTCisVec<0>, 362 SDTCisSameAs<0,1>, SDTCisSameAs<0,2>, 363 SDTCisSameAs<0,3>, SDTCisVT<4, i8>]>; 364 365def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc. 366 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisVT<3, i32>]>; 367 368def SDTFPUnaryOpRound : SDTypeProfile<1, 2, [ // fsqrt_round, fgetexp_round, etc. 369 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisVT<2, i32>]>; 370 371def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>, 372 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, 373 SDTCisFP<0>, SDTCisVT<4, i32>]>; 374 375def X86PAlignr : SDNode<"X86ISD::PALIGNR", 376 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, i8>, 377 SDTCisSameAs<0,1>, 378 SDTCisSameAs<0,2>, 379 SDTCisVT<3, i8>]>>; 380def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>; 381 382def X86VShld : SDNode<"X86ISD::VSHLD", SDTShuff3OpI>; 383def X86VShrd : SDNode<"X86ISD::VSHRD", SDTShuff3OpI>; 384def X86VShldv : SDNode<"X86ISD::VSHLDV", 385 SDTypeProfile<1, 3, [SDTCisVec<0>, 386 SDTCisSameAs<0,1>, 387 SDTCisSameAs<0,2>, 388 SDTCisSameAs<0,3>]>>; 389def X86VShrdv : SDNode<"X86ISD::VSHRDV", 390 SDTypeProfile<1, 3, [SDTCisVec<0>, 391 SDTCisSameAs<0,1>, 392 SDTCisSameAs<0,2>, 393 SDTCisSameAs<0,3>]>>; 394 395def X86Conflict : SDNode<"X86ISD::CONFLICT", SDTIntUnaryOp>; 396 397def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>; 398def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>; 399def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>; 400 401def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>; 402def X86Shuf128 : SDNode<"X86ISD::SHUF128", SDTShuff3OpI>; 403 404def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>; 405def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>; 406def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>; 407 408def X86Movsd : SDNode<"X86ISD::MOVSD", 409 SDTypeProfile<1, 2, [SDTCisVT<0, v2f64>, 410 SDTCisVT<1, v2f64>, 411 SDTCisVT<2, v2f64>]>>; 412def X86Movss : SDNode<"X86ISD::MOVSS", 413 SDTypeProfile<1, 2, [SDTCisVT<0, v4f32>, 414 SDTCisVT<1, v4f32>, 415 SDTCisVT<2, v4f32>]>>; 416 417def X86Movsh : SDNode<"X86ISD::MOVSH", 418 SDTypeProfile<1, 2, [SDTCisVT<0, v8f16>, 419 SDTCisVT<1, v8f16>, 420 SDTCisVT<2, v8f16>]>>; 421 422def X86Movlhps : SDNode<"X86ISD::MOVLHPS", 423 SDTypeProfile<1, 2, [SDTCisVT<0, v4f32>, 424 SDTCisVT<1, v4f32>, 425 SDTCisVT<2, v4f32>]>>; 426def X86Movhlps : SDNode<"X86ISD::MOVHLPS", 427 SDTypeProfile<1, 2, [SDTCisVT<0, v4f32>, 428 SDTCisVT<1, v4f32>, 429 SDTCisVT<2, v4f32>]>>; 430 431def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisInt<0>, 432 SDTCisVec<1>, SDTCisInt<1>, 433 SDTCisSameSizeAs<0,1>, 434 SDTCisSameAs<1,2>, 435 SDTCisOpSmallerThanOp<0, 1>]>; 436def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>; 437def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>; 438 439def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>; 440def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>; 441 442def X86vpmaddubsw : SDNode<"X86ISD::VPMADDUBSW", 443 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i16>, 444 SDTCVecEltisVT<1, i8>, 445 SDTCisSameSizeAs<0,1>, 446 SDTCisSameAs<1,2>]>>; 447def X86vpmaddwd : SDNode<"X86ISD::VPMADDWD", 448 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i32>, 449 SDTCVecEltisVT<1, i16>, 450 SDTCisSameSizeAs<0,1>, 451 SDTCisSameAs<1,2>]>, 452 [SDNPCommutative]>; 453 454def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>; 455def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>; 456def X86VPermv : SDNode<"X86ISD::VPERMV", 457 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisInt<1>, 458 SDTCisSameNumEltsAs<0,1>, 459 SDTCisSameSizeAs<0,1>, 460 SDTCisSameAs<0,2>]>>; 461def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>; 462def X86VPermt2 : SDNode<"X86ISD::VPERMV3", 463 SDTypeProfile<1, 3, [SDTCisVec<0>, 464 SDTCisSameAs<0,1>, SDTCisInt<2>, 465 SDTCisVec<2>, SDTCisSameNumEltsAs<0, 2>, 466 SDTCisSameSizeAs<0,2>, 467 SDTCisSameAs<0,3>]>, []>; 468 469def X86vpternlog : SDNode<"X86ISD::VPTERNLOG", SDTTernlog>; 470 471def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>; 472 473def X86VFixupimm : SDNode<"X86ISD::VFIXUPIMM", SDTFPTernaryOpImm>; 474def X86VFixupimmSAE : SDNode<"X86ISD::VFIXUPIMM_SAE", SDTFPTernaryOpImm>; 475def X86VFixupimms : SDNode<"X86ISD::VFIXUPIMMS", SDTFPTernaryOpImm>; 476def X86VFixupimmSAEs : SDNode<"X86ISD::VFIXUPIMMS_SAE", SDTFPTernaryOpImm>; 477def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImm>; 478def X86VRangeSAE : SDNode<"X86ISD::VRANGE_SAE", SDTFPBinOpImm>; 479def X86VReduce : SDNode<"X86ISD::VREDUCE", SDTFPUnaryOpImm>; 480def X86VReduceSAE : SDNode<"X86ISD::VREDUCE_SAE", SDTFPUnaryOpImm>; 481def X86VRndScale : SDNode<"X86ISD::VRNDSCALE", SDTFPUnaryOpImm>; 482def X86strict_VRndScale : SDNode<"X86ISD::STRICT_VRNDSCALE", SDTFPUnaryOpImm, 483 [SDNPHasChain]>; 484def X86any_VRndScale : PatFrags<(ops node:$src1, node:$src2), 485 [(X86strict_VRndScale node:$src1, node:$src2), 486 (X86VRndScale node:$src1, node:$src2)]>; 487 488def X86VRndScaleSAE: SDNode<"X86ISD::VRNDSCALE_SAE", SDTFPUnaryOpImm>; 489def X86VGetMant : SDNode<"X86ISD::VGETMANT", SDTFPUnaryOpImm>; 490def X86VGetMantSAE : SDNode<"X86ISD::VGETMANT_SAE", SDTFPUnaryOpImm>; 491def X86Vfpclass : SDNode<"X86ISD::VFPCLASS", 492 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i1>, 493 SDTCisFP<1>, 494 SDTCisSameNumEltsAs<0,1>, 495 SDTCisVT<2, i32>]>, []>; 496def X86Vfpclasss : SDNode<"X86ISD::VFPCLASSS", 497 SDTypeProfile<1, 2, [SDTCisVT<0, v1i1>, 498 SDTCisFP<1>, SDTCisVT<2, i32>]>,[]>; 499 500def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>; 501def X86VBroadcastm : SDNode<"X86ISD::VBROADCASTM", SDTVBroadcastm>; 502 503def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>; 504def X86Blendv : SDNode<"X86ISD::BLENDV", 505 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisInt<1>, 506 SDTCisSameAs<0, 2>, 507 SDTCisSameAs<2, 3>, 508 SDTCisSameNumEltsAs<0, 1>, 509 SDTCisSameSizeAs<0, 1>]>>; 510 511def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>; 512 513def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>; 514def X86fadds : SDNode<"X86ISD::FADDS", SDTFPBinOp>; 515def X86faddRnds : SDNode<"X86ISD::FADDS_RND", SDTFPBinOpRound>; 516def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>; 517def X86fsubs : SDNode<"X86ISD::FSUBS", SDTFPBinOp>; 518def X86fsubRnds : SDNode<"X86ISD::FSUBS_RND", SDTFPBinOpRound>; 519def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>; 520def X86fmuls : SDNode<"X86ISD::FMULS", SDTFPBinOp>; 521def X86fmulRnds : SDNode<"X86ISD::FMULS_RND", SDTFPBinOpRound>; 522def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>; 523def X86fdivs : SDNode<"X86ISD::FDIVS", SDTFPBinOp>; 524def X86fdivRnds : SDNode<"X86ISD::FDIVS_RND", SDTFPBinOpRound>; 525def X86fmaxSAE : SDNode<"X86ISD::FMAX_SAE", SDTFPBinOp>; 526def X86fmaxSAEs : SDNode<"X86ISD::FMAXS_SAE", SDTFPBinOp>; 527def X86fminSAE : SDNode<"X86ISD::FMIN_SAE", SDTFPBinOp>; 528def X86fminSAEs : SDNode<"X86ISD::FMINS_SAE", SDTFPBinOp>; 529def X86scalef : SDNode<"X86ISD::SCALEF", SDTFPBinOp>; 530def X86scalefRnd : SDNode<"X86ISD::SCALEF_RND", SDTFPBinOpRound>; 531def X86scalefs : SDNode<"X86ISD::SCALEFS", SDTFPBinOp>; 532def X86scalefsRnd: SDNode<"X86ISD::SCALEFS_RND", SDTFPBinOpRound>; 533def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>; 534def X86fsqrts : SDNode<"X86ISD::FSQRTS", SDTFPBinOp>; 535def X86fsqrtRnds : SDNode<"X86ISD::FSQRTS_RND", SDTFPBinOpRound>; 536def X86fgetexp : SDNode<"X86ISD::FGETEXP", SDTFPUnaryOp>; 537def X86fgetexpSAE : SDNode<"X86ISD::FGETEXP_SAE", SDTFPUnaryOp>; 538def X86fgetexps : SDNode<"X86ISD::FGETEXPS", SDTFPBinOp>; 539def X86fgetexpSAEs : SDNode<"X86ISD::FGETEXPS_SAE", SDTFPBinOp>; 540 541def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFPTernaryOp, [SDNPCommutative]>; 542def X86strict_Fnmadd : SDNode<"X86ISD::STRICT_FNMADD", SDTFPTernaryOp, [SDNPCommutative, SDNPHasChain]>; 543def X86any_Fnmadd : PatFrags<(ops node:$src1, node:$src2, node:$src3), 544 [(X86strict_Fnmadd node:$src1, node:$src2, node:$src3), 545 (X86Fnmadd node:$src1, node:$src2, node:$src3)]>; 546def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFPTernaryOp, [SDNPCommutative]>; 547def X86strict_Fmsub : SDNode<"X86ISD::STRICT_FMSUB", SDTFPTernaryOp, [SDNPCommutative, SDNPHasChain]>; 548def X86any_Fmsub : PatFrags<(ops node:$src1, node:$src2, node:$src3), 549 [(X86strict_Fmsub node:$src1, node:$src2, node:$src3), 550 (X86Fmsub node:$src1, node:$src2, node:$src3)]>; 551def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFPTernaryOp, [SDNPCommutative]>; 552def X86strict_Fnmsub : SDNode<"X86ISD::STRICT_FNMSUB", SDTFPTernaryOp, [SDNPCommutative, SDNPHasChain]>; 553def X86any_Fnmsub : PatFrags<(ops node:$src1, node:$src2, node:$src3), 554 [(X86strict_Fnmsub node:$src1, node:$src2, node:$src3), 555 (X86Fnmsub node:$src1, node:$src2, node:$src3)]>; 556def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFPTernaryOp, [SDNPCommutative]>; 557def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFPTernaryOp, [SDNPCommutative]>; 558 559def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound, [SDNPCommutative]>; 560def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound, [SDNPCommutative]>; 561def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound, [SDNPCommutative]>; 562def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound, [SDNPCommutative]>; 563def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound, [SDNPCommutative]>; 564def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound, [SDNPCommutative]>; 565 566def X86vp2intersect : SDNode<"X86ISD::VP2INTERSECT", 567 SDTypeProfile<1, 2, [SDTCisVT<0, untyped>, 568 SDTCisVec<1>, SDTCisSameAs<1, 2>]>>; 569 570def SDTIFma : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<0,1>, 571 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>; 572def x86vpmadd52l : SDNode<"X86ISD::VPMADD52L", SDTIFma, [SDNPCommutative]>; 573def x86vpmadd52h : SDNode<"X86ISD::VPMADD52H", SDTIFma, [SDNPCommutative]>; 574 575def x86vfmaddc : SDNode<"X86ISD::VFMADDC", SDTFPTernaryOp, [SDNPCommutative]>; 576def x86vfmaddcRnd : SDNode<"X86ISD::VFMADDC_RND", SDTFmaRound, [SDNPCommutative]>; 577def x86vfcmaddc : SDNode<"X86ISD::VFCMADDC", SDTFPTernaryOp>; 578def x86vfcmaddcRnd : SDNode<"X86ISD::VFCMADDC_RND", SDTFmaRound>; 579def x86vfmulc : SDNode<"X86ISD::VFMULC", SDTFPBinOp, [SDNPCommutative]>; 580def x86vfmulcRnd : SDNode<"X86ISD::VFMULC_RND", SDTFPBinOpRound, [SDNPCommutative]>; 581def x86vfcmulc : SDNode<"X86ISD::VFCMULC", SDTFPBinOp>; 582def x86vfcmulcRnd : SDNode<"X86ISD::VFCMULC_RND", SDTFPBinOpRound>; 583 584def x86vfmaddcSh : SDNode<"X86ISD::VFMADDCSH", SDTFPTernaryOp, [SDNPCommutative]>; 585def x86vfcmaddcSh : SDNode<"X86ISD::VFCMADDCSH", SDTFPTernaryOp>; 586def x86vfmulcSh : SDNode<"X86ISD::VFMULCSH", SDTFPBinOp, [SDNPCommutative]>; 587def x86vfcmulcSh : SDNode<"X86ISD::VFCMULCSH", SDTFPBinOp>; 588def x86vfmaddcShRnd : SDNode<"X86ISD::VFMADDCSH_RND", SDTFmaRound, [SDNPCommutative]>; 589def x86vfcmaddcShRnd : SDNode<"X86ISD::VFCMADDCSH_RND",SDTFmaRound>; 590def x86vfmulcShRnd : SDNode<"X86ISD::VFMULCSH_RND", SDTFPBinOpRound, [SDNPCommutative]>; 591def x86vfcmulcShRnd : SDNode<"X86ISD::VFCMULCSH_RND", SDTFPBinOpRound>; 592 593def X86rsqrt14 : SDNode<"X86ISD::RSQRT14", SDTFPUnaryOp>; 594def X86rcp14 : SDNode<"X86ISD::RCP14", SDTFPUnaryOp>; 595 596// VNNI 597def SDTVnni : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>, 598 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>; 599def X86Vpdpbusd : SDNode<"X86ISD::VPDPBUSD", SDTVnni>; 600def X86Vpdpbusds : SDNode<"X86ISD::VPDPBUSDS", SDTVnni>; 601def X86Vpdpwssd : SDNode<"X86ISD::VPDPWSSD", SDTVnni>; 602def X86Vpdpwssds : SDNode<"X86ISD::VPDPWSSDS", SDTVnni>; 603 604def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", SDTFPUnaryOp>; 605def X86rsqrt28SAE: SDNode<"X86ISD::RSQRT28_SAE", SDTFPUnaryOp>; 606def X86rcp28 : SDNode<"X86ISD::RCP28", SDTFPUnaryOp>; 607def X86rcp28SAE : SDNode<"X86ISD::RCP28_SAE", SDTFPUnaryOp>; 608def X86exp2 : SDNode<"X86ISD::EXP2", SDTFPUnaryOp>; 609def X86exp2SAE : SDNode<"X86ISD::EXP2_SAE", SDTFPUnaryOp>; 610 611def X86rsqrt14s : SDNode<"X86ISD::RSQRT14S", SDTFPBinOp>; 612def X86rcp14s : SDNode<"X86ISD::RCP14S", SDTFPBinOp>; 613def X86rsqrt28s : SDNode<"X86ISD::RSQRT28S", SDTFPBinOp>; 614def X86rsqrt28SAEs : SDNode<"X86ISD::RSQRT28S_SAE", SDTFPBinOp>; 615def X86rcp28s : SDNode<"X86ISD::RCP28S", SDTFPBinOp>; 616def X86rcp28SAEs : SDNode<"X86ISD::RCP28S_SAE", SDTFPBinOp>; 617def X86Ranges : SDNode<"X86ISD::VRANGES", SDTFPBinOpImm>; 618def X86RndScales : SDNode<"X86ISD::VRNDSCALES", SDTFPBinOpImm>; 619def X86Reduces : SDNode<"X86ISD::VREDUCES", SDTFPBinOpImm>; 620def X86GetMants : SDNode<"X86ISD::VGETMANTS", SDTFPBinOpImm>; 621def X86RangesSAE : SDNode<"X86ISD::VRANGES_SAE", SDTFPBinOpImm>; 622def X86RndScalesSAE : SDNode<"X86ISD::VRNDSCALES_SAE", SDTFPBinOpImm>; 623def X86ReducesSAE : SDNode<"X86ISD::VREDUCES_SAE", SDTFPBinOpImm>; 624def X86GetMantsSAE : SDNode<"X86ISD::VGETMANTS_SAE", SDTFPBinOpImm>; 625 626def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 3, 627 [SDTCisSameAs<0, 1>, SDTCisVec<1>, 628 SDTCisSameAs<0, 2>, SDTCVecEltisVT<3, i1>, 629 SDTCisSameNumEltsAs<0, 3>]>, []>; 630def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 3, 631 [SDTCisSameAs<0, 1>, SDTCisVec<1>, 632 SDTCisSameAs<0, 2>, SDTCVecEltisVT<3, i1>, 633 SDTCisSameNumEltsAs<0, 3>]>, []>; 634 635// vpshufbitqmb 636def X86Vpshufbitqmb : SDNode<"X86ISD::VPSHUFBITQMB", 637 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, 638 SDTCisSameAs<1,2>, 639 SDTCVecEltisVT<0,i1>, 640 SDTCisSameNumEltsAs<0,1>]>>; 641 642def SDTintToFP: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisFP<0>, 643 SDTCisSameAs<0,1>, SDTCisInt<2>]>; 644def SDTintToFPRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisFP<0>, 645 SDTCisSameAs<0,1>, SDTCisInt<2>, 646 SDTCisVT<3, i32>]>; 647 648def SDTFloatToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>, 649 SDTCisInt<0>, SDTCisFP<1>]>; 650def SDTFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, 651 SDTCisInt<0>, SDTCisFP<1>, 652 SDTCisVT<2, i32>]>; 653def SDTSFloatToInt: SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisFP<1>, 654 SDTCisVec<1>]>; 655def SDTSFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisFP<1>, 656 SDTCisVec<1>, SDTCisVT<2, i32>]>; 657 658def SDTVintToFP: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>, 659 SDTCisFP<0>, SDTCisInt<1>]>; 660def SDTVintToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, 661 SDTCisFP<0>, SDTCisInt<1>, 662 SDTCisVT<2, i32>]>; 663 664// Scalar 665def X86SintToFp : SDNode<"X86ISD::SCALAR_SINT_TO_FP", SDTintToFP>; 666def X86SintToFpRnd : SDNode<"X86ISD::SCALAR_SINT_TO_FP_RND", SDTintToFPRound>; 667def X86UintToFp : SDNode<"X86ISD::SCALAR_UINT_TO_FP", SDTintToFP>; 668def X86UintToFpRnd : SDNode<"X86ISD::SCALAR_UINT_TO_FP_RND", SDTintToFPRound>; 669 670def X86cvtts2Int : SDNode<"X86ISD::CVTTS2SI", SDTSFloatToInt>; 671def X86cvtts2UInt : SDNode<"X86ISD::CVTTS2UI", SDTSFloatToInt>; 672def X86cvtts2IntSAE : SDNode<"X86ISD::CVTTS2SI_SAE", SDTSFloatToInt>; 673def X86cvtts2UIntSAE : SDNode<"X86ISD::CVTTS2UI_SAE", SDTSFloatToInt>; 674 675def X86cvts2si : SDNode<"X86ISD::CVTS2SI", SDTSFloatToInt>; 676def X86cvts2usi : SDNode<"X86ISD::CVTS2UI", SDTSFloatToInt>; 677def X86cvts2siRnd : SDNode<"X86ISD::CVTS2SI_RND", SDTSFloatToIntRnd>; 678def X86cvts2usiRnd : SDNode<"X86ISD::CVTS2UI_RND", SDTSFloatToIntRnd>; 679 680// Vector with rounding mode 681 682// cvtt fp-to-int staff 683def X86cvttp2siSAE : SDNode<"X86ISD::CVTTP2SI_SAE", SDTFloatToInt>; 684def X86cvttp2uiSAE : SDNode<"X86ISD::CVTTP2UI_SAE", SDTFloatToInt>; 685 686def X86VSintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTVintToFPRound>; 687def X86VUintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTVintToFPRound>; 688 689// cvt fp-to-int staff 690def X86cvtp2IntRnd : SDNode<"X86ISD::CVTP2SI_RND", SDTFloatToIntRnd>; 691def X86cvtp2UIntRnd : SDNode<"X86ISD::CVTP2UI_RND", SDTFloatToIntRnd>; 692 693// Vector without rounding mode 694 695// cvtt fp-to-int staff 696def X86cvttp2si : SDNode<"X86ISD::CVTTP2SI", SDTFloatToInt>; 697def X86cvttp2ui : SDNode<"X86ISD::CVTTP2UI", SDTFloatToInt>; 698def X86strict_cvttp2si : SDNode<"X86ISD::STRICT_CVTTP2SI", SDTFloatToInt, [SDNPHasChain]>; 699def X86strict_cvttp2ui : SDNode<"X86ISD::STRICT_CVTTP2UI", SDTFloatToInt, [SDNPHasChain]>; 700def X86any_cvttp2si : PatFrags<(ops node:$src), 701 [(X86strict_cvttp2si node:$src), 702 (X86cvttp2si node:$src)]>; 703def X86any_cvttp2ui : PatFrags<(ops node:$src), 704 [(X86strict_cvttp2ui node:$src), 705 (X86cvttp2ui node:$src)]>; 706 707def X86VSintToFP : SDNode<"X86ISD::CVTSI2P", SDTVintToFP>; 708def X86VUintToFP : SDNode<"X86ISD::CVTUI2P", SDTVintToFP>; 709def X86strict_VSintToFP : SDNode<"X86ISD::STRICT_CVTSI2P", SDTVintToFP, [SDNPHasChain]>; 710def X86strict_VUintToFP : SDNode<"X86ISD::STRICT_CVTUI2P", SDTVintToFP, [SDNPHasChain]>; 711def X86any_VSintToFP : PatFrags<(ops node:$src), 712 [(X86strict_VSintToFP node:$src), 713 (X86VSintToFP node:$src)]>; 714def X86any_VUintToFP : PatFrags<(ops node:$src), 715 [(X86strict_VUintToFP node:$src), 716 (X86VUintToFP node:$src)]>; 717 718 719// cvt int-to-fp staff 720def X86cvtp2Int : SDNode<"X86ISD::CVTP2SI", SDTFloatToInt>; 721def X86cvtp2UInt : SDNode<"X86ISD::CVTP2UI", SDTFloatToInt>; 722 723 724// Masked versions of above 725def SDTMVintToFP: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>, 726 SDTCisFP<0>, SDTCisInt<1>, 727 SDTCisSameAs<0, 2>, 728 SDTCVecEltisVT<3, i1>, 729 SDTCisSameNumEltsAs<1, 3>]>; 730def SDTMFloatToInt: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>, 731 SDTCisInt<0>, SDTCisFP<1>, 732 SDTCisSameSizeAs<0, 1>, 733 SDTCisSameAs<0, 2>, 734 SDTCVecEltisVT<3, i1>, 735 SDTCisSameNumEltsAs<1, 3>]>; 736 737def X86VMSintToFP : SDNode<"X86ISD::MCVTSI2P", SDTMVintToFP>; 738def X86VMUintToFP : SDNode<"X86ISD::MCVTUI2P", SDTMVintToFP>; 739 740def X86mcvtp2Int : SDNode<"X86ISD::MCVTP2SI", SDTMFloatToInt>; 741def X86mcvtp2UInt : SDNode<"X86ISD::MCVTP2UI", SDTMFloatToInt>; 742def X86mcvttp2si : SDNode<"X86ISD::MCVTTP2SI", SDTMFloatToInt>; 743def X86mcvttp2ui : SDNode<"X86ISD::MCVTTP2UI", SDTMFloatToInt>; 744 745def SDTcvtph2ps : SDTypeProfile<1, 1, [SDTCVecEltisVT<0, f32>, 746 SDTCVecEltisVT<1, i16>]>; 747def X86cvtph2ps : SDNode<"X86ISD::CVTPH2PS", SDTcvtph2ps>; 748def X86strict_cvtph2ps : SDNode<"X86ISD::STRICT_CVTPH2PS", SDTcvtph2ps, 749 [SDNPHasChain]>; 750def X86any_cvtph2ps : PatFrags<(ops node:$src), 751 [(X86strict_cvtph2ps node:$src), 752 (X86cvtph2ps node:$src)]>; 753 754def X86cvtph2psSAE : SDNode<"X86ISD::CVTPH2PS_SAE", SDTcvtph2ps>; 755 756def SDTcvtps2ph : SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i16>, 757 SDTCVecEltisVT<1, f32>, 758 SDTCisVT<2, i32>]>; 759def X86cvtps2ph : SDNode<"X86ISD::CVTPS2PH", SDTcvtps2ph>; 760def X86strict_cvtps2ph : SDNode<"X86ISD::STRICT_CVTPS2PH", SDTcvtps2ph, 761 [SDNPHasChain]>; 762def X86any_cvtps2ph : PatFrags<(ops node:$src1, node:$src2), 763 [(X86strict_cvtps2ph node:$src1, node:$src2), 764 (X86cvtps2ph node:$src1, node:$src2)]>; 765 766def X86mcvtps2ph : SDNode<"X86ISD::MCVTPS2PH", 767 SDTypeProfile<1, 4, [SDTCVecEltisVT<0, i16>, 768 SDTCVecEltisVT<1, f32>, 769 SDTCisVT<2, i32>, 770 SDTCisSameAs<0, 3>, 771 SDTCVecEltisVT<4, i1>, 772 SDTCisSameNumEltsAs<1, 4>]> >; 773def X86vfpextSAE : SDNode<"X86ISD::VFPEXT_SAE", 774 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>, 775 SDTCisFP<1>, SDTCisVec<1>, 776 SDTCisOpSmallerThanOp<1, 0>]>>; 777def X86vfproundRnd: SDNode<"X86ISD::VFPROUND_RND", 778 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>, 779 SDTCisFP<1>, SDTCisVec<1>, 780 SDTCisOpSmallerThanOp<0, 1>, 781 SDTCisVT<2, i32>]>>; 782 783// cvt fp to bfloat16 784def X86cvtne2ps2bf16 : SDNode<"X86ISD::CVTNE2PS2BF16", 785 SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i16>, 786 SDTCVecEltisVT<1, f32>, 787 SDTCisSameSizeAs<0,1>, 788 SDTCisSameAs<1,2>]>>; 789def X86mcvtneps2bf16 : SDNode<"X86ISD::MCVTNEPS2BF16", 790 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, i16>, 791 SDTCVecEltisVT<1, f32>, 792 SDTCisSameAs<0, 2>, 793 SDTCVecEltisVT<3, i1>, 794 SDTCisSameNumEltsAs<1, 3>]>>; 795def X86cvtneps2bf16 : SDNode<"X86ISD::CVTNEPS2BF16", 796 SDTypeProfile<1, 1, [SDTCVecEltisVT<0, i16>, 797 SDTCVecEltisVT<1, f32>]>>; 798def X86dpbf16ps : SDNode<"X86ISD::DPBF16PS", 799 SDTypeProfile<1, 3, [SDTCVecEltisVT<0, f32>, 800 SDTCisSameAs<0,1>, 801 SDTCVecEltisVT<2, i32>, 802 SDTCisSameAs<2,3>]>>; 803 804// galois field arithmetic 805def X86GF2P8affineinvqb : SDNode<"X86ISD::GF2P8AFFINEINVQB", SDTBlend>; 806def X86GF2P8affineqb : SDNode<"X86ISD::GF2P8AFFINEQB", SDTBlend>; 807def X86GF2P8mulb : SDNode<"X86ISD::GF2P8MULB", SDTIntBinOp>; 808 809def SDTX86MaskedStore: SDTypeProfile<0, 3, [ // masked store 810 SDTCisVec<0>, SDTCisPtrTy<1>, SDTCisVec<2>, SDTCisSameNumEltsAs<0, 2> 811]>; 812 813//===----------------------------------------------------------------------===// 814// SSE pattern fragments 815//===----------------------------------------------------------------------===// 816 817// 128-bit load pattern fragments 818def loadv8f16 : PatFrag<(ops node:$ptr), (v8f16 (load node:$ptr))>; 819def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>; 820def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>; 821def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>; 822def loadv4i32 : PatFrag<(ops node:$ptr), (v4i32 (load node:$ptr))>; 823def loadv8i16 : PatFrag<(ops node:$ptr), (v8i16 (load node:$ptr))>; 824def loadv16i8 : PatFrag<(ops node:$ptr), (v16i8 (load node:$ptr))>; 825 826// 256-bit load pattern fragments 827def loadv16f16 : PatFrag<(ops node:$ptr), (v16f16 (load node:$ptr))>; 828def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>; 829def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>; 830def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>; 831def loadv8i32 : PatFrag<(ops node:$ptr), (v8i32 (load node:$ptr))>; 832def loadv16i16 : PatFrag<(ops node:$ptr), (v16i16 (load node:$ptr))>; 833def loadv32i8 : PatFrag<(ops node:$ptr), (v32i8 (load node:$ptr))>; 834 835// 512-bit load pattern fragments 836def loadv32f16 : PatFrag<(ops node:$ptr), (v32f16 (load node:$ptr))>; 837def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>; 838def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>; 839def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>; 840def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>; 841def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>; 842def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>; 843 844// 128-/256-/512-bit extload pattern fragments 845def extloadv2f32 : PatFrag<(ops node:$ptr), (extloadvf32 node:$ptr)>; 846def extloadv4f32 : PatFrag<(ops node:$ptr), (extloadvf32 node:$ptr)>; 847def extloadv8f32 : PatFrag<(ops node:$ptr), (extloadvf32 node:$ptr)>; 848def extloadv2f16 : PatFrag<(ops node:$ptr), (extloadvf16 node:$ptr)>; 849def extloadv4f16 : PatFrag<(ops node:$ptr), (extloadvf16 node:$ptr)>; 850def extloadv8f16 : PatFrag<(ops node:$ptr), (extloadvf16 node:$ptr)>; 851def extloadv16f16 : PatFrag<(ops node:$ptr), (extloadvf16 node:$ptr)>; 852 853// Like 'store', but always requires vector size alignment. 854def alignedstore : PatFrag<(ops node:$val, node:$ptr), 855 (store node:$val, node:$ptr), [{ 856 auto *St = cast<StoreSDNode>(N); 857 return St->getAlignment() >= St->getMemoryVT().getStoreSize(); 858}]>; 859 860// Like 'load', but always requires vector size alignment. 861def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{ 862 auto *Ld = cast<LoadSDNode>(N); 863 return Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize(); 864}]>; 865 866// 128-bit aligned load pattern fragments 867// NOTE: all 128-bit integer vector loads are promoted to v2i64 868def alignedloadv8f16 : PatFrag<(ops node:$ptr), 869 (v8f16 (alignedload node:$ptr))>; 870def alignedloadv4f32 : PatFrag<(ops node:$ptr), 871 (v4f32 (alignedload node:$ptr))>; 872def alignedloadv2f64 : PatFrag<(ops node:$ptr), 873 (v2f64 (alignedload node:$ptr))>; 874def alignedloadv2i64 : PatFrag<(ops node:$ptr), 875 (v2i64 (alignedload node:$ptr))>; 876def alignedloadv4i32 : PatFrag<(ops node:$ptr), 877 (v4i32 (alignedload node:$ptr))>; 878def alignedloadv8i16 : PatFrag<(ops node:$ptr), 879 (v8i16 (alignedload node:$ptr))>; 880def alignedloadv16i8 : PatFrag<(ops node:$ptr), 881 (v16i8 (alignedload node:$ptr))>; 882 883// 256-bit aligned load pattern fragments 884// NOTE: all 256-bit integer vector loads are promoted to v4i64 885def alignedloadv16f16 : PatFrag<(ops node:$ptr), 886 (v16f16 (alignedload node:$ptr))>; 887def alignedloadv8f32 : PatFrag<(ops node:$ptr), 888 (v8f32 (alignedload node:$ptr))>; 889def alignedloadv4f64 : PatFrag<(ops node:$ptr), 890 (v4f64 (alignedload node:$ptr))>; 891def alignedloadv4i64 : PatFrag<(ops node:$ptr), 892 (v4i64 (alignedload node:$ptr))>; 893def alignedloadv8i32 : PatFrag<(ops node:$ptr), 894 (v8i32 (alignedload node:$ptr))>; 895def alignedloadv16i16 : PatFrag<(ops node:$ptr), 896 (v16i16 (alignedload node:$ptr))>; 897def alignedloadv32i8 : PatFrag<(ops node:$ptr), 898 (v32i8 (alignedload node:$ptr))>; 899 900// 512-bit aligned load pattern fragments 901def alignedloadv32f16 : PatFrag<(ops node:$ptr), 902 (v32f16 (alignedload node:$ptr))>; 903def alignedloadv16f32 : PatFrag<(ops node:$ptr), 904 (v16f32 (alignedload node:$ptr))>; 905def alignedloadv8f64 : PatFrag<(ops node:$ptr), 906 (v8f64 (alignedload node:$ptr))>; 907def alignedloadv8i64 : PatFrag<(ops node:$ptr), 908 (v8i64 (alignedload node:$ptr))>; 909def alignedloadv16i32 : PatFrag<(ops node:$ptr), 910 (v16i32 (alignedload node:$ptr))>; 911def alignedloadv32i16 : PatFrag<(ops node:$ptr), 912 (v32i16 (alignedload node:$ptr))>; 913def alignedloadv64i8 : PatFrag<(ops node:$ptr), 914 (v64i8 (alignedload node:$ptr))>; 915 916// Like 'load', but uses special alignment checks suitable for use in 917// memory operands in most SSE instructions, which are required to 918// be naturally aligned on some targets but not on others. If the subtarget 919// allows unaligned accesses, match any load, though this may require 920// setting a feature bit in the processor (on startup, for example). 921// Opteron 10h and later implement such a feature. 922def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{ 923 auto *Ld = cast<LoadSDNode>(N); 924 return Subtarget->hasSSEUnalignedMem() || 925 Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize(); 926}]>; 927 928// 128-bit memop pattern fragments 929// NOTE: all 128-bit integer vector loads are promoted to v2i64 930def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>; 931def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>; 932def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>; 933def memopv4i32 : PatFrag<(ops node:$ptr), (v4i32 (memop node:$ptr))>; 934def memopv8i16 : PatFrag<(ops node:$ptr), (v8i16 (memop node:$ptr))>; 935def memopv16i8 : PatFrag<(ops node:$ptr), (v16i8 (memop node:$ptr))>; 936 937// 128-bit bitconvert pattern fragments 938def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>; 939def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>; 940def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>; 941def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>; 942def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>; 943def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>; 944 945// 256-bit bitconvert pattern fragments 946def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>; 947def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>; 948def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>; 949def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>; 950def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>; 951def bc_v4f64 : PatFrag<(ops node:$in), (v4f64 (bitconvert node:$in))>; 952 953// 512-bit bitconvert pattern fragments 954def bc_v64i8 : PatFrag<(ops node:$in), (v64i8 (bitconvert node:$in))>; 955def bc_v32i16 : PatFrag<(ops node:$in), (v32i16 (bitconvert node:$in))>; 956def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>; 957def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>; 958def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>; 959def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>; 960 961def X86vzload16 : PatFrag<(ops node:$src), 962 (X86vzld node:$src), [{ 963 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2; 964}]>; 965 966def X86vzload32 : PatFrag<(ops node:$src), 967 (X86vzld node:$src), [{ 968 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4; 969}]>; 970 971def X86vzload64 : PatFrag<(ops node:$src), 972 (X86vzld node:$src), [{ 973 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8; 974}]>; 975 976def X86vextractstore64 : PatFrag<(ops node:$val, node:$ptr), 977 (X86vextractst node:$val, node:$ptr), [{ 978 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8; 979}]>; 980 981def X86VBroadcastld8 : PatFrag<(ops node:$src), 982 (X86VBroadcastld node:$src), [{ 983 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 1; 984}]>; 985 986def X86VBroadcastld16 : PatFrag<(ops node:$src), 987 (X86VBroadcastld node:$src), [{ 988 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2; 989}]>; 990 991def X86VBroadcastld32 : PatFrag<(ops node:$src), 992 (X86VBroadcastld node:$src), [{ 993 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4; 994}]>; 995 996def X86VBroadcastld64 : PatFrag<(ops node:$src), 997 (X86VBroadcastld node:$src), [{ 998 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8; 999}]>; 1000 1001def X86SubVBroadcastld128 : PatFrag<(ops node:$src), 1002 (X86SubVBroadcastld node:$src), [{ 1003 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 16; 1004}]>; 1005 1006def X86SubVBroadcastld256 : PatFrag<(ops node:$src), 1007 (X86SubVBroadcastld node:$src), [{ 1008 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 32; 1009}]>; 1010 1011// Scalar SSE intrinsic fragments to match several different types of loads. 1012// Used by scalar SSE intrinsic instructions which have 128 bit types, but 1013// only load a single element. 1014// FIXME: We should add more canolicalizing in DAGCombine. Particulary removing 1015// the simple_load case. 1016def sse_load_f16 : PatFrags<(ops node:$ptr), 1017 [(v8f16 (simple_load node:$ptr)), 1018 (v8f16 (X86vzload16 node:$ptr)), 1019 (v8f16 (scalar_to_vector (loadf16 node:$ptr)))]>; 1020def sse_load_f32 : PatFrags<(ops node:$ptr), 1021 [(v4f32 (simple_load node:$ptr)), 1022 (v4f32 (X86vzload32 node:$ptr)), 1023 (v4f32 (scalar_to_vector (loadf32 node:$ptr)))]>; 1024def sse_load_f64 : PatFrags<(ops node:$ptr), 1025 [(v2f64 (simple_load node:$ptr)), 1026 (v2f64 (X86vzload64 node:$ptr)), 1027 (v2f64 (scalar_to_vector (loadf64 node:$ptr)))]>; 1028 1029def shmem : X86MemOperand<"printwordmem", X86Mem16AsmOperand>; 1030def ssmem : X86MemOperand<"printdwordmem", X86Mem32AsmOperand>; 1031def sdmem : X86MemOperand<"printqwordmem", X86Mem64AsmOperand>; 1032 1033def fp16imm0 : PatLeaf<(f16 fpimm), [{ 1034 return N->isExactlyValue(+0.0); 1035}]>; 1036 1037def fp32imm0 : PatLeaf<(f32 fpimm), [{ 1038 return N->isExactlyValue(+0.0); 1039}]>; 1040 1041def fp64imm0 : PatLeaf<(f64 fpimm), [{ 1042 return N->isExactlyValue(+0.0); 1043}]>; 1044 1045def fp128imm0 : PatLeaf<(f128 fpimm), [{ 1046 return N->isExactlyValue(+0.0); 1047}]>; 1048 1049// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index 1050// to VEXTRACTF128/VEXTRACTI128 imm. 1051def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{ 1052 return getExtractVEXTRACTImmediate(N, 128, SDLoc(N)); 1053}]>; 1054 1055// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to 1056// VINSERTF128/VINSERTI128 imm. 1057def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{ 1058 return getInsertVINSERTImmediate(N, 128, SDLoc(N)); 1059}]>; 1060 1061// INSERT_get_vperm2x128_imm xform function: convert insert_subvector index to 1062// commuted VPERM2F128/VPERM2I128 imm. 1063def INSERT_get_vperm2x128_commutedimm : SDNodeXForm<insert_subvector, [{ 1064 return getPermuteVINSERTCommutedImmediate(N, 128, SDLoc(N)); 1065}]>; 1066 1067// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index 1068// to VEXTRACTF64x4 imm. 1069def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{ 1070 return getExtractVEXTRACTImmediate(N, 256, SDLoc(N)); 1071}]>; 1072 1073// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to 1074// VINSERTF64x4 imm. 1075def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{ 1076 return getInsertVINSERTImmediate(N, 256, SDLoc(N)); 1077}]>; 1078 1079def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index), 1080 (extract_subvector node:$bigvec, 1081 node:$index), [{ 1082 // Index 0 can be handled via extract_subreg. 1083 return !isNullConstant(N->getOperand(1)); 1084}], EXTRACT_get_vextract128_imm>; 1085 1086def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec, 1087 node:$index), 1088 (insert_subvector node:$bigvec, node:$smallvec, 1089 node:$index), [{}], 1090 INSERT_get_vinsert128_imm>; 1091 1092def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index), 1093 (extract_subvector node:$bigvec, 1094 node:$index), [{ 1095 // Index 0 can be handled via extract_subreg. 1096 return !isNullConstant(N->getOperand(1)); 1097}], EXTRACT_get_vextract256_imm>; 1098 1099def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec, 1100 node:$index), 1101 (insert_subvector node:$bigvec, node:$smallvec, 1102 node:$index), [{}], 1103 INSERT_get_vinsert256_imm>; 1104 1105def masked_load : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1106 (masked_ld node:$src1, undef, node:$src2, node:$src3), [{ 1107 return !cast<MaskedLoadSDNode>(N)->isExpandingLoad() && 1108 cast<MaskedLoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD && 1109 cast<MaskedLoadSDNode>(N)->isUnindexed(); 1110}]>; 1111 1112def masked_load_aligned : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1113 (masked_load node:$src1, node:$src2, node:$src3), [{ 1114 // Use the node type to determine the size the alignment needs to match. 1115 // We can't use memory VT because type widening changes the node VT, but 1116 // not the memory VT. 1117 auto *Ld = cast<MaskedLoadSDNode>(N); 1118 return Ld->getAlignment() >= Ld->getValueType(0).getStoreSize(); 1119}]>; 1120 1121def X86mExpandingLoad : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1122 (masked_ld node:$src1, undef, node:$src2, node:$src3), [{ 1123 return cast<MaskedLoadSDNode>(N)->isExpandingLoad() && 1124 cast<MaskedLoadSDNode>(N)->isUnindexed(); 1125}]>; 1126 1127// Masked store fragments. 1128// X86mstore can't be implemented in core DAG files because some targets 1129// do not support vector types (llvm-tblgen will fail). 1130def masked_store : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1131 (masked_st node:$src1, node:$src2, undef, node:$src3), [{ 1132 return !cast<MaskedStoreSDNode>(N)->isTruncatingStore() && 1133 !cast<MaskedStoreSDNode>(N)->isCompressingStore() && 1134 cast<MaskedStoreSDNode>(N)->isUnindexed(); 1135}]>; 1136 1137def masked_store_aligned : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1138 (masked_store node:$src1, node:$src2, node:$src3), [{ 1139 // Use the node type to determine the size the alignment needs to match. 1140 // We can't use memory VT because type widening changes the node VT, but 1141 // not the memory VT. 1142 auto *St = cast<MaskedStoreSDNode>(N); 1143 return St->getAlignment() >= St->getOperand(1).getValueType().getStoreSize(); 1144}]>; 1145 1146def X86mCompressingStore : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1147 (masked_st node:$src1, node:$src2, undef, node:$src3), [{ 1148 return cast<MaskedStoreSDNode>(N)->isCompressingStore() && 1149 cast<MaskedStoreSDNode>(N)->isUnindexed(); 1150}]>; 1151 1152// masked truncstore fragments 1153// X86mtruncstore can't be implemented in core DAG files because some targets 1154// doesn't support vector type ( llvm-tblgen will fail) 1155def X86mtruncstore : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1156 (masked_st node:$src1, node:$src2, undef, node:$src3), [{ 1157 return cast<MaskedStoreSDNode>(N)->isTruncatingStore() && 1158 cast<MaskedStoreSDNode>(N)->isUnindexed(); 1159}]>; 1160def masked_truncstorevi8 : 1161 PatFrag<(ops node:$src1, node:$src2, node:$src3), 1162 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{ 1163 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8; 1164}]>; 1165def masked_truncstorevi16 : 1166 PatFrag<(ops node:$src1, node:$src2, node:$src3), 1167 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{ 1168 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16; 1169}]>; 1170def masked_truncstorevi32 : 1171 PatFrag<(ops node:$src1, node:$src2, node:$src3), 1172 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{ 1173 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32; 1174}]>; 1175 1176def X86TruncSStore : SDNode<"X86ISD::VTRUNCSTORES", SDTStore, 1177 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 1178 1179def X86TruncUSStore : SDNode<"X86ISD::VTRUNCSTOREUS", SDTStore, 1180 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 1181 1182def X86MTruncSStore : SDNode<"X86ISD::VMTRUNCSTORES", SDTX86MaskedStore, 1183 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 1184 1185def X86MTruncUSStore : SDNode<"X86ISD::VMTRUNCSTOREUS", SDTX86MaskedStore, 1186 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 1187 1188def truncstore_s_vi8 : PatFrag<(ops node:$val, node:$ptr), 1189 (X86TruncSStore node:$val, node:$ptr), [{ 1190 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8; 1191}]>; 1192 1193def truncstore_us_vi8 : PatFrag<(ops node:$val, node:$ptr), 1194 (X86TruncUSStore node:$val, node:$ptr), [{ 1195 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8; 1196}]>; 1197 1198def truncstore_s_vi16 : PatFrag<(ops node:$val, node:$ptr), 1199 (X86TruncSStore node:$val, node:$ptr), [{ 1200 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16; 1201}]>; 1202 1203def truncstore_us_vi16 : PatFrag<(ops node:$val, node:$ptr), 1204 (X86TruncUSStore node:$val, node:$ptr), [{ 1205 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16; 1206}]>; 1207 1208def truncstore_s_vi32 : PatFrag<(ops node:$val, node:$ptr), 1209 (X86TruncSStore node:$val, node:$ptr), [{ 1210 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32; 1211}]>; 1212 1213def truncstore_us_vi32 : PatFrag<(ops node:$val, node:$ptr), 1214 (X86TruncUSStore node:$val, node:$ptr), [{ 1215 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32; 1216}]>; 1217 1218def masked_truncstore_s_vi8 : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1219 (X86MTruncSStore node:$src1, node:$src2, node:$src3), [{ 1220 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8; 1221}]>; 1222 1223def masked_truncstore_us_vi8 : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1224 (X86MTruncUSStore node:$src1, node:$src2, node:$src3), [{ 1225 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8; 1226}]>; 1227 1228def masked_truncstore_s_vi16 : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1229 (X86MTruncSStore node:$src1, node:$src2, node:$src3), [{ 1230 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16; 1231}]>; 1232 1233def masked_truncstore_us_vi16 : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1234 (X86MTruncUSStore node:$src1, node:$src2, node:$src3), [{ 1235 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16; 1236}]>; 1237 1238def masked_truncstore_s_vi32 : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1239 (X86MTruncSStore node:$src1, node:$src2, node:$src3), [{ 1240 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32; 1241}]>; 1242 1243def masked_truncstore_us_vi32 : PatFrag<(ops node:$src1, node:$src2, node:$src3), 1244 (X86MTruncUSStore node:$src1, node:$src2, node:$src3), [{ 1245 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32; 1246}]>; 1247