1 //===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to X86 machine code. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "X86AsmPrinter.h" 15 #include "MCTargetDesc/X86ATTInstPrinter.h" 16 #include "MCTargetDesc/X86BaseInfo.h" 17 #include "MCTargetDesc/X86TargetStreamer.h" 18 #include "TargetInfo/X86TargetInfo.h" 19 #include "X86InstrInfo.h" 20 #include "X86MachineFunctionInfo.h" 21 #include "X86Subtarget.h" 22 #include "llvm/BinaryFormat/COFF.h" 23 #include "llvm/BinaryFormat/ELF.h" 24 #include "llvm/CodeGen/MachineConstantPool.h" 25 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 26 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 27 #include "llvm/IR/DerivedTypes.h" 28 #include "llvm/IR/InlineAsm.h" 29 #include "llvm/IR/Mangler.h" 30 #include "llvm/IR/Module.h" 31 #include "llvm/IR/Type.h" 32 #include "llvm/MC/MCAsmInfo.h" 33 #include "llvm/MC/MCCodeEmitter.h" 34 #include "llvm/MC/MCContext.h" 35 #include "llvm/MC/MCExpr.h" 36 #include "llvm/MC/MCSectionCOFF.h" 37 #include "llvm/MC/MCSectionELF.h" 38 #include "llvm/MC/MCSectionMachO.h" 39 #include "llvm/MC/MCStreamer.h" 40 #include "llvm/MC/MCSymbol.h" 41 #include "llvm/MC/TargetRegistry.h" 42 #include "llvm/Support/Debug.h" 43 #include "llvm/Support/ErrorHandling.h" 44 #include "llvm/Support/MachineValueType.h" 45 #include "llvm/Target/TargetMachine.h" 46 47 using namespace llvm; 48 49 X86AsmPrinter::X86AsmPrinter(TargetMachine &TM, 50 std::unique_ptr<MCStreamer> Streamer) 51 : AsmPrinter(TM, std::move(Streamer)), SM(*this), FM(*this) {} 52 53 //===----------------------------------------------------------------------===// 54 // Primitive Helper Functions. 55 //===----------------------------------------------------------------------===// 56 57 /// runOnMachineFunction - Emit the function body. 58 /// 59 bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) { 60 Subtarget = &MF.getSubtarget<X86Subtarget>(); 61 62 SMShadowTracker.startFunction(MF); 63 CodeEmitter.reset(TM.getTarget().createMCCodeEmitter( 64 *Subtarget->getInstrInfo(), MF.getContext())); 65 66 EmitFPOData = 67 Subtarget->isTargetWin32() && MF.getMMI().getModule()->getCodeViewFlag(); 68 69 SetupMachineFunction(MF); 70 71 if (Subtarget->isTargetCOFF()) { 72 bool Local = MF.getFunction().hasLocalLinkage(); 73 OutStreamer->beginCOFFSymbolDef(CurrentFnSym); 74 OutStreamer->emitCOFFSymbolStorageClass( 75 Local ? COFF::IMAGE_SYM_CLASS_STATIC : COFF::IMAGE_SYM_CLASS_EXTERNAL); 76 OutStreamer->emitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION 77 << COFF::SCT_COMPLEX_TYPE_SHIFT); 78 OutStreamer->endCOFFSymbolDef(); 79 } 80 81 // Emit the rest of the function body. 82 emitFunctionBody(); 83 84 // Emit the XRay table for this function. 85 emitXRayTable(); 86 87 EmitFPOData = false; 88 89 // We didn't modify anything. 90 return false; 91 } 92 93 void X86AsmPrinter::emitFunctionBodyStart() { 94 if (EmitFPOData) { 95 if (auto *XTS = 96 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer())) 97 XTS->emitFPOProc( 98 CurrentFnSym, 99 MF->getInfo<X86MachineFunctionInfo>()->getArgumentStackSize()); 100 } 101 } 102 103 void X86AsmPrinter::emitFunctionBodyEnd() { 104 if (EmitFPOData) { 105 if (auto *XTS = 106 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer())) 107 XTS->emitFPOEndProc(); 108 } 109 } 110 111 /// PrintSymbolOperand - Print a raw symbol reference operand. This handles 112 /// jump tables, constant pools, global address and external symbols, all of 113 /// which print to a label with various suffixes for relocation types etc. 114 void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 115 raw_ostream &O) { 116 switch (MO.getType()) { 117 default: llvm_unreachable("unknown symbol type!"); 118 case MachineOperand::MO_ConstantPoolIndex: 119 GetCPISymbol(MO.getIndex())->print(O, MAI); 120 printOffset(MO.getOffset(), O); 121 break; 122 case MachineOperand::MO_GlobalAddress: { 123 const GlobalValue *GV = MO.getGlobal(); 124 125 MCSymbol *GVSym; 126 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY || 127 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) 128 GVSym = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 129 else 130 GVSym = getSymbolPreferLocal(*GV); 131 132 // Handle dllimport linkage. 133 if (MO.getTargetFlags() == X86II::MO_DLLIMPORT) 134 GVSym = OutContext.getOrCreateSymbol(Twine("__imp_") + GVSym->getName()); 135 else if (MO.getTargetFlags() == X86II::MO_COFFSTUB) 136 GVSym = 137 OutContext.getOrCreateSymbol(Twine(".refptr.") + GVSym->getName()); 138 139 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY || 140 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) { 141 MCSymbol *Sym = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 142 MachineModuleInfoImpl::StubValueTy &StubSym = 143 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym); 144 if (!StubSym.getPointer()) 145 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 146 !GV->hasInternalLinkage()); 147 } 148 149 // If the name begins with a dollar-sign, enclose it in parens. We do this 150 // to avoid having it look like an integer immediate to the assembler. 151 if (GVSym->getName()[0] != '$') 152 GVSym->print(O, MAI); 153 else { 154 O << '('; 155 GVSym->print(O, MAI); 156 O << ')'; 157 } 158 printOffset(MO.getOffset(), O); 159 break; 160 } 161 } 162 163 switch (MO.getTargetFlags()) { 164 default: 165 llvm_unreachable("Unknown target flag on GV operand"); 166 case X86II::MO_NO_FLAG: // No flag. 167 break; 168 case X86II::MO_DARWIN_NONLAZY: 169 case X86II::MO_DLLIMPORT: 170 case X86II::MO_COFFSTUB: 171 // These affect the name of the symbol, not any suffix. 172 break; 173 case X86II::MO_GOT_ABSOLUTE_ADDRESS: 174 O << " + [.-"; 175 MF->getPICBaseSymbol()->print(O, MAI); 176 O << ']'; 177 break; 178 case X86II::MO_PIC_BASE_OFFSET: 179 case X86II::MO_DARWIN_NONLAZY_PIC_BASE: 180 O << '-'; 181 MF->getPICBaseSymbol()->print(O, MAI); 182 break; 183 case X86II::MO_TLSGD: O << "@TLSGD"; break; 184 case X86II::MO_TLSLD: O << "@TLSLD"; break; 185 case X86II::MO_TLSLDM: O << "@TLSLDM"; break; 186 case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; 187 case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; 188 case X86II::MO_TPOFF: O << "@TPOFF"; break; 189 case X86II::MO_DTPOFF: O << "@DTPOFF"; break; 190 case X86II::MO_NTPOFF: O << "@NTPOFF"; break; 191 case X86II::MO_GOTNTPOFF: O << "@GOTNTPOFF"; break; 192 case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break; 193 case X86II::MO_GOTPCREL_NORELAX: O << "@GOTPCREL_NORELAX"; break; 194 case X86II::MO_GOT: O << "@GOT"; break; 195 case X86II::MO_GOTOFF: O << "@GOTOFF"; break; 196 case X86II::MO_PLT: O << "@PLT"; break; 197 case X86II::MO_TLVP: O << "@TLVP"; break; 198 case X86II::MO_TLVP_PIC_BASE: 199 O << "@TLVP" << '-'; 200 MF->getPICBaseSymbol()->print(O, MAI); 201 break; 202 case X86II::MO_SECREL: O << "@SECREL32"; break; 203 } 204 } 205 206 void X86AsmPrinter::PrintOperand(const MachineInstr *MI, unsigned OpNo, 207 raw_ostream &O) { 208 const MachineOperand &MO = MI->getOperand(OpNo); 209 const bool IsATT = MI->getInlineAsmDialect() == InlineAsm::AD_ATT; 210 switch (MO.getType()) { 211 default: llvm_unreachable("unknown operand type!"); 212 case MachineOperand::MO_Register: { 213 if (IsATT) 214 O << '%'; 215 O << X86ATTInstPrinter::getRegisterName(MO.getReg()); 216 return; 217 } 218 219 case MachineOperand::MO_Immediate: 220 if (IsATT) 221 O << '$'; 222 O << MO.getImm(); 223 return; 224 225 case MachineOperand::MO_ConstantPoolIndex: 226 case MachineOperand::MO_GlobalAddress: { 227 switch (MI->getInlineAsmDialect()) { 228 case InlineAsm::AD_ATT: 229 O << '$'; 230 break; 231 case InlineAsm::AD_Intel: 232 O << "offset "; 233 break; 234 } 235 PrintSymbolOperand(MO, O); 236 break; 237 } 238 case MachineOperand::MO_BlockAddress: { 239 MCSymbol *Sym = GetBlockAddressSymbol(MO.getBlockAddress()); 240 Sym->print(O, MAI); 241 break; 242 } 243 } 244 } 245 246 /// PrintModifiedOperand - Print subregisters based on supplied modifier, 247 /// deferring to PrintOperand() if no modifier was supplied or if operand is not 248 /// a register. 249 void X86AsmPrinter::PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo, 250 raw_ostream &O, const char *Modifier) { 251 const MachineOperand &MO = MI->getOperand(OpNo); 252 if (!Modifier || !MO.isReg()) 253 return PrintOperand(MI, OpNo, O); 254 if (MI->getInlineAsmDialect() == InlineAsm::AD_ATT) 255 O << '%'; 256 Register Reg = MO.getReg(); 257 if (strncmp(Modifier, "subreg", strlen("subreg")) == 0) { 258 unsigned Size = (strcmp(Modifier+6,"64") == 0) ? 64 : 259 (strcmp(Modifier+6,"32") == 0) ? 32 : 260 (strcmp(Modifier+6,"16") == 0) ? 16 : 8; 261 Reg = getX86SubSuperRegister(Reg, Size); 262 } 263 O << X86ATTInstPrinter::getRegisterName(Reg); 264 } 265 266 /// PrintPCRelImm - This is used to print an immediate value that ends up 267 /// being encoded as a pc-relative value. These print slightly differently, for 268 /// example, a $ is not emitted. 269 void X86AsmPrinter::PrintPCRelImm(const MachineInstr *MI, unsigned OpNo, 270 raw_ostream &O) { 271 const MachineOperand &MO = MI->getOperand(OpNo); 272 switch (MO.getType()) { 273 default: llvm_unreachable("Unknown pcrel immediate operand"); 274 case MachineOperand::MO_Register: 275 // pc-relativeness was handled when computing the value in the reg. 276 PrintOperand(MI, OpNo, O); 277 return; 278 case MachineOperand::MO_Immediate: 279 O << MO.getImm(); 280 return; 281 case MachineOperand::MO_GlobalAddress: 282 PrintSymbolOperand(MO, O); 283 return; 284 } 285 } 286 287 void X86AsmPrinter::PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo, 288 raw_ostream &O, const char *Modifier) { 289 const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg); 290 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); 291 const MachineOperand &DispSpec = MI->getOperand(OpNo + X86::AddrDisp); 292 293 // If we really don't want to print out (rip), don't. 294 bool HasBaseReg = BaseReg.getReg() != 0; 295 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") && 296 BaseReg.getReg() == X86::RIP) 297 HasBaseReg = false; 298 299 // HasParenPart - True if we will print out the () part of the mem ref. 300 bool HasParenPart = IndexReg.getReg() || HasBaseReg; 301 302 switch (DispSpec.getType()) { 303 default: 304 llvm_unreachable("unknown operand type!"); 305 case MachineOperand::MO_Immediate: { 306 int DispVal = DispSpec.getImm(); 307 if (DispVal || !HasParenPart) 308 O << DispVal; 309 break; 310 } 311 case MachineOperand::MO_GlobalAddress: 312 case MachineOperand::MO_ConstantPoolIndex: 313 PrintSymbolOperand(DispSpec, O); 314 break; 315 } 316 317 if (Modifier && strcmp(Modifier, "H") == 0) 318 O << "+8"; 319 320 if (HasParenPart) { 321 assert(IndexReg.getReg() != X86::ESP && 322 "X86 doesn't allow scaling by ESP"); 323 324 O << '('; 325 if (HasBaseReg) 326 PrintModifiedOperand(MI, OpNo + X86::AddrBaseReg, O, Modifier); 327 328 if (IndexReg.getReg()) { 329 O << ','; 330 PrintModifiedOperand(MI, OpNo + X86::AddrIndexReg, O, Modifier); 331 unsigned ScaleVal = MI->getOperand(OpNo + X86::AddrScaleAmt).getImm(); 332 if (ScaleVal != 1) 333 O << ',' << ScaleVal; 334 } 335 O << ')'; 336 } 337 } 338 339 static bool isSimpleReturn(const MachineInstr &MI) { 340 // We exclude all tail calls here which set both isReturn and isCall. 341 return MI.getDesc().isReturn() && !MI.getDesc().isCall(); 342 } 343 344 static bool isIndirectBranchOrTailCall(const MachineInstr &MI) { 345 unsigned Opc = MI.getOpcode(); 346 return MI.getDesc().isIndirectBranch() /*Make below code in a good shape*/ || 347 Opc == X86::TAILJMPr || Opc == X86::TAILJMPm || 348 Opc == X86::TAILJMPr64 || Opc == X86::TAILJMPm64 || 349 Opc == X86::TCRETURNri || Opc == X86::TCRETURNmi || 350 Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNmi64 || 351 Opc == X86::TAILJMPr64_REX || Opc == X86::TAILJMPm64_REX; 352 } 353 354 void X86AsmPrinter::emitBasicBlockEnd(const MachineBasicBlock &MBB) { 355 if (Subtarget->hardenSlsRet() || Subtarget->hardenSlsIJmp()) { 356 auto I = MBB.getLastNonDebugInstr(); 357 if (I != MBB.end()) { 358 if ((Subtarget->hardenSlsRet() && isSimpleReturn(*I)) || 359 (Subtarget->hardenSlsIJmp() && isIndirectBranchOrTailCall(*I))) { 360 MCInst TmpInst; 361 TmpInst.setOpcode(X86::INT3); 362 EmitToStreamer(*OutStreamer, TmpInst); 363 } 364 } 365 } 366 AsmPrinter::emitBasicBlockEnd(MBB); 367 SMShadowTracker.emitShadowPadding(*OutStreamer, getSubtargetInfo()); 368 } 369 370 void X86AsmPrinter::PrintMemReference(const MachineInstr *MI, unsigned OpNo, 371 raw_ostream &O, const char *Modifier) { 372 assert(isMem(*MI, OpNo) && "Invalid memory reference!"); 373 const MachineOperand &Segment = MI->getOperand(OpNo + X86::AddrSegmentReg); 374 if (Segment.getReg()) { 375 PrintModifiedOperand(MI, OpNo + X86::AddrSegmentReg, O, Modifier); 376 O << ':'; 377 } 378 PrintLeaMemReference(MI, OpNo, O, Modifier); 379 } 380 381 382 void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI, 383 unsigned OpNo, raw_ostream &O, 384 const char *Modifier) { 385 const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg); 386 unsigned ScaleVal = MI->getOperand(OpNo + X86::AddrScaleAmt).getImm(); 387 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); 388 const MachineOperand &DispSpec = MI->getOperand(OpNo + X86::AddrDisp); 389 const MachineOperand &SegReg = MI->getOperand(OpNo + X86::AddrSegmentReg); 390 391 // If we really don't want to print out (rip), don't. 392 bool HasBaseReg = BaseReg.getReg() != 0; 393 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") && 394 BaseReg.getReg() == X86::RIP) 395 HasBaseReg = false; 396 397 // If we really just want to print out displacement. 398 if (Modifier && (DispSpec.isGlobal() || DispSpec.isSymbol()) && 399 !strcmp(Modifier, "disp-only")) { 400 HasBaseReg = false; 401 } 402 403 // If this has a segment register, print it. 404 if (SegReg.getReg()) { 405 PrintOperand(MI, OpNo + X86::AddrSegmentReg, O); 406 O << ':'; 407 } 408 409 O << '['; 410 411 bool NeedPlus = false; 412 if (HasBaseReg) { 413 PrintOperand(MI, OpNo + X86::AddrBaseReg, O); 414 NeedPlus = true; 415 } 416 417 if (IndexReg.getReg()) { 418 if (NeedPlus) O << " + "; 419 if (ScaleVal != 1) 420 O << ScaleVal << '*'; 421 PrintOperand(MI, OpNo + X86::AddrIndexReg, O); 422 NeedPlus = true; 423 } 424 425 if (!DispSpec.isImm()) { 426 if (NeedPlus) O << " + "; 427 PrintOperand(MI, OpNo + X86::AddrDisp, O); 428 } else { 429 int64_t DispVal = DispSpec.getImm(); 430 if (DispVal || (!IndexReg.getReg() && !HasBaseReg)) { 431 if (NeedPlus) { 432 if (DispVal > 0) 433 O << " + "; 434 else { 435 O << " - "; 436 DispVal = -DispVal; 437 } 438 } 439 O << DispVal; 440 } 441 } 442 O << ']'; 443 } 444 445 static bool printAsmMRegister(const X86AsmPrinter &P, const MachineOperand &MO, 446 char Mode, raw_ostream &O) { 447 Register Reg = MO.getReg(); 448 bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT; 449 450 if (!X86::GR8RegClass.contains(Reg) && 451 !X86::GR16RegClass.contains(Reg) && 452 !X86::GR32RegClass.contains(Reg) && 453 !X86::GR64RegClass.contains(Reg)) 454 return true; 455 456 switch (Mode) { 457 default: return true; // Unknown mode. 458 case 'b': // Print QImode register 459 Reg = getX86SubSuperRegister(Reg, 8); 460 break; 461 case 'h': // Print QImode high register 462 Reg = getX86SubSuperRegister(Reg, 8, true); 463 break; 464 case 'w': // Print HImode register 465 Reg = getX86SubSuperRegister(Reg, 16); 466 break; 467 case 'k': // Print SImode register 468 Reg = getX86SubSuperRegister(Reg, 32); 469 break; 470 case 'V': 471 EmitPercent = false; 472 LLVM_FALLTHROUGH; 473 case 'q': 474 // Print 64-bit register names if 64-bit integer registers are available. 475 // Otherwise, print 32-bit register names. 476 Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32); 477 break; 478 } 479 480 if (EmitPercent) 481 O << '%'; 482 483 O << X86ATTInstPrinter::getRegisterName(Reg); 484 return false; 485 } 486 487 static bool printAsmVRegister(const MachineOperand &MO, char Mode, 488 raw_ostream &O) { 489 Register Reg = MO.getReg(); 490 bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT; 491 492 unsigned Index; 493 if (X86::VR128XRegClass.contains(Reg)) 494 Index = Reg - X86::XMM0; 495 else if (X86::VR256XRegClass.contains(Reg)) 496 Index = Reg - X86::YMM0; 497 else if (X86::VR512RegClass.contains(Reg)) 498 Index = Reg - X86::ZMM0; 499 else 500 return true; 501 502 switch (Mode) { 503 default: // Unknown mode. 504 return true; 505 case 'x': // Print V4SFmode register 506 Reg = X86::XMM0 + Index; 507 break; 508 case 't': // Print V8SFmode register 509 Reg = X86::YMM0 + Index; 510 break; 511 case 'g': // Print V16SFmode register 512 Reg = X86::ZMM0 + Index; 513 break; 514 } 515 516 if (EmitPercent) 517 O << '%'; 518 519 O << X86ATTInstPrinter::getRegisterName(Reg); 520 return false; 521 } 522 523 /// PrintAsmOperand - Print out an operand for an inline asm expression. 524 /// 525 bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 526 const char *ExtraCode, raw_ostream &O) { 527 // Does this asm operand have a single letter operand modifier? 528 if (ExtraCode && ExtraCode[0]) { 529 if (ExtraCode[1] != 0) return true; // Unknown modifier. 530 531 const MachineOperand &MO = MI->getOperand(OpNo); 532 533 switch (ExtraCode[0]) { 534 default: 535 // See if this is a generic print operand 536 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 537 case 'a': // This is an address. Currently only 'i' and 'r' are expected. 538 switch (MO.getType()) { 539 default: 540 return true; 541 case MachineOperand::MO_Immediate: 542 O << MO.getImm(); 543 return false; 544 case MachineOperand::MO_ConstantPoolIndex: 545 case MachineOperand::MO_JumpTableIndex: 546 case MachineOperand::MO_ExternalSymbol: 547 llvm_unreachable("unexpected operand type!"); 548 case MachineOperand::MO_GlobalAddress: 549 PrintSymbolOperand(MO, O); 550 if (Subtarget->isPICStyleRIPRel()) 551 O << "(%rip)"; 552 return false; 553 case MachineOperand::MO_Register: 554 O << '('; 555 PrintOperand(MI, OpNo, O); 556 O << ')'; 557 return false; 558 } 559 560 case 'c': // Don't print "$" before a global var name or constant. 561 switch (MO.getType()) { 562 default: 563 PrintOperand(MI, OpNo, O); 564 break; 565 case MachineOperand::MO_Immediate: 566 O << MO.getImm(); 567 break; 568 case MachineOperand::MO_ConstantPoolIndex: 569 case MachineOperand::MO_JumpTableIndex: 570 case MachineOperand::MO_ExternalSymbol: 571 llvm_unreachable("unexpected operand type!"); 572 case MachineOperand::MO_GlobalAddress: 573 PrintSymbolOperand(MO, O); 574 break; 575 } 576 return false; 577 578 case 'A': // Print '*' before a register (it must be a register) 579 if (MO.isReg()) { 580 O << '*'; 581 PrintOperand(MI, OpNo, O); 582 return false; 583 } 584 return true; 585 586 case 'b': // Print QImode register 587 case 'h': // Print QImode high register 588 case 'w': // Print HImode register 589 case 'k': // Print SImode register 590 case 'q': // Print DImode register 591 case 'V': // Print native register without '%' 592 if (MO.isReg()) 593 return printAsmMRegister(*this, MO, ExtraCode[0], O); 594 PrintOperand(MI, OpNo, O); 595 return false; 596 597 case 'x': // Print V4SFmode register 598 case 't': // Print V8SFmode register 599 case 'g': // Print V16SFmode register 600 if (MO.isReg()) 601 return printAsmVRegister(MO, ExtraCode[0], O); 602 PrintOperand(MI, OpNo, O); 603 return false; 604 605 case 'P': // This is the operand of a call, treat specially. 606 PrintPCRelImm(MI, OpNo, O); 607 return false; 608 609 case 'n': // Negate the immediate or print a '-' before the operand. 610 // Note: this is a temporary solution. It should be handled target 611 // independently as part of the 'MC' work. 612 if (MO.isImm()) { 613 O << -MO.getImm(); 614 return false; 615 } 616 O << '-'; 617 } 618 } 619 620 PrintOperand(MI, OpNo, O); 621 return false; 622 } 623 624 bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 625 const char *ExtraCode, 626 raw_ostream &O) { 627 if (ExtraCode && ExtraCode[0]) { 628 if (ExtraCode[1] != 0) return true; // Unknown modifier. 629 630 switch (ExtraCode[0]) { 631 default: return true; // Unknown modifier. 632 case 'b': // Print QImode register 633 case 'h': // Print QImode high register 634 case 'w': // Print HImode register 635 case 'k': // Print SImode register 636 case 'q': // Print SImode register 637 // These only apply to registers, ignore on mem. 638 break; 639 case 'H': 640 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) { 641 return true; // Unsupported modifier in Intel inline assembly. 642 } else { 643 PrintMemReference(MI, OpNo, O, "H"); 644 } 645 return false; 646 // Print memory only with displacement. The Modifer 'P' is used in inline 647 // asm to present a call symbol or a global symbol which can not use base 648 // reg or index reg. 649 case 'P': 650 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) { 651 PrintIntelMemReference(MI, OpNo, O, "disp-only"); 652 } else { 653 PrintMemReference(MI, OpNo, O, "disp-only"); 654 } 655 return false; 656 } 657 } 658 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) { 659 PrintIntelMemReference(MI, OpNo, O, nullptr); 660 } else { 661 PrintMemReference(MI, OpNo, O, nullptr); 662 } 663 return false; 664 } 665 666 void X86AsmPrinter::emitStartOfAsmFile(Module &M) { 667 const Triple &TT = TM.getTargetTriple(); 668 669 if (TT.isOSBinFormatELF()) { 670 // Assemble feature flags that may require creation of a note section. 671 unsigned FeatureFlagsAnd = 0; 672 if (M.getModuleFlag("cf-protection-branch")) 673 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_IBT; 674 if (M.getModuleFlag("cf-protection-return")) 675 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_SHSTK; 676 677 if (FeatureFlagsAnd) { 678 // Emit a .note.gnu.property section with the flags. 679 if (!TT.isArch32Bit() && !TT.isArch64Bit()) 680 llvm_unreachable("CFProtection used on invalid architecture!"); 681 MCSection *Cur = OutStreamer->getCurrentSectionOnly(); 682 MCSection *Nt = MMI->getContext().getELFSection( 683 ".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC); 684 OutStreamer->switchSection(Nt); 685 686 // Emitting note header. 687 const int WordSize = TT.isArch64Bit() && !TT.isX32() ? 8 : 4; 688 emitAlignment(WordSize == 4 ? Align(4) : Align(8)); 689 OutStreamer->emitIntValue(4, 4 /*size*/); // data size for "GNU\0" 690 OutStreamer->emitIntValue(8 + WordSize, 4 /*size*/); // Elf_Prop size 691 OutStreamer->emitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4 /*size*/); 692 OutStreamer->emitBytes(StringRef("GNU", 4)); // note name 693 694 // Emitting an Elf_Prop for the CET properties. 695 OutStreamer->emitInt32(ELF::GNU_PROPERTY_X86_FEATURE_1_AND); 696 OutStreamer->emitInt32(4); // data size 697 OutStreamer->emitInt32(FeatureFlagsAnd); // data 698 emitAlignment(WordSize == 4 ? Align(4) : Align(8)); // padding 699 700 OutStreamer->endSection(Nt); 701 OutStreamer->switchSection(Cur); 702 } 703 } 704 705 if (TT.isOSBinFormatMachO()) 706 OutStreamer->switchSection(getObjFileLowering().getTextSection()); 707 708 if (TT.isOSBinFormatCOFF()) { 709 // Emit an absolute @feat.00 symbol. This appears to be some kind of 710 // compiler features bitfield read by link.exe. 711 MCSymbol *S = MMI->getContext().getOrCreateSymbol(StringRef("@feat.00")); 712 OutStreamer->beginCOFFSymbolDef(S); 713 OutStreamer->emitCOFFSymbolStorageClass(COFF::IMAGE_SYM_CLASS_STATIC); 714 OutStreamer->emitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_NULL); 715 OutStreamer->endCOFFSymbolDef(); 716 int64_t Feat00Flags = 0; 717 718 if (TT.getArch() == Triple::x86) { 719 // According to the PE-COFF spec, the LSB of this value marks the object 720 // for "registered SEH". This means that all SEH handler entry points 721 // must be registered in .sxdata. Use of any unregistered handlers will 722 // cause the process to terminate immediately. LLVM does not know how to 723 // register any SEH handlers, so its object files should be safe. 724 Feat00Flags |= 1; 725 } 726 727 if (M.getModuleFlag("cfguard")) { 728 Feat00Flags |= 0x800; // Object is CFG-aware. 729 } 730 731 if (M.getModuleFlag("ehcontguard")) { 732 Feat00Flags |= 0x4000; // Object also has EHCont. 733 } 734 735 OutStreamer->emitSymbolAttribute(S, MCSA_Global); 736 OutStreamer->emitAssignment( 737 S, MCConstantExpr::create(Feat00Flags, MMI->getContext())); 738 } 739 OutStreamer->emitSyntaxDirective(); 740 741 // If this is not inline asm and we're in 16-bit 742 // mode prefix assembly with .code16. 743 bool is16 = TT.getEnvironment() == Triple::CODE16; 744 if (M.getModuleInlineAsm().empty() && is16) 745 OutStreamer->emitAssemblerFlag(MCAF_Code16); 746 } 747 748 static void 749 emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel, 750 MachineModuleInfoImpl::StubValueTy &MCSym) { 751 // L_foo$stub: 752 OutStreamer.emitLabel(StubLabel); 753 // .indirect_symbol _foo 754 OutStreamer.emitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol); 755 756 if (MCSym.getInt()) 757 // External to current translation unit. 758 OutStreamer.emitIntValue(0, 4/*size*/); 759 else 760 // Internal to current translation unit. 761 // 762 // When we place the LSDA into the TEXT section, the type info 763 // pointers need to be indirect and pc-rel. We accomplish this by 764 // using NLPs; however, sometimes the types are local to the file. 765 // We need to fill in the value for the NLP in those cases. 766 OutStreamer.emitValue( 767 MCSymbolRefExpr::create(MCSym.getPointer(), OutStreamer.getContext()), 768 4 /*size*/); 769 } 770 771 static void emitNonLazyStubs(MachineModuleInfo *MMI, MCStreamer &OutStreamer) { 772 773 MachineModuleInfoMachO &MMIMacho = 774 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 775 776 // Output stubs for dynamically-linked functions. 777 MachineModuleInfoMachO::SymbolListTy Stubs; 778 779 // Output stubs for external and common global variables. 780 Stubs = MMIMacho.GetGVStubList(); 781 if (!Stubs.empty()) { 782 OutStreamer.switchSection(MMI->getContext().getMachOSection( 783 "__IMPORT", "__pointers", MachO::S_NON_LAZY_SYMBOL_POINTERS, 784 SectionKind::getMetadata())); 785 786 for (auto &Stub : Stubs) 787 emitNonLazySymbolPointer(OutStreamer, Stub.first, Stub.second); 788 789 Stubs.clear(); 790 OutStreamer.addBlankLine(); 791 } 792 } 793 794 void X86AsmPrinter::emitEndOfAsmFile(Module &M) { 795 const Triple &TT = TM.getTargetTriple(); 796 797 if (TT.isOSBinFormatMachO()) { 798 // Mach-O uses non-lazy symbol stubs to encode per-TU information into 799 // global table for symbol lookup. 800 emitNonLazyStubs(MMI, *OutStreamer); 801 802 // Emit stack and fault map information. 803 emitStackMaps(SM); 804 FM.serializeToFaultMapSection(); 805 806 // This flag tells the linker that no global symbols contain code that fall 807 // through to other global symbols (e.g. an implementation of multiple entry 808 // points). If this doesn't occur, the linker can safely perform dead code 809 // stripping. Since LLVM never generates code that does this, it is always 810 // safe to set. 811 OutStreamer->emitAssemblerFlag(MCAF_SubsectionsViaSymbols); 812 } else if (TT.isOSBinFormatCOFF()) { 813 if (MMI->usesMSVCFloatingPoint()) { 814 // In Windows' libcmt.lib, there is a file which is linked in only if the 815 // symbol _fltused is referenced. Linking this in causes some 816 // side-effects: 817 // 818 // 1. For x86-32, it will set the x87 rounding mode to 53-bit instead of 819 // 64-bit mantissas at program start. 820 // 821 // 2. It links in support routines for floating-point in scanf and printf. 822 // 823 // MSVC emits an undefined reference to _fltused when there are any 824 // floating point operations in the program (including calls). A program 825 // that only has: `scanf("%f", &global_float);` may fail to trigger this, 826 // but oh well...that's a documented issue. 827 StringRef SymbolName = 828 (TT.getArch() == Triple::x86) ? "__fltused" : "_fltused"; 829 MCSymbol *S = MMI->getContext().getOrCreateSymbol(SymbolName); 830 OutStreamer->emitSymbolAttribute(S, MCSA_Global); 831 return; 832 } 833 emitStackMaps(SM); 834 } else if (TT.isOSBinFormatELF()) { 835 emitStackMaps(SM); 836 FM.serializeToFaultMapSection(); 837 } 838 839 // Emit __morestack address if needed for indirect calls. 840 if (TT.getArch() == Triple::x86_64 && TM.getCodeModel() == CodeModel::Large) { 841 if (MCSymbol *AddrSymbol = OutContext.lookupSymbol("__morestack_addr")) { 842 Align Alignment(1); 843 MCSection *ReadOnlySection = getObjFileLowering().getSectionForConstant( 844 getDataLayout(), SectionKind::getReadOnly(), 845 /*C=*/nullptr, Alignment); 846 OutStreamer->switchSection(ReadOnlySection); 847 OutStreamer->emitLabel(AddrSymbol); 848 849 unsigned PtrSize = MAI->getCodePointerSize(); 850 OutStreamer->emitSymbolValue(GetExternalSymbolSymbol("__morestack"), 851 PtrSize); 852 } 853 } 854 } 855 856 //===----------------------------------------------------------------------===// 857 // Target Registry Stuff 858 //===----------------------------------------------------------------------===// 859 860 // Force static initialization. 861 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86AsmPrinter() { 862 RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target()); 863 RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target()); 864 } 865