1 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the entry points for global functions defined in the x86 10 // target library, as used by the LLVM JIT. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_X86_X86_H 15 #define LLVM_LIB_TARGET_X86_X86_H 16 17 #include "llvm/Support/CodeGen.h" 18 19 namespace llvm { 20 21 class FunctionPass; 22 class ImmutablePass; 23 class InstructionSelector; 24 class ModulePass; 25 class PassRegistry; 26 class X86RegisterBankInfo; 27 class X86Subtarget; 28 class X86TargetMachine; 29 30 /// This pass converts a legalized DAG into a X86-specific DAG, ready for 31 /// instruction scheduling. 32 FunctionPass *createX86ISelDag(X86TargetMachine &TM, 33 CodeGenOpt::Level OptLevel); 34 35 /// This pass initializes a global base register for PIC on x86-32. 36 FunctionPass *createX86GlobalBaseRegPass(); 37 38 /// This pass combines multiple accesses to local-dynamic TLS variables so that 39 /// the TLS base address for the module is only fetched once per execution path 40 /// through the function. 41 FunctionPass *createCleanupLocalDynamicTLSPass(); 42 43 /// This function returns a pass which converts floating-point register 44 /// references and pseudo instructions into floating-point stack references and 45 /// physical instructions. 46 FunctionPass *createX86FloatingPointStackifierPass(); 47 48 /// This pass inserts AVX vzeroupper instructions before each call to avoid 49 /// transition penalty between functions encoded with AVX and SSE. 50 FunctionPass *createX86IssueVZeroUpperPass(); 51 52 /// This pass inserts ENDBR instructions before indirect jump/call 53 /// destinations as part of CET IBT mechanism. 54 FunctionPass *createX86IndirectBranchTrackingPass(); 55 56 /// Return a pass that pads short functions with NOOPs. 57 /// This will prevent a stall when returning on the Atom. 58 FunctionPass *createX86PadShortFunctions(); 59 60 /// Return a pass that selectively replaces certain instructions (like add, 61 /// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA 62 /// instructions, in order to eliminate execution delays in some processors. 63 FunctionPass *createX86FixupLEAs(); 64 65 /// Return a pass that removes redundant LEA instructions and redundant address 66 /// recalculations. 67 FunctionPass *createX86OptimizeLEAs(); 68 69 /// Return a pass that transforms setcc + movzx pairs into xor + setcc. 70 FunctionPass *createX86FixupSetCC(); 71 72 /// Return a pass that folds conditional branch jumps. 73 FunctionPass *createX86CondBrFolding(); 74 75 /// Return a pass that avoids creating store forward block issues in the hardware. 76 FunctionPass *createX86AvoidStoreForwardingBlocks(); 77 78 /// Return a pass that lowers EFLAGS copy pseudo instructions. 79 FunctionPass *createX86FlagsCopyLoweringPass(); 80 81 /// Return a pass that expands WinAlloca pseudo-instructions. 82 FunctionPass *createX86WinAllocaExpander(); 83 84 /// Return a pass that optimizes the code-size of x86 call sequences. This is 85 /// done by replacing esp-relative movs with pushes. 86 FunctionPass *createX86CallFrameOptimization(); 87 88 /// Return an IR pass that inserts EH registration stack objects and explicit 89 /// EH state updates. This pass must run after EH preparation, which does 90 /// Windows-specific but architecture-neutral preparation. 91 FunctionPass *createX86WinEHStatePass(); 92 93 /// Return a Machine IR pass that expands X86-specific pseudo 94 /// instructions into a sequence of actual instructions. This pass 95 /// must run after prologue/epilogue insertion and before lowering 96 /// the MachineInstr to MC. 97 FunctionPass *createX86ExpandPseudoPass(); 98 99 /// This pass converts X86 cmov instructions into branch when profitable. 100 FunctionPass *createX86CmovConverterPass(); 101 102 /// Return a Machine IR pass that selectively replaces 103 /// certain byte and word instructions by equivalent 32 bit instructions, 104 /// in order to eliminate partial register usage, false dependences on 105 /// the upper portions of registers, and to save code size. 106 FunctionPass *createX86FixupBWInsts(); 107 108 /// Return a Machine IR pass that reassigns instruction chains from one domain 109 /// to another, when profitable. 110 FunctionPass *createX86DomainReassignmentPass(); 111 112 /// This pass replaces EVEX encoded of AVX-512 instructiosn by VEX 113 /// encoding when possible in order to reduce code size. 114 FunctionPass *createX86EvexToVexInsts(); 115 116 /// This pass creates the thunks for the retpoline feature. 117 FunctionPass *createX86RetpolineThunksPass(); 118 119 /// This pass ensures instructions featuring a memory operand 120 /// have distinctive <LineNumber, Discriminator> (with respect to eachother) 121 FunctionPass *createX86DiscriminateMemOpsPass(); 122 123 /// This pass applies profiling information to insert cache prefetches. 124 FunctionPass *createX86InsertPrefetchPass(); 125 126 InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM, 127 X86Subtarget &, 128 X86RegisterBankInfo &); 129 130 FunctionPass *createX86SpeculativeLoadHardeningPass(); 131 132 void initializeEvexToVexInstPassPass(PassRegistry &); 133 void initializeFixupBWInstPassPass(PassRegistry &); 134 void initializeFixupLEAPassPass(PassRegistry &); 135 void initializeFPSPass(PassRegistry &); 136 void initializeWinEHStatePassPass(PassRegistry &); 137 void initializeX86AvoidSFBPassPass(PassRegistry &); 138 void initializeX86CallFrameOptimizationPass(PassRegistry &); 139 void initializeX86CmovConverterPassPass(PassRegistry &); 140 void initializeX86ExpandPseudoPass(PassRegistry&); 141 void initializeX86CondBrFoldingPassPass(PassRegistry &); 142 void initializeX86DomainReassignmentPass(PassRegistry &); 143 void initializeX86ExecutionDomainFixPass(PassRegistry &); 144 void initializeX86FlagsCopyLoweringPassPass(PassRegistry &); 145 void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &); 146 147 } // End llvm namespace 148 149 #endif 150