1 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the entry points for global functions defined in the x86 10 // target library, as used by the LLVM JIT. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_X86_X86_H 15 #define LLVM_LIB_TARGET_X86_X86_H 16 17 #include "llvm/Support/CodeGen.h" 18 19 namespace llvm { 20 21 class FunctionPass; 22 class ImmutablePass; 23 class InstructionSelector; 24 class ModulePass; 25 class PassRegistry; 26 class X86RegisterBankInfo; 27 class X86Subtarget; 28 class X86TargetMachine; 29 30 /// This pass converts a legalized DAG into a X86-specific DAG, ready for 31 /// instruction scheduling. 32 FunctionPass *createX86ISelDag(X86TargetMachine &TM, 33 CodeGenOpt::Level OptLevel); 34 35 /// This pass initializes a global base register for PIC on x86-32. 36 FunctionPass *createX86GlobalBaseRegPass(); 37 38 /// This pass combines multiple accesses to local-dynamic TLS variables so that 39 /// the TLS base address for the module is only fetched once per execution path 40 /// through the function. 41 FunctionPass *createCleanupLocalDynamicTLSPass(); 42 43 /// This function returns a pass which converts floating-point register 44 /// references and pseudo instructions into floating-point stack references and 45 /// physical instructions. 46 FunctionPass *createX86FloatingPointStackifierPass(); 47 48 /// This pass inserts AVX vzeroupper instructions before each call to avoid 49 /// transition penalty between functions encoded with AVX and SSE. 50 FunctionPass *createX86IssueVZeroUpperPass(); 51 52 /// This pass inserts ENDBR instructions before indirect jump/call 53 /// destinations as part of CET IBT mechanism. 54 FunctionPass *createX86IndirectBranchTrackingPass(); 55 56 /// Return a pass that pads short functions with NOOPs. 57 /// This will prevent a stall when returning on the Atom. 58 FunctionPass *createX86PadShortFunctions(); 59 60 /// Return a pass that selectively replaces certain instructions (like add, 61 /// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA 62 /// instructions, in order to eliminate execution delays in some processors. 63 FunctionPass *createX86FixupLEAs(); 64 65 /// Return a pass that removes redundant LEA instructions and redundant address 66 /// recalculations. 67 FunctionPass *createX86OptimizeLEAs(); 68 69 /// Return a pass that transforms setcc + movzx pairs into xor + setcc. 70 FunctionPass *createX86FixupSetCC(); 71 72 /// Return a pass that folds conditional branch jumps. 73 FunctionPass *createX86CondBrFolding(); 74 75 /// Return a pass that avoids creating store forward block issues in the hardware. 76 FunctionPass *createX86AvoidStoreForwardingBlocks(); 77 78 /// Return a pass that lowers EFLAGS copy pseudo instructions. 79 FunctionPass *createX86FlagsCopyLoweringPass(); 80 81 /// Return a pass that expands WinAlloca pseudo-instructions. 82 FunctionPass *createX86WinAllocaExpander(); 83 84 /// Return a pass that inserts int3 at the end of the function if it ends with a 85 /// CALL instruction. The pass does the same for each funclet as well. This 86 /// ensures that the open interval of function start and end PCs contains all 87 /// return addresses for the benefit of the Windows x64 unwinder. 88 FunctionPass *createX86AvoidTrailingCallPass(); 89 90 /// Return a pass that optimizes the code-size of x86 call sequences. This is 91 /// done by replacing esp-relative movs with pushes. 92 FunctionPass *createX86CallFrameOptimization(); 93 94 /// Return an IR pass that inserts EH registration stack objects and explicit 95 /// EH state updates. This pass must run after EH preparation, which does 96 /// Windows-specific but architecture-neutral preparation. 97 FunctionPass *createX86WinEHStatePass(); 98 99 /// Return a Machine IR pass that expands X86-specific pseudo 100 /// instructions into a sequence of actual instructions. This pass 101 /// must run after prologue/epilogue insertion and before lowering 102 /// the MachineInstr to MC. 103 FunctionPass *createX86ExpandPseudoPass(); 104 105 /// This pass converts X86 cmov instructions into branch when profitable. 106 FunctionPass *createX86CmovConverterPass(); 107 108 /// Return a Machine IR pass that selectively replaces 109 /// certain byte and word instructions by equivalent 32 bit instructions, 110 /// in order to eliminate partial register usage, false dependences on 111 /// the upper portions of registers, and to save code size. 112 FunctionPass *createX86FixupBWInsts(); 113 114 /// Return a Machine IR pass that reassigns instruction chains from one domain 115 /// to another, when profitable. 116 FunctionPass *createX86DomainReassignmentPass(); 117 118 /// This pass replaces EVEX encoded of AVX-512 instructiosn by VEX 119 /// encoding when possible in order to reduce code size. 120 FunctionPass *createX86EvexToVexInsts(); 121 122 /// This pass creates the thunks for the retpoline feature. 123 FunctionPass *createX86IndirectThunksPass(); 124 125 /// This pass ensures instructions featuring a memory operand 126 /// have distinctive <LineNumber, Discriminator> (with respect to eachother) 127 FunctionPass *createX86DiscriminateMemOpsPass(); 128 129 /// This pass applies profiling information to insert cache prefetches. 130 FunctionPass *createX86InsertPrefetchPass(); 131 132 InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM, 133 X86Subtarget &, 134 X86RegisterBankInfo &); 135 136 FunctionPass *createX86LoadValueInjectionLoadHardeningPass(); 137 FunctionPass *createX86LoadValueInjectionLoadHardeningUnoptimizedPass(); 138 FunctionPass *createX86LoadValueInjectionRetHardeningPass(); 139 FunctionPass *createX86SpeculativeLoadHardeningPass(); 140 141 void initializeEvexToVexInstPassPass(PassRegistry &); 142 void initializeFixupBWInstPassPass(PassRegistry &); 143 void initializeFixupLEAPassPass(PassRegistry &); 144 void initializeFPSPass(PassRegistry &); 145 void initializeWinEHStatePassPass(PassRegistry &); 146 void initializeX86AvoidSFBPassPass(PassRegistry &); 147 void initializeX86CallFrameOptimizationPass(PassRegistry &); 148 void initializeX86CmovConverterPassPass(PassRegistry &); 149 void initializeX86CondBrFoldingPassPass(PassRegistry &); 150 void initializeX86DomainReassignmentPass(PassRegistry &); 151 void initializeX86ExecutionDomainFixPass(PassRegistry &); 152 void initializeX86ExpandPseudoPass(PassRegistry &); 153 void initializeX86FlagsCopyLoweringPassPass(PassRegistry &); 154 void initializeX86LoadValueInjectionLoadHardeningUnoptimizedPassPass(PassRegistry &); 155 void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &); 156 void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &); 157 void initializeX86OptimizeLEAPassPass(PassRegistry &); 158 void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &); 159 160 namespace X86AS { 161 enum : unsigned { 162 GS = 256, 163 FS = 257, 164 SS = 258, 165 PTR32_SPTR = 270, 166 PTR32_UPTR = 271, 167 PTR64 = 272 168 }; 169 } // End X86AS namespace 170 171 } // End llvm namespace 172 173 #endif 174