10b57cec5SDimitry Andric //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file contains the entry points for global functions defined in the x86 100b57cec5SDimitry Andric // target library, as used by the LLVM JIT. 110b57cec5SDimitry Andric // 120b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_X86_X86_H 150b57cec5SDimitry Andric #define LLVM_LIB_TARGET_X86_X86_H 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric #include "llvm/Support/CodeGen.h" 180b57cec5SDimitry Andric 190b57cec5SDimitry Andric namespace llvm { 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric class FunctionPass; 220b57cec5SDimitry Andric class InstructionSelector; 230b57cec5SDimitry Andric class PassRegistry; 240b57cec5SDimitry Andric class X86RegisterBankInfo; 250b57cec5SDimitry Andric class X86Subtarget; 260b57cec5SDimitry Andric class X86TargetMachine; 270b57cec5SDimitry Andric 280b57cec5SDimitry Andric /// This pass converts a legalized DAG into a X86-specific DAG, ready for 290b57cec5SDimitry Andric /// instruction scheduling. 300b57cec5SDimitry Andric FunctionPass *createX86ISelDag(X86TargetMachine &TM, 310b57cec5SDimitry Andric CodeGenOpt::Level OptLevel); 320b57cec5SDimitry Andric 330b57cec5SDimitry Andric /// This pass initializes a global base register for PIC on x86-32. 340b57cec5SDimitry Andric FunctionPass *createX86GlobalBaseRegPass(); 350b57cec5SDimitry Andric 360b57cec5SDimitry Andric /// This pass combines multiple accesses to local-dynamic TLS variables so that 370b57cec5SDimitry Andric /// the TLS base address for the module is only fetched once per execution path 380b57cec5SDimitry Andric /// through the function. 390b57cec5SDimitry Andric FunctionPass *createCleanupLocalDynamicTLSPass(); 400b57cec5SDimitry Andric 410b57cec5SDimitry Andric /// This function returns a pass which converts floating-point register 420b57cec5SDimitry Andric /// references and pseudo instructions into floating-point stack references and 430b57cec5SDimitry Andric /// physical instructions. 440b57cec5SDimitry Andric FunctionPass *createX86FloatingPointStackifierPass(); 450b57cec5SDimitry Andric 460b57cec5SDimitry Andric /// This pass inserts AVX vzeroupper instructions before each call to avoid 470b57cec5SDimitry Andric /// transition penalty between functions encoded with AVX and SSE. 480b57cec5SDimitry Andric FunctionPass *createX86IssueVZeroUpperPass(); 490b57cec5SDimitry Andric 500b57cec5SDimitry Andric /// This pass inserts ENDBR instructions before indirect jump/call 510b57cec5SDimitry Andric /// destinations as part of CET IBT mechanism. 520b57cec5SDimitry Andric FunctionPass *createX86IndirectBranchTrackingPass(); 530b57cec5SDimitry Andric 540b57cec5SDimitry Andric /// Return a pass that pads short functions with NOOPs. 550b57cec5SDimitry Andric /// This will prevent a stall when returning on the Atom. 560b57cec5SDimitry Andric FunctionPass *createX86PadShortFunctions(); 570b57cec5SDimitry Andric 580b57cec5SDimitry Andric /// Return a pass that selectively replaces certain instructions (like add, 590b57cec5SDimitry Andric /// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA 600b57cec5SDimitry Andric /// instructions, in order to eliminate execution delays in some processors. 610b57cec5SDimitry Andric FunctionPass *createX86FixupLEAs(); 620b57cec5SDimitry Andric 630b57cec5SDimitry Andric /// Return a pass that removes redundant LEA instructions and redundant address 640b57cec5SDimitry Andric /// recalculations. 650b57cec5SDimitry Andric FunctionPass *createX86OptimizeLEAs(); 660b57cec5SDimitry Andric 670b57cec5SDimitry Andric /// Return a pass that transforms setcc + movzx pairs into xor + setcc. 680b57cec5SDimitry Andric FunctionPass *createX86FixupSetCC(); 690b57cec5SDimitry Andric 700b57cec5SDimitry Andric /// Return a pass that folds conditional branch jumps. 710b57cec5SDimitry Andric FunctionPass *createX86CondBrFolding(); 720b57cec5SDimitry Andric 730b57cec5SDimitry Andric /// Return a pass that avoids creating store forward block issues in the hardware. 740b57cec5SDimitry Andric FunctionPass *createX86AvoidStoreForwardingBlocks(); 750b57cec5SDimitry Andric 760b57cec5SDimitry Andric /// Return a pass that lowers EFLAGS copy pseudo instructions. 770b57cec5SDimitry Andric FunctionPass *createX86FlagsCopyLoweringPass(); 780b57cec5SDimitry Andric 790b57cec5SDimitry Andric /// Return a pass that expands WinAlloca pseudo-instructions. 800b57cec5SDimitry Andric FunctionPass *createX86WinAllocaExpander(); 810b57cec5SDimitry Andric 828bcb0991SDimitry Andric /// Return a pass that inserts int3 at the end of the function if it ends with a 838bcb0991SDimitry Andric /// CALL instruction. The pass does the same for each funclet as well. This 848bcb0991SDimitry Andric /// ensures that the open interval of function start and end PCs contains all 858bcb0991SDimitry Andric /// return addresses for the benefit of the Windows x64 unwinder. 868bcb0991SDimitry Andric FunctionPass *createX86AvoidTrailingCallPass(); 878bcb0991SDimitry Andric 880b57cec5SDimitry Andric /// Return a pass that optimizes the code-size of x86 call sequences. This is 890b57cec5SDimitry Andric /// done by replacing esp-relative movs with pushes. 900b57cec5SDimitry Andric FunctionPass *createX86CallFrameOptimization(); 910b57cec5SDimitry Andric 920b57cec5SDimitry Andric /// Return an IR pass that inserts EH registration stack objects and explicit 930b57cec5SDimitry Andric /// EH state updates. This pass must run after EH preparation, which does 940b57cec5SDimitry Andric /// Windows-specific but architecture-neutral preparation. 950b57cec5SDimitry Andric FunctionPass *createX86WinEHStatePass(); 960b57cec5SDimitry Andric 970b57cec5SDimitry Andric /// Return a Machine IR pass that expands X86-specific pseudo 980b57cec5SDimitry Andric /// instructions into a sequence of actual instructions. This pass 990b57cec5SDimitry Andric /// must run after prologue/epilogue insertion and before lowering 1000b57cec5SDimitry Andric /// the MachineInstr to MC. 1010b57cec5SDimitry Andric FunctionPass *createX86ExpandPseudoPass(); 1020b57cec5SDimitry Andric 1030b57cec5SDimitry Andric /// This pass converts X86 cmov instructions into branch when profitable. 1040b57cec5SDimitry Andric FunctionPass *createX86CmovConverterPass(); 1050b57cec5SDimitry Andric 1060b57cec5SDimitry Andric /// Return a Machine IR pass that selectively replaces 1070b57cec5SDimitry Andric /// certain byte and word instructions by equivalent 32 bit instructions, 1080b57cec5SDimitry Andric /// in order to eliminate partial register usage, false dependences on 1090b57cec5SDimitry Andric /// the upper portions of registers, and to save code size. 1100b57cec5SDimitry Andric FunctionPass *createX86FixupBWInsts(); 1110b57cec5SDimitry Andric 1120b57cec5SDimitry Andric /// Return a Machine IR pass that reassigns instruction chains from one domain 1130b57cec5SDimitry Andric /// to another, when profitable. 1140b57cec5SDimitry Andric FunctionPass *createX86DomainReassignmentPass(); 1150b57cec5SDimitry Andric 1160b57cec5SDimitry Andric /// This pass replaces EVEX encoded of AVX-512 instructiosn by VEX 1170b57cec5SDimitry Andric /// encoding when possible in order to reduce code size. 1180b57cec5SDimitry Andric FunctionPass *createX86EvexToVexInsts(); 1190b57cec5SDimitry Andric 1200b57cec5SDimitry Andric /// This pass creates the thunks for the retpoline feature. 1210946e70aSDimitry Andric FunctionPass *createX86IndirectThunksPass(); 1220b57cec5SDimitry Andric 1230b57cec5SDimitry Andric /// This pass ensures instructions featuring a memory operand 1240b57cec5SDimitry Andric /// have distinctive <LineNumber, Discriminator> (with respect to eachother) 1250b57cec5SDimitry Andric FunctionPass *createX86DiscriminateMemOpsPass(); 1260b57cec5SDimitry Andric 1270b57cec5SDimitry Andric /// This pass applies profiling information to insert cache prefetches. 1280b57cec5SDimitry Andric FunctionPass *createX86InsertPrefetchPass(); 1290b57cec5SDimitry Andric 130*5ffd83dbSDimitry Andric /// This pass insert wait instruction after X87 instructions which could raise 131*5ffd83dbSDimitry Andric /// fp exceptions when strict-fp enabled. 132*5ffd83dbSDimitry Andric FunctionPass *createX86InsertX87waitPass(); 133*5ffd83dbSDimitry Andric 134*5ffd83dbSDimitry Andric /// This pass optimizes arithmetic based on knowledge that is only used by 135*5ffd83dbSDimitry Andric /// a reduction sequence and is therefore safe to reassociate in interesting 136*5ffd83dbSDimitry Andric /// ways. 137*5ffd83dbSDimitry Andric FunctionPass *createX86PartialReductionPass(); 138*5ffd83dbSDimitry Andric 1390b57cec5SDimitry Andric InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM, 1400b57cec5SDimitry Andric X86Subtarget &, 1410b57cec5SDimitry Andric X86RegisterBankInfo &); 1420b57cec5SDimitry Andric 1430946e70aSDimitry Andric FunctionPass *createX86LoadValueInjectionLoadHardeningPass(); 1440946e70aSDimitry Andric FunctionPass *createX86LoadValueInjectionRetHardeningPass(); 1450b57cec5SDimitry Andric FunctionPass *createX86SpeculativeLoadHardeningPass(); 146*5ffd83dbSDimitry Andric FunctionPass *createX86SpeculativeExecutionSideEffectSuppression(); 1470b57cec5SDimitry Andric 1480b57cec5SDimitry Andric void initializeEvexToVexInstPassPass(PassRegistry &); 1490b57cec5SDimitry Andric void initializeFixupBWInstPassPass(PassRegistry &); 1500b57cec5SDimitry Andric void initializeFixupLEAPassPass(PassRegistry &); 1510b57cec5SDimitry Andric void initializeFPSPass(PassRegistry &); 1520b57cec5SDimitry Andric void initializeWinEHStatePassPass(PassRegistry &); 1530b57cec5SDimitry Andric void initializeX86AvoidSFBPassPass(PassRegistry &); 154*5ffd83dbSDimitry Andric void initializeX86AvoidTrailingCallPassPass(PassRegistry &); 1550b57cec5SDimitry Andric void initializeX86CallFrameOptimizationPass(PassRegistry &); 1560b57cec5SDimitry Andric void initializeX86CmovConverterPassPass(PassRegistry &); 1570b57cec5SDimitry Andric void initializeX86CondBrFoldingPassPass(PassRegistry &); 1580b57cec5SDimitry Andric void initializeX86DomainReassignmentPass(PassRegistry &); 1590b57cec5SDimitry Andric void initializeX86ExecutionDomainFixPass(PassRegistry &); 1608bcb0991SDimitry Andric void initializeX86ExpandPseudoPass(PassRegistry &); 161*5ffd83dbSDimitry Andric void initializeX86FixupSetCCPassPass(PassRegistry &); 1620b57cec5SDimitry Andric void initializeX86FlagsCopyLoweringPassPass(PassRegistry &); 1630946e70aSDimitry Andric void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &); 1640946e70aSDimitry Andric void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &); 1658bcb0991SDimitry Andric void initializeX86OptimizeLEAPassPass(PassRegistry &); 166*5ffd83dbSDimitry Andric void initializeX86PartialReductionPass(PassRegistry &); 1670b57cec5SDimitry Andric void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &); 168*5ffd83dbSDimitry Andric void initializeX86SpeculativeExecutionSideEffectSuppressionPass(PassRegistry &); 169480093f4SDimitry Andric 170480093f4SDimitry Andric namespace X86AS { 171480093f4SDimitry Andric enum : unsigned { 172480093f4SDimitry Andric GS = 256, 173480093f4SDimitry Andric FS = 257, 174480093f4SDimitry Andric SS = 258, 175480093f4SDimitry Andric PTR32_SPTR = 270, 176480093f4SDimitry Andric PTR32_UPTR = 271, 177480093f4SDimitry Andric PTR64 = 272 178480093f4SDimitry Andric }; 179480093f4SDimitry Andric } // End X86AS namespace 180480093f4SDimitry Andric 1810b57cec5SDimitry Andric } // End llvm namespace 1820b57cec5SDimitry Andric 1830b57cec5SDimitry Andric #endif 184