1 //===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This defines functionality used to emit comments about X86 instructions to 10 // an output stream for -fverbose-asm. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "X86InstComments.h" 15 #include "X86ATTInstPrinter.h" 16 #include "X86BaseInfo.h" 17 #include "X86MCTargetDesc.h" 18 #include "X86ShuffleDecode.h" 19 #include "llvm/MC/MCInst.h" 20 #include "llvm/MC/MCInstrInfo.h" 21 #include "llvm/Support/raw_ostream.h" 22 23 using namespace llvm; 24 25 #define CASE_SSE_INS_COMMON(Inst, src) \ 26 case X86::Inst##src: 27 28 #define CASE_AVX_INS_COMMON(Inst, Suffix, src) \ 29 case X86::V##Inst##Suffix##src: 30 31 #define CASE_MASK_INS_COMMON(Inst, Suffix, src) \ 32 case X86::V##Inst##Suffix##src##k: 33 34 #define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) \ 35 case X86::V##Inst##Suffix##src##kz: 36 37 #define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \ 38 CASE_AVX_INS_COMMON(Inst, Suffix, src) \ 39 CASE_MASK_INS_COMMON(Inst, Suffix, src) \ 40 CASE_MASKZ_INS_COMMON(Inst, Suffix, src) 41 42 #define CASE_MOVDUP(Inst, src) \ 43 CASE_AVX512_INS_COMMON(Inst, Z, r##src) \ 44 CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \ 45 CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \ 46 CASE_AVX_INS_COMMON(Inst, , r##src) \ 47 CASE_AVX_INS_COMMON(Inst, Y, r##src) \ 48 CASE_SSE_INS_COMMON(Inst, r##src) 49 50 #define CASE_MASK_MOVDUP(Inst, src) \ 51 CASE_MASK_INS_COMMON(Inst, Z, r##src) \ 52 CASE_MASK_INS_COMMON(Inst, Z256, r##src) \ 53 CASE_MASK_INS_COMMON(Inst, Z128, r##src) 54 55 #define CASE_MASKZ_MOVDUP(Inst, src) \ 56 CASE_MASKZ_INS_COMMON(Inst, Z, r##src) \ 57 CASE_MASKZ_INS_COMMON(Inst, Z256, r##src) \ 58 CASE_MASKZ_INS_COMMON(Inst, Z128, r##src) 59 60 #define CASE_PMOVZX(Inst, src) \ 61 CASE_AVX512_INS_COMMON(Inst, Z, r##src) \ 62 CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \ 63 CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \ 64 CASE_AVX_INS_COMMON(Inst, , r##src) \ 65 CASE_AVX_INS_COMMON(Inst, Y, r##src) \ 66 CASE_SSE_INS_COMMON(Inst, r##src) 67 68 #define CASE_MASK_PMOVZX(Inst, src) \ 69 CASE_MASK_INS_COMMON(Inst, Z, r##src) \ 70 CASE_MASK_INS_COMMON(Inst, Z256, r##src) \ 71 CASE_MASK_INS_COMMON(Inst, Z128, r##src) 72 73 #define CASE_MASKZ_PMOVZX(Inst, src) \ 74 CASE_MASKZ_INS_COMMON(Inst, Z, r##src) \ 75 CASE_MASKZ_INS_COMMON(Inst, Z256, r##src) \ 76 CASE_MASKZ_INS_COMMON(Inst, Z128, r##src) 77 78 #define CASE_UNPCK(Inst, src) \ 79 CASE_AVX512_INS_COMMON(Inst, Z, r##src) \ 80 CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \ 81 CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \ 82 CASE_AVX_INS_COMMON(Inst, , r##src) \ 83 CASE_AVX_INS_COMMON(Inst, Y, r##src) \ 84 CASE_SSE_INS_COMMON(Inst, r##src) 85 86 #define CASE_MASK_UNPCK(Inst, src) \ 87 CASE_MASK_INS_COMMON(Inst, Z, r##src) \ 88 CASE_MASK_INS_COMMON(Inst, Z256, r##src) \ 89 CASE_MASK_INS_COMMON(Inst, Z128, r##src) 90 91 #define CASE_MASKZ_UNPCK(Inst, src) \ 92 CASE_MASKZ_INS_COMMON(Inst, Z, r##src) \ 93 CASE_MASKZ_INS_COMMON(Inst, Z256, r##src) \ 94 CASE_MASKZ_INS_COMMON(Inst, Z128, r##src) 95 96 #define CASE_SHUF(Inst, suf) \ 97 CASE_AVX512_INS_COMMON(Inst, Z, suf) \ 98 CASE_AVX512_INS_COMMON(Inst, Z256, suf) \ 99 CASE_AVX512_INS_COMMON(Inst, Z128, suf) \ 100 CASE_AVX_INS_COMMON(Inst, , suf) \ 101 CASE_AVX_INS_COMMON(Inst, Y, suf) \ 102 CASE_SSE_INS_COMMON(Inst, suf) 103 104 #define CASE_MASK_SHUF(Inst, src) \ 105 CASE_MASK_INS_COMMON(Inst, Z, r##src##i) \ 106 CASE_MASK_INS_COMMON(Inst, Z256, r##src##i) \ 107 CASE_MASK_INS_COMMON(Inst, Z128, r##src##i) 108 109 #define CASE_MASKZ_SHUF(Inst, src) \ 110 CASE_MASKZ_INS_COMMON(Inst, Z, r##src##i) \ 111 CASE_MASKZ_INS_COMMON(Inst, Z256, r##src##i) \ 112 CASE_MASKZ_INS_COMMON(Inst, Z128, r##src##i) 113 114 #define CASE_VPERMILPI(Inst, src) \ 115 CASE_AVX512_INS_COMMON(Inst, Z, src##i) \ 116 CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \ 117 CASE_AVX512_INS_COMMON(Inst, Z128, src##i) \ 118 CASE_AVX_INS_COMMON(Inst, , src##i) \ 119 CASE_AVX_INS_COMMON(Inst, Y, src##i) 120 121 #define CASE_MASK_VPERMILPI(Inst, src) \ 122 CASE_MASK_INS_COMMON(Inst, Z, src##i) \ 123 CASE_MASK_INS_COMMON(Inst, Z256, src##i) \ 124 CASE_MASK_INS_COMMON(Inst, Z128, src##i) 125 126 #define CASE_MASKZ_VPERMILPI(Inst, src) \ 127 CASE_MASKZ_INS_COMMON(Inst, Z, src##i) \ 128 CASE_MASKZ_INS_COMMON(Inst, Z256, src##i) \ 129 CASE_MASKZ_INS_COMMON(Inst, Z128, src##i) 130 131 #define CASE_VPERM(Inst, src) \ 132 CASE_AVX512_INS_COMMON(Inst, Z, src##i) \ 133 CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \ 134 CASE_AVX_INS_COMMON(Inst, Y, src##i) 135 136 #define CASE_MASK_VPERM(Inst, src) \ 137 CASE_MASK_INS_COMMON(Inst, Z, src##i) \ 138 CASE_MASK_INS_COMMON(Inst, Z256, src##i) 139 140 #define CASE_MASKZ_VPERM(Inst, src) \ 141 CASE_MASKZ_INS_COMMON(Inst, Z, src##i) \ 142 CASE_MASKZ_INS_COMMON(Inst, Z256, src##i) 143 144 #define CASE_VSHUF(Inst, src) \ 145 CASE_AVX512_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ 146 CASE_AVX512_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ 147 CASE_AVX512_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ 148 CASE_AVX512_INS_COMMON(SHUFI##Inst, Z256, r##src##i) 149 150 #define CASE_MASK_VSHUF(Inst, src) \ 151 CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ 152 CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ 153 CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ 154 CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i) 155 156 #define CASE_MASKZ_VSHUF(Inst, src) \ 157 CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ 158 CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ 159 CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ 160 CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z256, r##src##i) 161 162 #define CASE_AVX512_FMA(Inst, suf) \ 163 CASE_AVX512_INS_COMMON(Inst, Z, suf) \ 164 CASE_AVX512_INS_COMMON(Inst, Z256, suf) \ 165 CASE_AVX512_INS_COMMON(Inst, Z128, suf) 166 167 #define CASE_FMA(Inst, suf) \ 168 CASE_AVX512_FMA(Inst, suf) \ 169 CASE_AVX_INS_COMMON(Inst, , suf) \ 170 CASE_AVX_INS_COMMON(Inst, Y, suf) 171 172 #define CASE_FMA_PACKED_REG(Inst) \ 173 CASE_FMA(Inst##PD, r) \ 174 CASE_FMA(Inst##PS, r) 175 176 #define CASE_FMA_PACKED_MEM(Inst) \ 177 CASE_FMA(Inst##PD, m) \ 178 CASE_FMA(Inst##PS, m) \ 179 CASE_AVX512_FMA(Inst##PD, mb) \ 180 CASE_AVX512_FMA(Inst##PS, mb) 181 182 #define CASE_FMA_SCALAR_REG(Inst) \ 183 CASE_AVX_INS_COMMON(Inst##SD, , r) \ 184 CASE_AVX_INS_COMMON(Inst##SS, , r) \ 185 CASE_AVX_INS_COMMON(Inst##SD, , r_Int) \ 186 CASE_AVX_INS_COMMON(Inst##SS, , r_Int) \ 187 CASE_AVX_INS_COMMON(Inst##SD, Z, r) \ 188 CASE_AVX_INS_COMMON(Inst##SS, Z, r) \ 189 CASE_AVX512_INS_COMMON(Inst##SD, Z, r_Int) \ 190 CASE_AVX512_INS_COMMON(Inst##SS, Z, r_Int) 191 192 #define CASE_FMA_SCALAR_MEM(Inst) \ 193 CASE_AVX_INS_COMMON(Inst##SD, , m) \ 194 CASE_AVX_INS_COMMON(Inst##SS, , m) \ 195 CASE_AVX_INS_COMMON(Inst##SD, , m_Int) \ 196 CASE_AVX_INS_COMMON(Inst##SS, , m_Int) \ 197 CASE_AVX_INS_COMMON(Inst##SD, Z, m) \ 198 CASE_AVX_INS_COMMON(Inst##SS, Z, m) \ 199 CASE_AVX512_INS_COMMON(Inst##SD, Z, m_Int) \ 200 CASE_AVX512_INS_COMMON(Inst##SS, Z, m_Int) 201 202 #define CASE_FMA4(Inst, suf) \ 203 CASE_AVX_INS_COMMON(Inst, 4, suf) \ 204 CASE_AVX_INS_COMMON(Inst, 4Y, suf) 205 206 #define CASE_FMA4_PACKED_RR(Inst) \ 207 CASE_FMA4(Inst##PD, rr) \ 208 CASE_FMA4(Inst##PS, rr) 209 210 #define CASE_FMA4_PACKED_RM(Inst) \ 211 CASE_FMA4(Inst##PD, rm) \ 212 CASE_FMA4(Inst##PS, rm) 213 214 #define CASE_FMA4_PACKED_MR(Inst) \ 215 CASE_FMA4(Inst##PD, mr) \ 216 CASE_FMA4(Inst##PS, mr) 217 218 #define CASE_FMA4_SCALAR_RR(Inst) \ 219 CASE_AVX_INS_COMMON(Inst##SD4, , rr) \ 220 CASE_AVX_INS_COMMON(Inst##SS4, , rr) \ 221 CASE_AVX_INS_COMMON(Inst##SD4, , rr_Int) \ 222 CASE_AVX_INS_COMMON(Inst##SS4, , rr_Int) 223 224 #define CASE_FMA4_SCALAR_RM(Inst) \ 225 CASE_AVX_INS_COMMON(Inst##SD4, , rm) \ 226 CASE_AVX_INS_COMMON(Inst##SS4, , rm) \ 227 CASE_AVX_INS_COMMON(Inst##SD4, , rm_Int) \ 228 CASE_AVX_INS_COMMON(Inst##SS4, , rm_Int) 229 230 #define CASE_FMA4_SCALAR_MR(Inst) \ 231 CASE_AVX_INS_COMMON(Inst##SD4, , mr) \ 232 CASE_AVX_INS_COMMON(Inst##SS4, , mr) \ 233 CASE_AVX_INS_COMMON(Inst##SD4, , mr_Int) \ 234 CASE_AVX_INS_COMMON(Inst##SS4, , mr_Int) 235 236 static unsigned getVectorRegSize(unsigned RegNo) { 237 if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31) 238 return 512; 239 if (X86::YMM0 <= RegNo && RegNo <= X86::YMM31) 240 return 256; 241 if (X86::XMM0 <= RegNo && RegNo <= X86::XMM31) 242 return 128; 243 if (X86::MM0 <= RegNo && RegNo <= X86::MM7) 244 return 64; 245 246 llvm_unreachable("Unknown vector reg!"); 247 } 248 249 static unsigned getRegOperandNumElts(const MCInst *MI, unsigned ScalarSize, 250 unsigned OperandIndex) { 251 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); 252 return getVectorRegSize(OpReg) / ScalarSize; 253 } 254 255 static const char *getRegName(MCRegister Reg) { 256 return X86ATTInstPrinter::getRegisterName(Reg); 257 } 258 259 /// Wraps the destination register name with AVX512 mask/maskz filtering. 260 static void printMasking(raw_ostream &OS, const MCInst *MI, 261 const MCInstrInfo &MCII) { 262 const MCInstrDesc &Desc = MCII.get(MI->getOpcode()); 263 uint64_t TSFlags = Desc.TSFlags; 264 265 if (!(TSFlags & X86II::EVEX_K)) 266 return; 267 268 bool MaskWithZero = (TSFlags & X86II::EVEX_Z); 269 unsigned MaskOp = Desc.getNumDefs(); 270 271 if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1) 272 ++MaskOp; 273 274 const char *MaskRegName = getRegName(MI->getOperand(MaskOp).getReg()); 275 276 // MASK: zmmX {%kY} 277 OS << " {%" << MaskRegName << "}"; 278 279 // MASKZ: zmmX {%kY} {z} 280 if (MaskWithZero) 281 OS << " {z}"; 282 } 283 284 static bool printFMAComments(const MCInst *MI, raw_ostream &OS, 285 const MCInstrInfo &MCII) { 286 const char *Mul1Name = nullptr, *Mul2Name = nullptr, *AccName = nullptr; 287 unsigned NumOperands = MI->getNumOperands(); 288 bool RegForm = false; 289 bool Negate = false; 290 StringRef AccStr = "+"; 291 292 // The operands for FMA3 instructions without rounding fall into two forms: 293 // dest, src1, src2, src3 294 // dest, src1, mask, src2, src3 295 // Where src3 is either a register or 5 memory address operands. So to find 296 // dest and src1 we can index from the front. To find src2 and src3 we can 297 // index from the end by taking into account memory vs register form when 298 // finding src2. 299 300 // The operands for FMA4 instructions: 301 // dest, src1, src2, src3 302 // Where src2 OR src3 are either a register or 5 memory address operands. So 303 // to find dest and src1 we can index from the front, src2 (reg/mem) follows 304 // and then src3 (reg) will be at the end. 305 306 switch (MI->getOpcode()) { 307 default: 308 return false; 309 310 CASE_FMA4_PACKED_RR(FMADD) 311 CASE_FMA4_SCALAR_RR(FMADD) 312 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 313 [[fallthrough]]; 314 CASE_FMA4_PACKED_RM(FMADD) 315 CASE_FMA4_SCALAR_RM(FMADD) 316 Mul2Name = getRegName(MI->getOperand(2).getReg()); 317 Mul1Name = getRegName(MI->getOperand(1).getReg()); 318 break; 319 CASE_FMA4_PACKED_MR(FMADD) 320 CASE_FMA4_SCALAR_MR(FMADD) 321 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 322 Mul1Name = getRegName(MI->getOperand(1).getReg()); 323 break; 324 325 CASE_FMA4_PACKED_RR(FMSUB) 326 CASE_FMA4_SCALAR_RR(FMSUB) 327 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 328 [[fallthrough]]; 329 CASE_FMA4_PACKED_RM(FMSUB) 330 CASE_FMA4_SCALAR_RM(FMSUB) 331 Mul2Name = getRegName(MI->getOperand(2).getReg()); 332 Mul1Name = getRegName(MI->getOperand(1).getReg()); 333 AccStr = "-"; 334 break; 335 CASE_FMA4_PACKED_MR(FMSUB) 336 CASE_FMA4_SCALAR_MR(FMSUB) 337 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 338 Mul1Name = getRegName(MI->getOperand(1).getReg()); 339 AccStr = "-"; 340 break; 341 342 CASE_FMA4_PACKED_RR(FNMADD) 343 CASE_FMA4_SCALAR_RR(FNMADD) 344 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 345 [[fallthrough]]; 346 CASE_FMA4_PACKED_RM(FNMADD) 347 CASE_FMA4_SCALAR_RM(FNMADD) 348 Mul2Name = getRegName(MI->getOperand(2).getReg()); 349 Mul1Name = getRegName(MI->getOperand(1).getReg()); 350 Negate = true; 351 break; 352 CASE_FMA4_PACKED_MR(FNMADD) 353 CASE_FMA4_SCALAR_MR(FNMADD) 354 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 355 Mul1Name = getRegName(MI->getOperand(1).getReg()); 356 Negate = true; 357 break; 358 359 CASE_FMA4_PACKED_RR(FNMSUB) 360 CASE_FMA4_SCALAR_RR(FNMSUB) 361 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 362 [[fallthrough]]; 363 CASE_FMA4_PACKED_RM(FNMSUB) 364 CASE_FMA4_SCALAR_RM(FNMSUB) 365 Mul2Name = getRegName(MI->getOperand(2).getReg()); 366 Mul1Name = getRegName(MI->getOperand(1).getReg()); 367 AccStr = "-"; 368 Negate = true; 369 break; 370 CASE_FMA4_PACKED_MR(FNMSUB) 371 CASE_FMA4_SCALAR_MR(FNMSUB) 372 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 373 Mul1Name = getRegName(MI->getOperand(1).getReg()); 374 AccStr = "-"; 375 Negate = true; 376 break; 377 378 CASE_FMA4_PACKED_RR(FMADDSUB) 379 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 380 [[fallthrough]]; 381 CASE_FMA4_PACKED_RM(FMADDSUB) 382 Mul2Name = getRegName(MI->getOperand(2).getReg()); 383 Mul1Name = getRegName(MI->getOperand(1).getReg()); 384 AccStr = "+/-"; 385 break; 386 CASE_FMA4_PACKED_MR(FMADDSUB) 387 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 388 Mul1Name = getRegName(MI->getOperand(1).getReg()); 389 AccStr = "+/-"; 390 break; 391 392 CASE_FMA4_PACKED_RR(FMSUBADD) 393 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 394 [[fallthrough]]; 395 CASE_FMA4_PACKED_RM(FMSUBADD) 396 Mul2Name = getRegName(MI->getOperand(2).getReg()); 397 Mul1Name = getRegName(MI->getOperand(1).getReg()); 398 AccStr = "-/+"; 399 break; 400 CASE_FMA4_PACKED_MR(FMSUBADD) 401 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 402 Mul1Name = getRegName(MI->getOperand(1).getReg()); 403 AccStr = "-/+"; 404 break; 405 406 CASE_FMA_PACKED_REG(FMADD132) 407 CASE_FMA_SCALAR_REG(FMADD132) 408 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 409 RegForm = true; 410 [[fallthrough]]; 411 CASE_FMA_PACKED_MEM(FMADD132) 412 CASE_FMA_SCALAR_MEM(FMADD132) 413 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 414 Mul1Name = getRegName(MI->getOperand(1).getReg()); 415 break; 416 417 CASE_FMA_PACKED_REG(FMADD213) 418 CASE_FMA_SCALAR_REG(FMADD213) 419 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 420 RegForm = true; 421 [[fallthrough]]; 422 CASE_FMA_PACKED_MEM(FMADD213) 423 CASE_FMA_SCALAR_MEM(FMADD213) 424 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 425 Mul2Name = getRegName(MI->getOperand(1).getReg()); 426 break; 427 428 CASE_FMA_PACKED_REG(FMADD231) 429 CASE_FMA_SCALAR_REG(FMADD231) 430 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 431 RegForm = true; 432 [[fallthrough]]; 433 CASE_FMA_PACKED_MEM(FMADD231) 434 CASE_FMA_SCALAR_MEM(FMADD231) 435 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 436 AccName = getRegName(MI->getOperand(1).getReg()); 437 break; 438 439 CASE_FMA_PACKED_REG(FMSUB132) 440 CASE_FMA_SCALAR_REG(FMSUB132) 441 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 442 RegForm = true; 443 [[fallthrough]]; 444 CASE_FMA_PACKED_MEM(FMSUB132) 445 CASE_FMA_SCALAR_MEM(FMSUB132) 446 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 447 Mul1Name = getRegName(MI->getOperand(1).getReg()); 448 AccStr = "-"; 449 break; 450 451 CASE_FMA_PACKED_REG(FMSUB213) 452 CASE_FMA_SCALAR_REG(FMSUB213) 453 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 454 RegForm = true; 455 [[fallthrough]]; 456 CASE_FMA_PACKED_MEM(FMSUB213) 457 CASE_FMA_SCALAR_MEM(FMSUB213) 458 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 459 Mul2Name = getRegName(MI->getOperand(1).getReg()); 460 AccStr = "-"; 461 break; 462 463 CASE_FMA_PACKED_REG(FMSUB231) 464 CASE_FMA_SCALAR_REG(FMSUB231) 465 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 466 RegForm = true; 467 [[fallthrough]]; 468 CASE_FMA_PACKED_MEM(FMSUB231) 469 CASE_FMA_SCALAR_MEM(FMSUB231) 470 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 471 AccName = getRegName(MI->getOperand(1).getReg()); 472 AccStr = "-"; 473 break; 474 475 CASE_FMA_PACKED_REG(FNMADD132) 476 CASE_FMA_SCALAR_REG(FNMADD132) 477 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 478 RegForm = true; 479 [[fallthrough]]; 480 CASE_FMA_PACKED_MEM(FNMADD132) 481 CASE_FMA_SCALAR_MEM(FNMADD132) 482 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 483 Mul1Name = getRegName(MI->getOperand(1).getReg()); 484 Negate = true; 485 break; 486 487 CASE_FMA_PACKED_REG(FNMADD213) 488 CASE_FMA_SCALAR_REG(FNMADD213) 489 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 490 RegForm = true; 491 [[fallthrough]]; 492 CASE_FMA_PACKED_MEM(FNMADD213) 493 CASE_FMA_SCALAR_MEM(FNMADD213) 494 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 495 Mul2Name = getRegName(MI->getOperand(1).getReg()); 496 Negate = true; 497 break; 498 499 CASE_FMA_PACKED_REG(FNMADD231) 500 CASE_FMA_SCALAR_REG(FNMADD231) 501 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 502 RegForm = true; 503 [[fallthrough]]; 504 CASE_FMA_PACKED_MEM(FNMADD231) 505 CASE_FMA_SCALAR_MEM(FNMADD231) 506 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 507 AccName = getRegName(MI->getOperand(1).getReg()); 508 Negate = true; 509 break; 510 511 CASE_FMA_PACKED_REG(FNMSUB132) 512 CASE_FMA_SCALAR_REG(FNMSUB132) 513 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 514 RegForm = true; 515 [[fallthrough]]; 516 CASE_FMA_PACKED_MEM(FNMSUB132) 517 CASE_FMA_SCALAR_MEM(FNMSUB132) 518 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 519 Mul1Name = getRegName(MI->getOperand(1).getReg()); 520 AccStr = "-"; 521 Negate = true; 522 break; 523 524 CASE_FMA_PACKED_REG(FNMSUB213) 525 CASE_FMA_SCALAR_REG(FNMSUB213) 526 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 527 RegForm = true; 528 [[fallthrough]]; 529 CASE_FMA_PACKED_MEM(FNMSUB213) 530 CASE_FMA_SCALAR_MEM(FNMSUB213) 531 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 532 Mul2Name = getRegName(MI->getOperand(1).getReg()); 533 AccStr = "-"; 534 Negate = true; 535 break; 536 537 CASE_FMA_PACKED_REG(FNMSUB231) 538 CASE_FMA_SCALAR_REG(FNMSUB231) 539 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 540 RegForm = true; 541 [[fallthrough]]; 542 CASE_FMA_PACKED_MEM(FNMSUB231) 543 CASE_FMA_SCALAR_MEM(FNMSUB231) 544 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 545 AccName = getRegName(MI->getOperand(1).getReg()); 546 AccStr = "-"; 547 Negate = true; 548 break; 549 550 CASE_FMA_PACKED_REG(FMADDSUB132) 551 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 552 RegForm = true; 553 [[fallthrough]]; 554 CASE_FMA_PACKED_MEM(FMADDSUB132) 555 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 556 Mul1Name = getRegName(MI->getOperand(1).getReg()); 557 AccStr = "+/-"; 558 break; 559 560 CASE_FMA_PACKED_REG(FMADDSUB213) 561 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 562 RegForm = true; 563 [[fallthrough]]; 564 CASE_FMA_PACKED_MEM(FMADDSUB213) 565 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 566 Mul2Name = getRegName(MI->getOperand(1).getReg()); 567 AccStr = "+/-"; 568 break; 569 570 CASE_FMA_PACKED_REG(FMADDSUB231) 571 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 572 RegForm = true; 573 [[fallthrough]]; 574 CASE_FMA_PACKED_MEM(FMADDSUB231) 575 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 576 AccName = getRegName(MI->getOperand(1).getReg()); 577 AccStr = "+/-"; 578 break; 579 580 CASE_FMA_PACKED_REG(FMSUBADD132) 581 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 582 RegForm = true; 583 [[fallthrough]]; 584 CASE_FMA_PACKED_MEM(FMSUBADD132) 585 AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 586 Mul1Name = getRegName(MI->getOperand(1).getReg()); 587 AccStr = "-/+"; 588 break; 589 590 CASE_FMA_PACKED_REG(FMSUBADD213) 591 AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); 592 RegForm = true; 593 [[fallthrough]]; 594 CASE_FMA_PACKED_MEM(FMSUBADD213) 595 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 596 Mul2Name = getRegName(MI->getOperand(1).getReg()); 597 AccStr = "-/+"; 598 break; 599 600 CASE_FMA_PACKED_REG(FMSUBADD231) 601 Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 602 RegForm = true; 603 [[fallthrough]]; 604 CASE_FMA_PACKED_MEM(FMSUBADD231) 605 Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 606 AccName = getRegName(MI->getOperand(1).getReg()); 607 AccStr = "-/+"; 608 break; 609 } 610 611 const char *DestName = getRegName(MI->getOperand(0).getReg()); 612 613 if (!Mul1Name) Mul1Name = "mem"; 614 if (!Mul2Name) Mul2Name = "mem"; 615 if (!AccName) AccName = "mem"; 616 617 OS << DestName; 618 printMasking(OS, MI, MCII); 619 OS << " = "; 620 621 if (Negate) 622 OS << '-'; 623 624 OS << '(' << Mul1Name << " * " << Mul2Name << ") " << AccStr << ' ' 625 << AccName << '\n'; 626 627 return true; 628 } 629 630 631 //===----------------------------------------------------------------------===// 632 // Top Level Entrypoint 633 //===----------------------------------------------------------------------===// 634 635 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints 636 /// newline terminated strings to the specified string if desired. This 637 /// information is shown in disassembly dumps when verbose assembly is enabled. 638 bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, 639 const MCInstrInfo &MCII) { 640 // If this is a shuffle operation, the switch should fill in this state. 641 SmallVector<int, 8> ShuffleMask; 642 const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr; 643 unsigned NumOperands = MI->getNumOperands(); 644 bool RegForm = false; 645 646 if (printFMAComments(MI, OS, MCII)) 647 return true; 648 649 switch (MI->getOpcode()) { 650 default: 651 // Not an instruction for which we can decode comments. 652 return false; 653 654 case X86::BLENDPDrri: 655 case X86::VBLENDPDrri: 656 case X86::VBLENDPDYrri: 657 Src2Name = getRegName(MI->getOperand(2).getReg()); 658 [[fallthrough]]; 659 case X86::BLENDPDrmi: 660 case X86::VBLENDPDrmi: 661 case X86::VBLENDPDYrmi: 662 if (MI->getOperand(NumOperands - 1).isImm()) 663 DecodeBLENDMask(getRegOperandNumElts(MI, 64, 0), 664 MI->getOperand(NumOperands - 1).getImm(), 665 ShuffleMask); 666 Src1Name = getRegName(MI->getOperand(1).getReg()); 667 DestName = getRegName(MI->getOperand(0).getReg()); 668 break; 669 670 case X86::BLENDPSrri: 671 case X86::VBLENDPSrri: 672 case X86::VBLENDPSYrri: 673 Src2Name = getRegName(MI->getOperand(2).getReg()); 674 [[fallthrough]]; 675 case X86::BLENDPSrmi: 676 case X86::VBLENDPSrmi: 677 case X86::VBLENDPSYrmi: 678 if (MI->getOperand(NumOperands - 1).isImm()) 679 DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0), 680 MI->getOperand(NumOperands - 1).getImm(), 681 ShuffleMask); 682 Src1Name = getRegName(MI->getOperand(1).getReg()); 683 DestName = getRegName(MI->getOperand(0).getReg()); 684 break; 685 686 case X86::PBLENDWrri: 687 case X86::VPBLENDWrri: 688 case X86::VPBLENDWYrri: 689 Src2Name = getRegName(MI->getOperand(2).getReg()); 690 [[fallthrough]]; 691 case X86::PBLENDWrmi: 692 case X86::VPBLENDWrmi: 693 case X86::VPBLENDWYrmi: 694 if (MI->getOperand(NumOperands - 1).isImm()) 695 DecodeBLENDMask(getRegOperandNumElts(MI, 16, 0), 696 MI->getOperand(NumOperands - 1).getImm(), 697 ShuffleMask); 698 Src1Name = getRegName(MI->getOperand(1).getReg()); 699 DestName = getRegName(MI->getOperand(0).getReg()); 700 break; 701 702 case X86::VPBLENDDrri: 703 case X86::VPBLENDDYrri: 704 Src2Name = getRegName(MI->getOperand(2).getReg()); 705 [[fallthrough]]; 706 case X86::VPBLENDDrmi: 707 case X86::VPBLENDDYrmi: 708 if (MI->getOperand(NumOperands - 1).isImm()) 709 DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0), 710 MI->getOperand(NumOperands - 1).getImm(), 711 ShuffleMask); 712 Src1Name = getRegName(MI->getOperand(1).getReg()); 713 DestName = getRegName(MI->getOperand(0).getReg()); 714 break; 715 716 case X86::INSERTPSrr: 717 case X86::VINSERTPSrr: 718 case X86::VINSERTPSZrr: 719 Src2Name = getRegName(MI->getOperand(2).getReg()); 720 [[fallthrough]]; 721 case X86::INSERTPSrm: 722 case X86::VINSERTPSrm: 723 case X86::VINSERTPSZrm: 724 DestName = getRegName(MI->getOperand(0).getReg()); 725 Src1Name = getRegName(MI->getOperand(1).getReg()); 726 if (MI->getOperand(NumOperands - 1).isImm()) 727 DecodeINSERTPSMask(MI->getOperand(NumOperands - 1).getImm(), 728 ShuffleMask); 729 break; 730 731 case X86::MOVLHPSrr: 732 case X86::VMOVLHPSrr: 733 case X86::VMOVLHPSZrr: 734 Src2Name = getRegName(MI->getOperand(2).getReg()); 735 Src1Name = getRegName(MI->getOperand(1).getReg()); 736 DestName = getRegName(MI->getOperand(0).getReg()); 737 DecodeMOVLHPSMask(2, ShuffleMask); 738 break; 739 740 case X86::MOVHLPSrr: 741 case X86::VMOVHLPSrr: 742 case X86::VMOVHLPSZrr: 743 Src2Name = getRegName(MI->getOperand(2).getReg()); 744 Src1Name = getRegName(MI->getOperand(1).getReg()); 745 DestName = getRegName(MI->getOperand(0).getReg()); 746 DecodeMOVHLPSMask(2, ShuffleMask); 747 break; 748 749 case X86::MOVHPDrm: 750 case X86::VMOVHPDrm: 751 case X86::VMOVHPDZ128rm: 752 Src1Name = getRegName(MI->getOperand(1).getReg()); 753 DestName = getRegName(MI->getOperand(0).getReg()); 754 DecodeInsertElementMask(2, 1, 1, ShuffleMask); 755 break; 756 757 case X86::MOVHPSrm: 758 case X86::VMOVHPSrm: 759 case X86::VMOVHPSZ128rm: 760 Src1Name = getRegName(MI->getOperand(1).getReg()); 761 DestName = getRegName(MI->getOperand(0).getReg()); 762 DecodeInsertElementMask(4, 2, 2, ShuffleMask); 763 break; 764 765 case X86::MOVLPDrm: 766 case X86::VMOVLPDrm: 767 case X86::VMOVLPDZ128rm: 768 Src1Name = getRegName(MI->getOperand(1).getReg()); 769 DestName = getRegName(MI->getOperand(0).getReg()); 770 DecodeInsertElementMask(2, 0, 1, ShuffleMask); 771 break; 772 773 case X86::MOVLPSrm: 774 case X86::VMOVLPSrm: 775 case X86::VMOVLPSZ128rm: 776 Src1Name = getRegName(MI->getOperand(1).getReg()); 777 DestName = getRegName(MI->getOperand(0).getReg()); 778 DecodeInsertElementMask(4, 0, 2, ShuffleMask); 779 break; 780 781 CASE_MOVDUP(MOVSLDUP, r) 782 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 783 [[fallthrough]]; 784 785 CASE_MOVDUP(MOVSLDUP, m) 786 DestName = getRegName(MI->getOperand(0).getReg()); 787 DecodeMOVSLDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask); 788 break; 789 790 CASE_MOVDUP(MOVSHDUP, r) 791 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 792 [[fallthrough]]; 793 794 CASE_MOVDUP(MOVSHDUP, m) 795 DestName = getRegName(MI->getOperand(0).getReg()); 796 DecodeMOVSHDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask); 797 break; 798 799 CASE_MOVDUP(MOVDDUP, r) 800 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 801 [[fallthrough]]; 802 803 CASE_MOVDUP(MOVDDUP, m) 804 DestName = getRegName(MI->getOperand(0).getReg()); 805 DecodeMOVDDUPMask(getRegOperandNumElts(MI, 64, 0), ShuffleMask); 806 break; 807 808 case X86::PSLLDQri: 809 case X86::VPSLLDQri: 810 case X86::VPSLLDQYri: 811 case X86::VPSLLDQZ128ri: 812 case X86::VPSLLDQZ256ri: 813 case X86::VPSLLDQZri: 814 Src1Name = getRegName(MI->getOperand(1).getReg()); 815 [[fallthrough]]; 816 case X86::VPSLLDQZ128mi: 817 case X86::VPSLLDQZ256mi: 818 case X86::VPSLLDQZmi: 819 DestName = getRegName(MI->getOperand(0).getReg()); 820 if (MI->getOperand(NumOperands - 1).isImm()) 821 DecodePSLLDQMask(getRegOperandNumElts(MI, 8, 0), 822 MI->getOperand(NumOperands - 1).getImm(), 823 ShuffleMask); 824 break; 825 826 case X86::PSRLDQri: 827 case X86::VPSRLDQri: 828 case X86::VPSRLDQYri: 829 case X86::VPSRLDQZ128ri: 830 case X86::VPSRLDQZ256ri: 831 case X86::VPSRLDQZri: 832 Src1Name = getRegName(MI->getOperand(1).getReg()); 833 [[fallthrough]]; 834 case X86::VPSRLDQZ128mi: 835 case X86::VPSRLDQZ256mi: 836 case X86::VPSRLDQZmi: 837 DestName = getRegName(MI->getOperand(0).getReg()); 838 if (MI->getOperand(NumOperands - 1).isImm()) 839 DecodePSRLDQMask(getRegOperandNumElts(MI, 8, 0), 840 MI->getOperand(NumOperands - 1).getImm(), 841 ShuffleMask); 842 break; 843 844 CASE_SHUF(PALIGNR, rri) 845 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 846 RegForm = true; 847 [[fallthrough]]; 848 849 CASE_SHUF(PALIGNR, rmi) 850 Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); 851 DestName = getRegName(MI->getOperand(0).getReg()); 852 if (MI->getOperand(NumOperands - 1).isImm()) 853 DecodePALIGNRMask(getRegOperandNumElts(MI, 8, 0), 854 MI->getOperand(NumOperands - 1).getImm(), 855 ShuffleMask); 856 break; 857 858 CASE_AVX512_INS_COMMON(ALIGNQ, Z, rri) 859 CASE_AVX512_INS_COMMON(ALIGNQ, Z256, rri) 860 CASE_AVX512_INS_COMMON(ALIGNQ, Z128, rri) 861 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 862 RegForm = true; 863 [[fallthrough]]; 864 865 CASE_AVX512_INS_COMMON(ALIGNQ, Z, rmi) 866 CASE_AVX512_INS_COMMON(ALIGNQ, Z256, rmi) 867 CASE_AVX512_INS_COMMON(ALIGNQ, Z128, rmi) 868 Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); 869 DestName = getRegName(MI->getOperand(0).getReg()); 870 if (MI->getOperand(NumOperands - 1).isImm()) 871 DecodeVALIGNMask(getRegOperandNumElts(MI, 64, 0), 872 MI->getOperand(NumOperands - 1).getImm(), 873 ShuffleMask); 874 break; 875 876 CASE_AVX512_INS_COMMON(ALIGND, Z, rri) 877 CASE_AVX512_INS_COMMON(ALIGND, Z256, rri) 878 CASE_AVX512_INS_COMMON(ALIGND, Z128, rri) 879 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 880 RegForm = true; 881 [[fallthrough]]; 882 883 CASE_AVX512_INS_COMMON(ALIGND, Z, rmi) 884 CASE_AVX512_INS_COMMON(ALIGND, Z256, rmi) 885 CASE_AVX512_INS_COMMON(ALIGND, Z128, rmi) 886 Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); 887 DestName = getRegName(MI->getOperand(0).getReg()); 888 if (MI->getOperand(NumOperands - 1).isImm()) 889 DecodeVALIGNMask(getRegOperandNumElts(MI, 32, 0), 890 MI->getOperand(NumOperands - 1).getImm(), 891 ShuffleMask); 892 break; 893 894 CASE_SHUF(PSHUFD, ri) 895 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 896 [[fallthrough]]; 897 898 CASE_SHUF(PSHUFD, mi) 899 DestName = getRegName(MI->getOperand(0).getReg()); 900 if (MI->getOperand(NumOperands - 1).isImm()) 901 DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32, 902 MI->getOperand(NumOperands - 1).getImm(), 903 ShuffleMask); 904 break; 905 906 CASE_SHUF(PSHUFHW, ri) 907 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 908 [[fallthrough]]; 909 910 CASE_SHUF(PSHUFHW, mi) 911 DestName = getRegName(MI->getOperand(0).getReg()); 912 if (MI->getOperand(NumOperands - 1).isImm()) 913 DecodePSHUFHWMask(getRegOperandNumElts(MI, 16, 0), 914 MI->getOperand(NumOperands - 1).getImm(), 915 ShuffleMask); 916 break; 917 918 CASE_SHUF(PSHUFLW, ri) 919 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 920 [[fallthrough]]; 921 922 CASE_SHUF(PSHUFLW, mi) 923 DestName = getRegName(MI->getOperand(0).getReg()); 924 if (MI->getOperand(NumOperands - 1).isImm()) 925 DecodePSHUFLWMask(getRegOperandNumElts(MI, 16, 0), 926 MI->getOperand(NumOperands - 1).getImm(), 927 ShuffleMask); 928 break; 929 930 case X86::MMX_PSHUFWri: 931 Src1Name = getRegName(MI->getOperand(1).getReg()); 932 [[fallthrough]]; 933 934 case X86::MMX_PSHUFWmi: 935 DestName = getRegName(MI->getOperand(0).getReg()); 936 if (MI->getOperand(NumOperands - 1).isImm()) 937 DecodePSHUFMask(4, 16, MI->getOperand(NumOperands - 1).getImm(), 938 ShuffleMask); 939 break; 940 941 case X86::PSWAPDrr: 942 Src1Name = getRegName(MI->getOperand(1).getReg()); 943 [[fallthrough]]; 944 945 case X86::PSWAPDrm: 946 DestName = getRegName(MI->getOperand(0).getReg()); 947 DecodePSWAPMask(2, ShuffleMask); 948 break; 949 950 CASE_UNPCK(PUNPCKHBW, r) 951 case X86::MMX_PUNPCKHBWrr: 952 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 953 RegForm = true; 954 [[fallthrough]]; 955 956 CASE_UNPCK(PUNPCKHBW, m) 957 case X86::MMX_PUNPCKHBWrm: 958 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 959 DestName = getRegName(MI->getOperand(0).getReg()); 960 DecodeUNPCKHMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask); 961 break; 962 963 CASE_UNPCK(PUNPCKHWD, r) 964 case X86::MMX_PUNPCKHWDrr: 965 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 966 RegForm = true; 967 [[fallthrough]]; 968 969 CASE_UNPCK(PUNPCKHWD, m) 970 case X86::MMX_PUNPCKHWDrm: 971 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 972 DestName = getRegName(MI->getOperand(0).getReg()); 973 DecodeUNPCKHMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask); 974 break; 975 976 CASE_UNPCK(PUNPCKHDQ, r) 977 case X86::MMX_PUNPCKHDQrr: 978 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 979 RegForm = true; 980 [[fallthrough]]; 981 982 CASE_UNPCK(PUNPCKHDQ, m) 983 case X86::MMX_PUNPCKHDQrm: 984 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 985 DestName = getRegName(MI->getOperand(0).getReg()); 986 DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask); 987 break; 988 989 CASE_UNPCK(PUNPCKHQDQ, r) 990 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 991 RegForm = true; 992 [[fallthrough]]; 993 994 CASE_UNPCK(PUNPCKHQDQ, m) 995 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 996 DestName = getRegName(MI->getOperand(0).getReg()); 997 DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask); 998 break; 999 1000 CASE_UNPCK(PUNPCKLBW, r) 1001 case X86::MMX_PUNPCKLBWrr: 1002 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1003 RegForm = true; 1004 [[fallthrough]]; 1005 1006 CASE_UNPCK(PUNPCKLBW, m) 1007 case X86::MMX_PUNPCKLBWrm: 1008 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 1009 DestName = getRegName(MI->getOperand(0).getReg()); 1010 DecodeUNPCKLMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask); 1011 break; 1012 1013 CASE_UNPCK(PUNPCKLWD, r) 1014 case X86::MMX_PUNPCKLWDrr: 1015 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1016 RegForm = true; 1017 [[fallthrough]]; 1018 1019 CASE_UNPCK(PUNPCKLWD, m) 1020 case X86::MMX_PUNPCKLWDrm: 1021 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 1022 DestName = getRegName(MI->getOperand(0).getReg()); 1023 DecodeUNPCKLMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask); 1024 break; 1025 1026 CASE_UNPCK(PUNPCKLDQ, r) 1027 case X86::MMX_PUNPCKLDQrr: 1028 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1029 RegForm = true; 1030 [[fallthrough]]; 1031 1032 CASE_UNPCK(PUNPCKLDQ, m) 1033 case X86::MMX_PUNPCKLDQrm: 1034 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 1035 DestName = getRegName(MI->getOperand(0).getReg()); 1036 DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask); 1037 break; 1038 1039 CASE_UNPCK(PUNPCKLQDQ, r) 1040 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1041 RegForm = true; 1042 [[fallthrough]]; 1043 1044 CASE_UNPCK(PUNPCKLQDQ, m) 1045 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 1046 DestName = getRegName(MI->getOperand(0).getReg()); 1047 DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask); 1048 break; 1049 1050 CASE_SHUF(SHUFPD, rri) 1051 Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 1052 RegForm = true; 1053 [[fallthrough]]; 1054 1055 CASE_SHUF(SHUFPD, rmi) 1056 if (MI->getOperand(NumOperands - 1).isImm()) 1057 DecodeSHUFPMask(getRegOperandNumElts(MI, 64, 0), 64, 1058 MI->getOperand(NumOperands - 1).getImm(), ShuffleMask); 1059 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); 1060 DestName = getRegName(MI->getOperand(0).getReg()); 1061 break; 1062 1063 CASE_SHUF(SHUFPS, rri) 1064 Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 1065 RegForm = true; 1066 [[fallthrough]]; 1067 1068 CASE_SHUF(SHUFPS, rmi) 1069 if (MI->getOperand(NumOperands - 1).isImm()) 1070 DecodeSHUFPMask(getRegOperandNumElts(MI, 32, 0), 32, 1071 MI->getOperand(NumOperands - 1).getImm(), 1072 ShuffleMask); 1073 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); 1074 DestName = getRegName(MI->getOperand(0).getReg()); 1075 break; 1076 1077 CASE_VSHUF(64X2, r) 1078 Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 1079 RegForm = true; 1080 [[fallthrough]]; 1081 1082 CASE_VSHUF(64X2, m) 1083 decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 64, 0), 64, 1084 MI->getOperand(NumOperands - 1).getImm(), 1085 ShuffleMask); 1086 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); 1087 DestName = getRegName(MI->getOperand(0).getReg()); 1088 break; 1089 1090 CASE_VSHUF(32X4, r) 1091 Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 1092 RegForm = true; 1093 [[fallthrough]]; 1094 1095 CASE_VSHUF(32X4, m) 1096 decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 32, 0), 32, 1097 MI->getOperand(NumOperands - 1).getImm(), 1098 ShuffleMask); 1099 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); 1100 DestName = getRegName(MI->getOperand(0).getReg()); 1101 break; 1102 1103 CASE_UNPCK(UNPCKLPD, r) 1104 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1105 RegForm = true; 1106 [[fallthrough]]; 1107 1108 CASE_UNPCK(UNPCKLPD, m) 1109 DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask); 1110 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 1111 DestName = getRegName(MI->getOperand(0).getReg()); 1112 break; 1113 1114 CASE_UNPCK(UNPCKLPS, r) 1115 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1116 RegForm = true; 1117 [[fallthrough]]; 1118 1119 CASE_UNPCK(UNPCKLPS, m) 1120 DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask); 1121 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 1122 DestName = getRegName(MI->getOperand(0).getReg()); 1123 break; 1124 1125 CASE_UNPCK(UNPCKHPD, r) 1126 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1127 RegForm = true; 1128 [[fallthrough]]; 1129 1130 CASE_UNPCK(UNPCKHPD, m) 1131 DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask); 1132 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 1133 DestName = getRegName(MI->getOperand(0).getReg()); 1134 break; 1135 1136 CASE_UNPCK(UNPCKHPS, r) 1137 Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1138 RegForm = true; 1139 [[fallthrough]]; 1140 1141 CASE_UNPCK(UNPCKHPS, m) 1142 DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask); 1143 Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); 1144 DestName = getRegName(MI->getOperand(0).getReg()); 1145 break; 1146 1147 CASE_VPERMILPI(PERMILPS, r) 1148 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 1149 [[fallthrough]]; 1150 1151 CASE_VPERMILPI(PERMILPS, m) 1152 if (MI->getOperand(NumOperands - 1).isImm()) 1153 DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32, 1154 MI->getOperand(NumOperands - 1).getImm(), 1155 ShuffleMask); 1156 DestName = getRegName(MI->getOperand(0).getReg()); 1157 break; 1158 1159 CASE_VPERMILPI(PERMILPD, r) 1160 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 1161 [[fallthrough]]; 1162 1163 CASE_VPERMILPI(PERMILPD, m) 1164 if (MI->getOperand(NumOperands - 1).isImm()) 1165 DecodePSHUFMask(getRegOperandNumElts(MI, 64, 0), 64, 1166 MI->getOperand(NumOperands - 1).getImm(), 1167 ShuffleMask); 1168 DestName = getRegName(MI->getOperand(0).getReg()); 1169 break; 1170 1171 case X86::VPERM2F128rr: 1172 case X86::VPERM2I128rr: 1173 Src2Name = getRegName(MI->getOperand(2).getReg()); 1174 [[fallthrough]]; 1175 1176 case X86::VPERM2F128rm: 1177 case X86::VPERM2I128rm: 1178 // For instruction comments purpose, assume the 256-bit vector is v4i64. 1179 if (MI->getOperand(NumOperands - 1).isImm()) 1180 DecodeVPERM2X128Mask(4, MI->getOperand(NumOperands - 1).getImm(), 1181 ShuffleMask); 1182 Src1Name = getRegName(MI->getOperand(1).getReg()); 1183 DestName = getRegName(MI->getOperand(0).getReg()); 1184 break; 1185 1186 CASE_VPERM(PERMPD, r) 1187 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 1188 [[fallthrough]]; 1189 1190 CASE_VPERM(PERMPD, m) 1191 if (MI->getOperand(NumOperands - 1).isImm()) 1192 DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0), 1193 MI->getOperand(NumOperands - 1).getImm(), 1194 ShuffleMask); 1195 DestName = getRegName(MI->getOperand(0).getReg()); 1196 break; 1197 1198 CASE_VPERM(PERMQ, r) 1199 Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); 1200 [[fallthrough]]; 1201 1202 CASE_VPERM(PERMQ, m) 1203 if (MI->getOperand(NumOperands - 1).isImm()) 1204 DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0), 1205 MI->getOperand(NumOperands - 1).getImm(), 1206 ShuffleMask); 1207 DestName = getRegName(MI->getOperand(0).getReg()); 1208 break; 1209 1210 case X86::MOVSDrr: 1211 case X86::VMOVSDrr: 1212 case X86::VMOVSDZrr: 1213 Src2Name = getRegName(MI->getOperand(2).getReg()); 1214 Src1Name = getRegName(MI->getOperand(1).getReg()); 1215 [[fallthrough]]; 1216 1217 case X86::MOVSDrm_alt: 1218 case X86::MOVSDrm: 1219 case X86::VMOVSDrm_alt: 1220 case X86::VMOVSDrm: 1221 case X86::VMOVSDZrm: 1222 case X86::VMOVSDZrm_alt: 1223 DecodeScalarMoveMask(2, nullptr == Src2Name, ShuffleMask); 1224 DestName = getRegName(MI->getOperand(0).getReg()); 1225 break; 1226 1227 case X86::MOVSSrr: 1228 case X86::VMOVSSrr: 1229 case X86::VMOVSSZrr: 1230 Src2Name = getRegName(MI->getOperand(2).getReg()); 1231 Src1Name = getRegName(MI->getOperand(1).getReg()); 1232 [[fallthrough]]; 1233 1234 case X86::MOVSSrm: 1235 case X86::MOVSSrm_alt: 1236 case X86::VMOVSSrm: 1237 case X86::VMOVSSrm_alt: 1238 case X86::VMOVSSZrm: 1239 case X86::VMOVSSZrm_alt: 1240 DecodeScalarMoveMask(4, nullptr == Src2Name, ShuffleMask); 1241 DestName = getRegName(MI->getOperand(0).getReg()); 1242 break; 1243 1244 case X86::MOVPQI2QIrr: 1245 case X86::MOVZPQILo2PQIrr: 1246 case X86::VMOVPQI2QIrr: 1247 case X86::VMOVPQI2QIZrr: 1248 case X86::VMOVZPQILo2PQIrr: 1249 case X86::VMOVZPQILo2PQIZrr: 1250 Src1Name = getRegName(MI->getOperand(1).getReg()); 1251 [[fallthrough]]; 1252 1253 case X86::MOVQI2PQIrm: 1254 case X86::VMOVQI2PQIrm: 1255 case X86::VMOVQI2PQIZrm: 1256 DecodeZeroMoveLowMask(2, ShuffleMask); 1257 DestName = getRegName(MI->getOperand(0).getReg()); 1258 break; 1259 1260 case X86::MOVDI2PDIrm: 1261 case X86::VMOVDI2PDIrm: 1262 case X86::VMOVDI2PDIZrm: 1263 DecodeZeroMoveLowMask(4, ShuffleMask); 1264 DestName = getRegName(MI->getOperand(0).getReg()); 1265 break; 1266 1267 case X86::EXTRQI: 1268 if (MI->getOperand(2).isImm() && 1269 MI->getOperand(3).isImm()) 1270 DecodeEXTRQIMask(16, 8, MI->getOperand(2).getImm(), 1271 MI->getOperand(3).getImm(), ShuffleMask); 1272 1273 DestName = getRegName(MI->getOperand(0).getReg()); 1274 Src1Name = getRegName(MI->getOperand(1).getReg()); 1275 break; 1276 1277 case X86::INSERTQI: 1278 if (MI->getOperand(3).isImm() && 1279 MI->getOperand(4).isImm()) 1280 DecodeINSERTQIMask(16, 8, MI->getOperand(3).getImm(), 1281 MI->getOperand(4).getImm(), ShuffleMask); 1282 1283 DestName = getRegName(MI->getOperand(0).getReg()); 1284 Src1Name = getRegName(MI->getOperand(1).getReg()); 1285 Src2Name = getRegName(MI->getOperand(2).getReg()); 1286 break; 1287 1288 case X86::VBROADCASTF128: 1289 case X86::VBROADCASTI128: 1290 CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z128, rm) 1291 CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z128, rm) 1292 DecodeSubVectorBroadcast(4, 2, ShuffleMask); 1293 DestName = getRegName(MI->getOperand(0).getReg()); 1294 break; 1295 CASE_AVX512_INS_COMMON(BROADCASTF64X2, , rm) 1296 CASE_AVX512_INS_COMMON(BROADCASTI64X2, , rm) 1297 DecodeSubVectorBroadcast(8, 2, ShuffleMask); 1298 DestName = getRegName(MI->getOperand(0).getReg()); 1299 break; 1300 CASE_AVX512_INS_COMMON(BROADCASTF64X4, , rm) 1301 CASE_AVX512_INS_COMMON(BROADCASTI64X4, , rm) 1302 DecodeSubVectorBroadcast(8, 4, ShuffleMask); 1303 DestName = getRegName(MI->getOperand(0).getReg()); 1304 break; 1305 CASE_AVX512_INS_COMMON(BROADCASTF32X4, Z256, rm) 1306 CASE_AVX512_INS_COMMON(BROADCASTI32X4, Z256, rm) 1307 DecodeSubVectorBroadcast(8, 4, ShuffleMask); 1308 DestName = getRegName(MI->getOperand(0).getReg()); 1309 break; 1310 CASE_AVX512_INS_COMMON(BROADCASTF32X4, , rm) 1311 CASE_AVX512_INS_COMMON(BROADCASTI32X4, , rm) 1312 DecodeSubVectorBroadcast(16, 4, ShuffleMask); 1313 DestName = getRegName(MI->getOperand(0).getReg()); 1314 break; 1315 CASE_AVX512_INS_COMMON(BROADCASTF32X8, , rm) 1316 CASE_AVX512_INS_COMMON(BROADCASTI32X8, , rm) 1317 DecodeSubVectorBroadcast(16, 8, ShuffleMask); 1318 DestName = getRegName(MI->getOperand(0).getReg()); 1319 break; 1320 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, rr) 1321 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1322 [[fallthrough]]; 1323 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, rm) 1324 DecodeSubVectorBroadcast(4, 2, ShuffleMask); 1325 DestName = getRegName(MI->getOperand(0).getReg()); 1326 break; 1327 CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, rr) 1328 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, rr) 1329 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1330 [[fallthrough]]; 1331 CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, rm) 1332 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, rm) 1333 DecodeSubVectorBroadcast(8, 2, ShuffleMask); 1334 DestName = getRegName(MI->getOperand(0).getReg()); 1335 break; 1336 CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, rr) 1337 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, rr) 1338 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1339 [[fallthrough]]; 1340 CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, rm) 1341 CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, rm) 1342 DecodeSubVectorBroadcast(16, 2, ShuffleMask); 1343 DestName = getRegName(MI->getOperand(0).getReg()); 1344 break; 1345 1346 CASE_PMOVZX(PMOVZXBW, r) 1347 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1348 [[fallthrough]]; 1349 CASE_PMOVZX(PMOVZXBW, m) 1350 DecodeZeroExtendMask(8, 16, getRegOperandNumElts(MI, 16, 0), false, 1351 ShuffleMask); 1352 DestName = getRegName(MI->getOperand(0).getReg()); 1353 break; 1354 1355 CASE_PMOVZX(PMOVZXBD, r) 1356 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1357 [[fallthrough]]; 1358 CASE_PMOVZX(PMOVZXBD, m) 1359 DecodeZeroExtendMask(8, 32, getRegOperandNumElts(MI, 32, 0), false, 1360 ShuffleMask); 1361 DestName = getRegName(MI->getOperand(0).getReg()); 1362 break; 1363 1364 CASE_PMOVZX(PMOVZXBQ, r) 1365 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1366 [[fallthrough]]; 1367 CASE_PMOVZX(PMOVZXBQ, m) 1368 DecodeZeroExtendMask(8, 64, getRegOperandNumElts(MI, 64, 0), false, 1369 ShuffleMask); 1370 DestName = getRegName(MI->getOperand(0).getReg()); 1371 break; 1372 1373 CASE_PMOVZX(PMOVZXWD, r) 1374 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1375 [[fallthrough]]; 1376 CASE_PMOVZX(PMOVZXWD, m) 1377 DecodeZeroExtendMask(16, 32, getRegOperandNumElts(MI, 32, 0), false, 1378 ShuffleMask); 1379 DestName = getRegName(MI->getOperand(0).getReg()); 1380 break; 1381 1382 CASE_PMOVZX(PMOVZXWQ, r) 1383 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1384 [[fallthrough]]; 1385 CASE_PMOVZX(PMOVZXWQ, m) 1386 DecodeZeroExtendMask(16, 64, getRegOperandNumElts(MI, 64, 0), false, 1387 ShuffleMask); 1388 DestName = getRegName(MI->getOperand(0).getReg()); 1389 break; 1390 1391 CASE_PMOVZX(PMOVZXDQ, r) 1392 Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); 1393 [[fallthrough]]; 1394 CASE_PMOVZX(PMOVZXDQ, m) 1395 DecodeZeroExtendMask(32, 64, getRegOperandNumElts(MI, 64, 0), false, 1396 ShuffleMask); 1397 DestName = getRegName(MI->getOperand(0).getReg()); 1398 break; 1399 } 1400 1401 // The only comments we decode are shuffles, so give up if we were unable to 1402 // decode a shuffle mask. 1403 if (ShuffleMask.empty()) 1404 return false; 1405 1406 if (!DestName) DestName = Src1Name; 1407 if (DestName) { 1408 OS << DestName; 1409 printMasking(OS, MI, MCII); 1410 } else 1411 OS << "mem"; 1412 1413 OS << " = "; 1414 1415 // If the two sources are the same, canonicalize the input elements to be 1416 // from the first src so that we get larger element spans. 1417 if (Src1Name == Src2Name) { 1418 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) { 1419 if ((int)ShuffleMask[i] >= 0 && // Not sentinel. 1420 ShuffleMask[i] >= (int)e) // From second mask. 1421 ShuffleMask[i] -= e; 1422 } 1423 } 1424 1425 // The shuffle mask specifies which elements of the src1/src2 fill in the 1426 // destination, with a few sentinel values. Loop through and print them 1427 // out. 1428 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) { 1429 if (i != 0) 1430 OS << ','; 1431 if (ShuffleMask[i] == SM_SentinelZero) { 1432 OS << "zero"; 1433 continue; 1434 } 1435 1436 // Otherwise, it must come from src1 or src2. Print the span of elements 1437 // that comes from this src. 1438 bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size(); 1439 const char *SrcName = isSrc1 ? Src1Name : Src2Name; 1440 OS << (SrcName ? SrcName : "mem") << '['; 1441 bool IsFirst = true; 1442 while (i != e && (int)ShuffleMask[i] != SM_SentinelZero && 1443 (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) { 1444 if (!IsFirst) 1445 OS << ','; 1446 else 1447 IsFirst = false; 1448 if (ShuffleMask[i] == SM_SentinelUndef) 1449 OS << "u"; 1450 else 1451 OS << ShuffleMask[i] % ShuffleMask.size(); 1452 ++i; 1453 } 1454 OS << ']'; 1455 --i; // For loop increments element #. 1456 } 1457 OS << '\n'; 1458 1459 // We successfully added a comment to this instruction. 1460 return true; 1461 } 1462