xref: /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimizationForImmediate.def (revision 4f0ff49fee00dee624e13b2d305cf9dfee395b7d)
1//===- X86EncodingOptimizationForImmediate.def.def ---------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// \file
9// This file defines all the entries of X86 instruction relaxation for immediate
10//===----------------------------------------------------------------------===//
11
12#ifndef ENTRY
13#define ENTRY(LONG, SHORT)
14#endif
15ENTRY(ADC16mi, ADC16mi8)
16ENTRY(ADC16ri, ADC16ri8)
17ENTRY(ADC32mi, ADC32mi8)
18ENTRY(ADC32ri, ADC32ri8)
19ENTRY(ADC64mi32, ADC64mi8)
20ENTRY(ADC64ri32, ADC64ri8)
21ENTRY(SBB16mi, SBB16mi8)
22ENTRY(SBB16ri, SBB16ri8)
23ENTRY(SBB32mi, SBB32mi8)
24ENTRY(SBB32ri, SBB32ri8)
25ENTRY(SBB64mi32, SBB64mi8)
26ENTRY(SBB64ri32, SBB64ri8)
27ENTRY(ADD16mi, ADD16mi8)
28ENTRY(ADD16ri, ADD16ri8)
29ENTRY(ADD32mi, ADD32mi8)
30ENTRY(ADD32ri, ADD32ri8)
31ENTRY(ADD64mi32, ADD64mi8)
32ENTRY(ADD64ri32, ADD64ri8)
33ENTRY(AND16mi, AND16mi8)
34ENTRY(AND16ri, AND16ri8)
35ENTRY(AND32mi, AND32mi8)
36ENTRY(AND32ri, AND32ri8)
37ENTRY(AND64mi32, AND64mi8)
38ENTRY(AND64ri32, AND64ri8)
39ENTRY(OR16mi, OR16mi8)
40ENTRY(OR16ri, OR16ri8)
41ENTRY(OR32mi, OR32mi8)
42ENTRY(OR32ri, OR32ri8)
43ENTRY(OR64mi32, OR64mi8)
44ENTRY(OR64ri32, OR64ri8)
45ENTRY(SUB16mi, SUB16mi8)
46ENTRY(SUB16ri, SUB16ri8)
47ENTRY(SUB32mi, SUB32mi8)
48ENTRY(SUB32ri, SUB32ri8)
49ENTRY(SUB64mi32, SUB64mi8)
50ENTRY(SUB64ri32, SUB64ri8)
51ENTRY(XOR16mi, XOR16mi8)
52ENTRY(XOR16ri, XOR16ri8)
53ENTRY(XOR32mi, XOR32mi8)
54ENTRY(XOR32ri, XOR32ri8)
55ENTRY(XOR64mi32, XOR64mi8)
56ENTRY(XOR64ri32, XOR64ri8)
57ENTRY(CMP16mi, CMP16mi8)
58ENTRY(CMP16ri, CMP16ri8)
59ENTRY(CMP32mi, CMP32mi8)
60ENTRY(CMP32ri, CMP32ri8)
61ENTRY(CMP64mi32, CMP64mi8)
62ENTRY(CMP64ri32, CMP64ri8)
63ENTRY(IMUL16rmi, IMUL16rmi8)
64ENTRY(IMUL16rri, IMUL16rri8)
65ENTRY(IMUL32rmi, IMUL32rmi8)
66ENTRY(IMUL32rri, IMUL32rri8)
67ENTRY(IMUL64rmi32, IMUL64rmi8)
68ENTRY(IMUL64rri32, IMUL64rri8)
69ENTRY(PUSH16i, PUSH16i8)
70ENTRY(PUSH32i, PUSH32i8)
71ENTRY(PUSH64i32, PUSH64i8)
72#undef ENTRY
73