1 //===------------------- X86CustomBehaviour.cpp -----------------*-C++ -* -===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// \file 9 /// 10 /// This file implements methods from the X86CustomBehaviour class. 11 /// 12 //===----------------------------------------------------------------------===// 13 14 #include "X86CustomBehaviour.h" 15 #include "TargetInfo/X86TargetInfo.h" 16 #include "X86InstrInfo.h" 17 #include "llvm/MC/TargetRegistry.h" 18 #include "llvm/Support/WithColor.h" 19 20 namespace llvm { 21 namespace mca { 22 23 void X86InstrPostProcess::setMemBarriers(std::unique_ptr<Instruction> &Inst, 24 const MCInst &MCI) { 25 switch (MCI.getOpcode()) { 26 case X86::MFENCE: 27 Inst->setLoadBarrier(true); 28 Inst->setStoreBarrier(true); 29 break; 30 case X86::LFENCE: 31 Inst->setLoadBarrier(true); 32 break; 33 case X86::SFENCE: 34 Inst->setStoreBarrier(true); 35 break; 36 } 37 } 38 39 void X86InstrPostProcess::postProcessInstruction( 40 std::unique_ptr<Instruction> &Inst, const MCInst &MCI) { 41 // Currently, we only modify certain instructions' IsALoadBarrier and 42 // IsAStoreBarrier flags. 43 setMemBarriers(Inst, MCI); 44 } 45 46 } // namespace mca 47 } // namespace llvm 48 49 using namespace llvm; 50 using namespace mca; 51 52 static InstrPostProcess *createX86InstrPostProcess(const MCSubtargetInfo &STI, 53 const MCInstrInfo &MCII) { 54 return new X86InstrPostProcess(STI, MCII); 55 } 56 57 /// Extern function to initialize the targets for the X86 backend 58 59 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86TargetMCA() { 60 TargetRegistry::RegisterInstrPostProcess(getTheX86_32Target(), 61 createX86InstrPostProcess); 62 TargetRegistry::RegisterInstrPostProcess(getTheX86_64Target(), 63 createX86InstrPostProcess); 64 } 65