10b57cec5SDimitry Andric //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric /// 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// This file defines the WebAssembly-specific subclass of TargetMachine. 110b57cec5SDimitry Andric /// 120b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #include "WebAssemblyTargetMachine.h" 150b57cec5SDimitry Andric #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 160b57cec5SDimitry Andric #include "TargetInfo/WebAssemblyTargetInfo.h" 170b57cec5SDimitry Andric #include "WebAssembly.h" 180b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h" 190b57cec5SDimitry Andric #include "WebAssemblyTargetObjectFile.h" 200b57cec5SDimitry Andric #include "WebAssemblyTargetTransformInfo.h" 210b57cec5SDimitry Andric #include "llvm/CodeGen/MIRParser/MIParser.h" 220b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunctionPass.h" 230b57cec5SDimitry Andric #include "llvm/CodeGen/Passes.h" 240b57cec5SDimitry Andric #include "llvm/CodeGen/RegAllocRegistry.h" 250b57cec5SDimitry Andric #include "llvm/CodeGen/TargetPassConfig.h" 260b57cec5SDimitry Andric #include "llvm/IR/Function.h" 270b57cec5SDimitry Andric #include "llvm/Support/TargetRegistry.h" 280b57cec5SDimitry Andric #include "llvm/Target/TargetOptions.h" 290b57cec5SDimitry Andric #include "llvm/Transforms/Scalar.h" 300b57cec5SDimitry Andric #include "llvm/Transforms/Scalar/LowerAtomic.h" 310b57cec5SDimitry Andric #include "llvm/Transforms/Utils.h" 320b57cec5SDimitry Andric using namespace llvm; 330b57cec5SDimitry Andric 340b57cec5SDimitry Andric #define DEBUG_TYPE "wasm" 350b57cec5SDimitry Andric 360b57cec5SDimitry Andric // Emscripten's asm.js-style exception handling 37e8d8bef9SDimitry Andric cl::opt<bool> EnableEmException( 380b57cec5SDimitry Andric "enable-emscripten-cxx-exceptions", 390b57cec5SDimitry Andric cl::desc("WebAssembly Emscripten-style exception handling"), 400b57cec5SDimitry Andric cl::init(false)); 410b57cec5SDimitry Andric 420b57cec5SDimitry Andric // Emscripten's asm.js-style setjmp/longjmp handling 43e8d8bef9SDimitry Andric cl::opt<bool> EnableEmSjLj( 440b57cec5SDimitry Andric "enable-emscripten-sjlj", 450b57cec5SDimitry Andric cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"), 460b57cec5SDimitry Andric cl::init(false)); 470b57cec5SDimitry Andric 485ffd83dbSDimitry Andric // A command-line option to keep implicit locals 495ffd83dbSDimitry Andric // for the purpose of testing with lit/llc ONLY. 505ffd83dbSDimitry Andric // This produces output which is not valid WebAssembly, and is not supported 515ffd83dbSDimitry Andric // by assemblers/disassemblers and other MC based tools. 525ffd83dbSDimitry Andric static cl::opt<bool> WasmDisableExplicitLocals( 535ffd83dbSDimitry Andric "wasm-disable-explicit-locals", cl::Hidden, 545ffd83dbSDimitry Andric cl::desc("WebAssembly: output implicit locals in" 555ffd83dbSDimitry Andric " instruction output for test purposes only."), 565ffd83dbSDimitry Andric cl::init(false)); 575ffd83dbSDimitry Andric 58480093f4SDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() { 590b57cec5SDimitry Andric // Register the target. 600b57cec5SDimitry Andric RegisterTargetMachine<WebAssemblyTargetMachine> X( 610b57cec5SDimitry Andric getTheWebAssemblyTarget32()); 620b57cec5SDimitry Andric RegisterTargetMachine<WebAssemblyTargetMachine> Y( 630b57cec5SDimitry Andric getTheWebAssemblyTarget64()); 640b57cec5SDimitry Andric 650b57cec5SDimitry Andric // Register backend passes 660b57cec5SDimitry Andric auto &PR = *PassRegistry::getPassRegistry(); 670b57cec5SDimitry Andric initializeWebAssemblyAddMissingPrototypesPass(PR); 680b57cec5SDimitry Andric initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR); 690b57cec5SDimitry Andric initializeLowerGlobalDtorsPass(PR); 700b57cec5SDimitry Andric initializeFixFunctionBitcastsPass(PR); 710b57cec5SDimitry Andric initializeOptimizeReturnedPass(PR); 720b57cec5SDimitry Andric initializeWebAssemblyArgumentMovePass(PR); 730b57cec5SDimitry Andric initializeWebAssemblySetP2AlignOperandsPass(PR); 740b57cec5SDimitry Andric initializeWebAssemblyReplacePhysRegsPass(PR); 750b57cec5SDimitry Andric initializeWebAssemblyPrepareForLiveIntervalsPass(PR); 760b57cec5SDimitry Andric initializeWebAssemblyOptimizeLiveIntervalsPass(PR); 770b57cec5SDimitry Andric initializeWebAssemblyMemIntrinsicResultsPass(PR); 780b57cec5SDimitry Andric initializeWebAssemblyRegStackifyPass(PR); 790b57cec5SDimitry Andric initializeWebAssemblyRegColoringPass(PR); 80*fe6060f1SDimitry Andric initializeWebAssemblyNullifyDebugValueListsPass(PR); 810b57cec5SDimitry Andric initializeWebAssemblyFixIrreducibleControlFlowPass(PR); 820b57cec5SDimitry Andric initializeWebAssemblyLateEHPreparePass(PR); 830b57cec5SDimitry Andric initializeWebAssemblyExceptionInfoPass(PR); 840b57cec5SDimitry Andric initializeWebAssemblyCFGSortPass(PR); 850b57cec5SDimitry Andric initializeWebAssemblyCFGStackifyPass(PR); 860b57cec5SDimitry Andric initializeWebAssemblyExplicitLocalsPass(PR); 870b57cec5SDimitry Andric initializeWebAssemblyLowerBrUnlessPass(PR); 880b57cec5SDimitry Andric initializeWebAssemblyRegNumberingPass(PR); 895ffd83dbSDimitry Andric initializeWebAssemblyDebugFixupPass(PR); 900b57cec5SDimitry Andric initializeWebAssemblyPeepholePass(PR); 91*fe6060f1SDimitry Andric initializeWebAssemblyMCLowerPrePassPass(PR); 920b57cec5SDimitry Andric } 930b57cec5SDimitry Andric 940b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 950b57cec5SDimitry Andric // WebAssembly Lowering public interface. 960b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 970b57cec5SDimitry Andric 980b57cec5SDimitry Andric static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM, 990b57cec5SDimitry Andric const Triple &TT) { 1000b57cec5SDimitry Andric if (!RM.hasValue()) { 1010b57cec5SDimitry Andric // Default to static relocation model. This should always be more optimial 1020b57cec5SDimitry Andric // than PIC since the static linker can determine all global addresses and 1030b57cec5SDimitry Andric // assume direct function calls. 1040b57cec5SDimitry Andric return Reloc::Static; 1050b57cec5SDimitry Andric } 1060b57cec5SDimitry Andric 1070b57cec5SDimitry Andric if (!TT.isOSEmscripten()) { 1080b57cec5SDimitry Andric // Relocation modes other than static are currently implemented in a way 1090b57cec5SDimitry Andric // that only works for Emscripten, so disable them if we aren't targeting 1100b57cec5SDimitry Andric // Emscripten. 1110b57cec5SDimitry Andric return Reloc::Static; 1120b57cec5SDimitry Andric } 1130b57cec5SDimitry Andric 1140b57cec5SDimitry Andric return *RM; 1150b57cec5SDimitry Andric } 1160b57cec5SDimitry Andric 1170b57cec5SDimitry Andric /// Create an WebAssembly architecture model. 1180b57cec5SDimitry Andric /// 1190b57cec5SDimitry Andric WebAssemblyTargetMachine::WebAssemblyTargetMachine( 1200b57cec5SDimitry Andric const Target &T, const Triple &TT, StringRef CPU, StringRef FS, 1210b57cec5SDimitry Andric const TargetOptions &Options, Optional<Reloc::Model> RM, 1220b57cec5SDimitry Andric Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) 123*fe6060f1SDimitry Andric : LLVMTargetMachine( 124*fe6060f1SDimitry Andric T, 125*fe6060f1SDimitry Andric TT.isArch64Bit() 126*fe6060f1SDimitry Andric ? (TT.isOSEmscripten() 127*fe6060f1SDimitry Andric ? "e-m:e-p:64:64-i64:64-f128:64-n32:64-S128-ni:1:10:20" 128*fe6060f1SDimitry Andric : "e-m:e-p:64:64-i64:64-n32:64-S128-ni:1:10:20") 129*fe6060f1SDimitry Andric : (TT.isOSEmscripten() 130*fe6060f1SDimitry Andric ? "e-m:e-p:32:32-i64:64-f128:64-n32:64-S128-ni:1:10:20" 131*fe6060f1SDimitry Andric : "e-m:e-p:32:32-i64:64-n32:64-S128-ni:1:10:20"), 1320b57cec5SDimitry Andric TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT), 1330b57cec5SDimitry Andric getEffectiveCodeModel(CM, CodeModel::Large), OL), 1340b57cec5SDimitry Andric TLOF(new WebAssemblyTargetObjectFile()) { 1350b57cec5SDimitry Andric // WebAssembly type-checks instructions, but a noreturn function with a return 1360b57cec5SDimitry Andric // type that doesn't match the context will cause a check failure. So we lower 1370b57cec5SDimitry Andric // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's 1380b57cec5SDimitry Andric // 'unreachable' instructions which is meant for that case. 1390b57cec5SDimitry Andric this->Options.TrapUnreachable = true; 1400b57cec5SDimitry Andric 1410b57cec5SDimitry Andric // WebAssembly treats each function as an independent unit. Force 1420b57cec5SDimitry Andric // -ffunction-sections, effectively, so that we can emit them independently. 1430b57cec5SDimitry Andric this->Options.FunctionSections = true; 1440b57cec5SDimitry Andric this->Options.DataSections = true; 1450b57cec5SDimitry Andric this->Options.UniqueSectionNames = true; 1460b57cec5SDimitry Andric 1470b57cec5SDimitry Andric initAsmInfo(); 1480b57cec5SDimitry Andric 1490b57cec5SDimitry Andric // Note that we don't use setRequiresStructuredCFG(true). It disables 1500b57cec5SDimitry Andric // optimizations than we're ok with, and want, such as critical edge 1510b57cec5SDimitry Andric // splitting and tail merging. 1520b57cec5SDimitry Andric } 1530b57cec5SDimitry Andric 1540b57cec5SDimitry Andric WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor. 1550b57cec5SDimitry Andric 156e8d8bef9SDimitry Andric const WebAssemblySubtarget *WebAssemblyTargetMachine::getSubtargetImpl() const { 157e8d8bef9SDimitry Andric return getSubtargetImpl(std::string(getTargetCPU()), 158e8d8bef9SDimitry Andric std::string(getTargetFeatureString())); 159e8d8bef9SDimitry Andric } 160e8d8bef9SDimitry Andric 1610b57cec5SDimitry Andric const WebAssemblySubtarget * 1620b57cec5SDimitry Andric WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU, 1630b57cec5SDimitry Andric std::string FS) const { 1640b57cec5SDimitry Andric auto &I = SubtargetMap[CPU + FS]; 1650b57cec5SDimitry Andric if (!I) { 1668bcb0991SDimitry Andric I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this); 1670b57cec5SDimitry Andric } 1680b57cec5SDimitry Andric return I.get(); 1690b57cec5SDimitry Andric } 1700b57cec5SDimitry Andric 1710b57cec5SDimitry Andric const WebAssemblySubtarget * 1720b57cec5SDimitry Andric WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const { 1730b57cec5SDimitry Andric Attribute CPUAttr = F.getFnAttribute("target-cpu"); 1740b57cec5SDimitry Andric Attribute FSAttr = F.getFnAttribute("target-features"); 1750b57cec5SDimitry Andric 176e8d8bef9SDimitry Andric std::string CPU = 177e8d8bef9SDimitry Andric CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU; 178e8d8bef9SDimitry Andric std::string FS = 179e8d8bef9SDimitry Andric FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS; 1800b57cec5SDimitry Andric 1810b57cec5SDimitry Andric // This needs to be done before we create a new subtarget since any 1820b57cec5SDimitry Andric // creation will depend on the TM and the code generation flags on the 1830b57cec5SDimitry Andric // function that reside in TargetOptions. 1840b57cec5SDimitry Andric resetTargetOptions(F); 1850b57cec5SDimitry Andric 1860b57cec5SDimitry Andric return getSubtargetImpl(CPU, FS); 1870b57cec5SDimitry Andric } 1880b57cec5SDimitry Andric 1890b57cec5SDimitry Andric namespace { 1900b57cec5SDimitry Andric 1910b57cec5SDimitry Andric class CoalesceFeaturesAndStripAtomics final : public ModulePass { 1920b57cec5SDimitry Andric // Take the union of all features used in the module and use it for each 1930b57cec5SDimitry Andric // function individually, since having multiple feature sets in one module 1940b57cec5SDimitry Andric // currently does not make sense for WebAssembly. If atomics are not enabled, 1950b57cec5SDimitry Andric // also strip atomic operations and thread local storage. 1960b57cec5SDimitry Andric static char ID; 1970b57cec5SDimitry Andric WebAssemblyTargetMachine *WasmTM; 1980b57cec5SDimitry Andric 1990b57cec5SDimitry Andric public: 2000b57cec5SDimitry Andric CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM) 2010b57cec5SDimitry Andric : ModulePass(ID), WasmTM(WasmTM) {} 2020b57cec5SDimitry Andric 2030b57cec5SDimitry Andric bool runOnModule(Module &M) override { 2040b57cec5SDimitry Andric FeatureBitset Features = coalesceFeatures(M); 2050b57cec5SDimitry Andric 2060b57cec5SDimitry Andric std::string FeatureStr = getFeatureString(Features); 207e8d8bef9SDimitry Andric WasmTM->setTargetFeatureString(FeatureStr); 2080b57cec5SDimitry Andric for (auto &F : M) 2090b57cec5SDimitry Andric replaceFeatures(F, FeatureStr); 2100b57cec5SDimitry Andric 2110b57cec5SDimitry Andric bool StrippedAtomics = false; 2120b57cec5SDimitry Andric bool StrippedTLS = false; 2130b57cec5SDimitry Andric 2140b57cec5SDimitry Andric if (!Features[WebAssembly::FeatureAtomics]) 2150b57cec5SDimitry Andric StrippedAtomics = stripAtomics(M); 2160b57cec5SDimitry Andric 2170b57cec5SDimitry Andric if (!Features[WebAssembly::FeatureBulkMemory]) 2180b57cec5SDimitry Andric StrippedTLS = stripThreadLocals(M); 2190b57cec5SDimitry Andric 2200b57cec5SDimitry Andric if (StrippedAtomics && !StrippedTLS) 2210b57cec5SDimitry Andric stripThreadLocals(M); 2220b57cec5SDimitry Andric else if (StrippedTLS && !StrippedAtomics) 2230b57cec5SDimitry Andric stripAtomics(M); 2240b57cec5SDimitry Andric 2250b57cec5SDimitry Andric recordFeatures(M, Features, StrippedAtomics || StrippedTLS); 2260b57cec5SDimitry Andric 2270b57cec5SDimitry Andric // Conservatively assume we have made some change 2280b57cec5SDimitry Andric return true; 2290b57cec5SDimitry Andric } 2300b57cec5SDimitry Andric 2310b57cec5SDimitry Andric private: 2320b57cec5SDimitry Andric FeatureBitset coalesceFeatures(const Module &M) { 2330b57cec5SDimitry Andric FeatureBitset Features = 2340b57cec5SDimitry Andric WasmTM 2355ffd83dbSDimitry Andric ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()), 2365ffd83dbSDimitry Andric std::string(WasmTM->getTargetFeatureString())) 2370b57cec5SDimitry Andric ->getFeatureBits(); 2380b57cec5SDimitry Andric for (auto &F : M) 2390b57cec5SDimitry Andric Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits(); 2400b57cec5SDimitry Andric return Features; 2410b57cec5SDimitry Andric } 2420b57cec5SDimitry Andric 2430b57cec5SDimitry Andric std::string getFeatureString(const FeatureBitset &Features) { 2440b57cec5SDimitry Andric std::string Ret; 2450b57cec5SDimitry Andric for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) { 2460b57cec5SDimitry Andric if (Features[KV.Value]) 2470b57cec5SDimitry Andric Ret += (StringRef("+") + KV.Key + ",").str(); 2480b57cec5SDimitry Andric } 2490b57cec5SDimitry Andric return Ret; 2500b57cec5SDimitry Andric } 2510b57cec5SDimitry Andric 2520b57cec5SDimitry Andric void replaceFeatures(Function &F, const std::string &Features) { 2530b57cec5SDimitry Andric F.removeFnAttr("target-features"); 2540b57cec5SDimitry Andric F.removeFnAttr("target-cpu"); 2550b57cec5SDimitry Andric F.addFnAttr("target-features", Features); 2560b57cec5SDimitry Andric } 2570b57cec5SDimitry Andric 2580b57cec5SDimitry Andric bool stripAtomics(Module &M) { 2590b57cec5SDimitry Andric // Detect whether any atomics will be lowered, since there is no way to tell 2600b57cec5SDimitry Andric // whether the LowerAtomic pass lowers e.g. stores. 2610b57cec5SDimitry Andric bool Stripped = false; 2620b57cec5SDimitry Andric for (auto &F : M) { 2630b57cec5SDimitry Andric for (auto &B : F) { 2640b57cec5SDimitry Andric for (auto &I : B) { 2650b57cec5SDimitry Andric if (I.isAtomic()) { 2660b57cec5SDimitry Andric Stripped = true; 2670b57cec5SDimitry Andric goto done; 2680b57cec5SDimitry Andric } 2690b57cec5SDimitry Andric } 2700b57cec5SDimitry Andric } 2710b57cec5SDimitry Andric } 2720b57cec5SDimitry Andric 2730b57cec5SDimitry Andric done: 2740b57cec5SDimitry Andric if (!Stripped) 2750b57cec5SDimitry Andric return false; 2760b57cec5SDimitry Andric 2770b57cec5SDimitry Andric LowerAtomicPass Lowerer; 2780b57cec5SDimitry Andric FunctionAnalysisManager FAM; 2790b57cec5SDimitry Andric for (auto &F : M) 2800b57cec5SDimitry Andric Lowerer.run(F, FAM); 2810b57cec5SDimitry Andric 2820b57cec5SDimitry Andric return true; 2830b57cec5SDimitry Andric } 2840b57cec5SDimitry Andric 2850b57cec5SDimitry Andric bool stripThreadLocals(Module &M) { 2860b57cec5SDimitry Andric bool Stripped = false; 2870b57cec5SDimitry Andric for (auto &GV : M.globals()) { 288e8d8bef9SDimitry Andric if (GV.isThreadLocal()) { 2890b57cec5SDimitry Andric Stripped = true; 290e8d8bef9SDimitry Andric GV.setThreadLocal(false); 2910b57cec5SDimitry Andric } 2920b57cec5SDimitry Andric } 2930b57cec5SDimitry Andric return Stripped; 2940b57cec5SDimitry Andric } 2950b57cec5SDimitry Andric 2960b57cec5SDimitry Andric void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) { 2970b57cec5SDimitry Andric for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) { 2985ffd83dbSDimitry Andric if (Features[KV.Value]) { 2995ffd83dbSDimitry Andric // Mark features as used 3000b57cec5SDimitry Andric std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str(); 3010b57cec5SDimitry Andric M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey, 3020b57cec5SDimitry Andric wasm::WASM_FEATURE_PREFIX_USED); 3030b57cec5SDimitry Andric } 3040b57cec5SDimitry Andric } 3055ffd83dbSDimitry Andric // Code compiled without atomics or bulk-memory may have had its atomics or 3065ffd83dbSDimitry Andric // thread-local data lowered to nonatomic operations or non-thread-local 3075ffd83dbSDimitry Andric // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed 3085ffd83dbSDimitry Andric // to tell the linker that it would be unsafe to allow this code ot be used 3095ffd83dbSDimitry Andric // in a module with shared memory. 3105ffd83dbSDimitry Andric if (Stripped) { 3115ffd83dbSDimitry Andric M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem", 3125ffd83dbSDimitry Andric wasm::WASM_FEATURE_PREFIX_DISALLOWED); 3135ffd83dbSDimitry Andric } 3140b57cec5SDimitry Andric } 3150b57cec5SDimitry Andric }; 3160b57cec5SDimitry Andric char CoalesceFeaturesAndStripAtomics::ID = 0; 3170b57cec5SDimitry Andric 3180b57cec5SDimitry Andric /// WebAssembly Code Generator Pass Configuration Options. 3190b57cec5SDimitry Andric class WebAssemblyPassConfig final : public TargetPassConfig { 3200b57cec5SDimitry Andric public: 3210b57cec5SDimitry Andric WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM) 3220b57cec5SDimitry Andric : TargetPassConfig(TM, PM) {} 3230b57cec5SDimitry Andric 3240b57cec5SDimitry Andric WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const { 3250b57cec5SDimitry Andric return getTM<WebAssemblyTargetMachine>(); 3260b57cec5SDimitry Andric } 3270b57cec5SDimitry Andric 3280b57cec5SDimitry Andric FunctionPass *createTargetRegisterAllocator(bool) override; 3290b57cec5SDimitry Andric 3300b57cec5SDimitry Andric void addIRPasses() override; 3310b57cec5SDimitry Andric bool addInstSelector() override; 3320b57cec5SDimitry Andric void addPostRegAlloc() override; 3330b57cec5SDimitry Andric bool addGCPasses() override { return false; } 3340b57cec5SDimitry Andric void addPreEmitPass() override; 3350b57cec5SDimitry Andric 3360b57cec5SDimitry Andric // No reg alloc 337e8d8bef9SDimitry Andric bool addRegAssignAndRewriteFast() override { return false; } 3380b57cec5SDimitry Andric 3390b57cec5SDimitry Andric // No reg alloc 340e8d8bef9SDimitry Andric bool addRegAssignAndRewriteOptimized() override { return false; } 3410b57cec5SDimitry Andric }; 3420b57cec5SDimitry Andric } // end anonymous namespace 3430b57cec5SDimitry Andric 3440b57cec5SDimitry Andric TargetTransformInfo 3450b57cec5SDimitry Andric WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) { 3460b57cec5SDimitry Andric return TargetTransformInfo(WebAssemblyTTIImpl(this, F)); 3470b57cec5SDimitry Andric } 3480b57cec5SDimitry Andric 3490b57cec5SDimitry Andric TargetPassConfig * 3500b57cec5SDimitry Andric WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) { 3510b57cec5SDimitry Andric return new WebAssemblyPassConfig(*this, PM); 3520b57cec5SDimitry Andric } 3530b57cec5SDimitry Andric 3540b57cec5SDimitry Andric FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) { 3550b57cec5SDimitry Andric return nullptr; // No reg alloc 3560b57cec5SDimitry Andric } 3570b57cec5SDimitry Andric 3580b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 3590b57cec5SDimitry Andric // The following functions are called from lib/CodeGen/Passes.cpp to modify 3600b57cec5SDimitry Andric // the CodeGen pass sequence. 3610b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 3620b57cec5SDimitry Andric 3630b57cec5SDimitry Andric void WebAssemblyPassConfig::addIRPasses() { 364e8d8bef9SDimitry Andric // Lower atomics and TLS if necessary 3650b57cec5SDimitry Andric addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine())); 3660b57cec5SDimitry Andric 3670b57cec5SDimitry Andric // This is a no-op if atomics are not used in the module 3680b57cec5SDimitry Andric addPass(createAtomicExpandPass()); 3690b57cec5SDimitry Andric 3700b57cec5SDimitry Andric // Add signatures to prototype-less function declarations 3710b57cec5SDimitry Andric addPass(createWebAssemblyAddMissingPrototypes()); 3720b57cec5SDimitry Andric 3730b57cec5SDimitry Andric // Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls. 3740b57cec5SDimitry Andric addPass(createWebAssemblyLowerGlobalDtors()); 3750b57cec5SDimitry Andric 3760b57cec5SDimitry Andric // Fix function bitcasts, as WebAssembly requires caller and callee signatures 3770b57cec5SDimitry Andric // to match. 3780b57cec5SDimitry Andric addPass(createWebAssemblyFixFunctionBitcasts()); 3790b57cec5SDimitry Andric 3800b57cec5SDimitry Andric // Optimize "returned" function attributes. 3810b57cec5SDimitry Andric if (getOptLevel() != CodeGenOpt::None) 3820b57cec5SDimitry Andric addPass(createWebAssemblyOptimizeReturned()); 3830b57cec5SDimitry Andric 3840b57cec5SDimitry Andric // If exception handling is not enabled and setjmp/longjmp handling is 3850b57cec5SDimitry Andric // enabled, we lower invokes into calls and delete unreachable landingpad 3860b57cec5SDimitry Andric // blocks. Lowering invokes when there is no EH support is done in 3870b57cec5SDimitry Andric // TargetPassConfig::addPassesToHandleExceptions, but this runs after this 3880b57cec5SDimitry Andric // function and SjLj handling expects all invokes to be lowered before. 3890b57cec5SDimitry Andric if (!EnableEmException && 3900b57cec5SDimitry Andric TM->Options.ExceptionModel == ExceptionHandling::None) { 3910b57cec5SDimitry Andric addPass(createLowerInvokePass()); 3920b57cec5SDimitry Andric // The lower invoke pass may create unreachable code. Remove it in order not 3930b57cec5SDimitry Andric // to process dead blocks in setjmp/longjmp handling. 3940b57cec5SDimitry Andric addPass(createUnreachableBlockEliminationPass()); 3950b57cec5SDimitry Andric } 3960b57cec5SDimitry Andric 3970b57cec5SDimitry Andric // Handle exceptions and setjmp/longjmp if enabled. 3980b57cec5SDimitry Andric if (EnableEmException || EnableEmSjLj) 3990b57cec5SDimitry Andric addPass(createWebAssemblyLowerEmscriptenEHSjLj(EnableEmException, 4000b57cec5SDimitry Andric EnableEmSjLj)); 4010b57cec5SDimitry Andric 4020b57cec5SDimitry Andric // Expand indirectbr instructions to switches. 4030b57cec5SDimitry Andric addPass(createIndirectBrExpandPass()); 4040b57cec5SDimitry Andric 4050b57cec5SDimitry Andric TargetPassConfig::addIRPasses(); 4060b57cec5SDimitry Andric } 4070b57cec5SDimitry Andric 4080b57cec5SDimitry Andric bool WebAssemblyPassConfig::addInstSelector() { 4090b57cec5SDimitry Andric (void)TargetPassConfig::addInstSelector(); 4100b57cec5SDimitry Andric addPass( 4110b57cec5SDimitry Andric createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel())); 4120b57cec5SDimitry Andric // Run the argument-move pass immediately after the ScheduleDAG scheduler 4130b57cec5SDimitry Andric // so that we can fix up the ARGUMENT instructions before anything else 4140b57cec5SDimitry Andric // sees them in the wrong place. 4150b57cec5SDimitry Andric addPass(createWebAssemblyArgumentMove()); 4160b57cec5SDimitry Andric // Set the p2align operands. This information is present during ISel, however 4170b57cec5SDimitry Andric // it's inconvenient to collect. Collect it now, and update the immediate 4180b57cec5SDimitry Andric // operands. 4190b57cec5SDimitry Andric addPass(createWebAssemblySetP2AlignOperands()); 4205ffd83dbSDimitry Andric 4215ffd83dbSDimitry Andric // Eliminate range checks and add default targets to br_table instructions. 4225ffd83dbSDimitry Andric addPass(createWebAssemblyFixBrTableDefaults()); 4235ffd83dbSDimitry Andric 4240b57cec5SDimitry Andric return false; 4250b57cec5SDimitry Andric } 4260b57cec5SDimitry Andric 4270b57cec5SDimitry Andric void WebAssemblyPassConfig::addPostRegAlloc() { 4280b57cec5SDimitry Andric // TODO: The following CodeGen passes don't currently support code containing 4290b57cec5SDimitry Andric // virtual registers. Consider removing their restrictions and re-enabling 4300b57cec5SDimitry Andric // them. 4310b57cec5SDimitry Andric 4320b57cec5SDimitry Andric // These functions all require the NoVRegs property. 4330b57cec5SDimitry Andric disablePass(&MachineCopyPropagationID); 4340b57cec5SDimitry Andric disablePass(&PostRAMachineSinkingID); 4350b57cec5SDimitry Andric disablePass(&PostRASchedulerID); 4360b57cec5SDimitry Andric disablePass(&FuncletLayoutID); 4370b57cec5SDimitry Andric disablePass(&StackMapLivenessID); 4380b57cec5SDimitry Andric disablePass(&LiveDebugValuesID); 4390b57cec5SDimitry Andric disablePass(&PatchableFunctionID); 4400b57cec5SDimitry Andric disablePass(&ShrinkWrapID); 4410b57cec5SDimitry Andric 4420b57cec5SDimitry Andric // This pass hurts code size for wasm because it can generate irreducible 4430b57cec5SDimitry Andric // control flow. 4440b57cec5SDimitry Andric disablePass(&MachineBlockPlacementID); 4450b57cec5SDimitry Andric 4460b57cec5SDimitry Andric TargetPassConfig::addPostRegAlloc(); 4470b57cec5SDimitry Andric } 4480b57cec5SDimitry Andric 4490b57cec5SDimitry Andric void WebAssemblyPassConfig::addPreEmitPass() { 4500b57cec5SDimitry Andric TargetPassConfig::addPreEmitPass(); 4510b57cec5SDimitry Andric 452*fe6060f1SDimitry Andric // Nullify DBG_VALUE_LISTs that we cannot handle. 453*fe6060f1SDimitry Andric addPass(createWebAssemblyNullifyDebugValueLists()); 454*fe6060f1SDimitry Andric 4550b57cec5SDimitry Andric // Eliminate multiple-entry loops. 4560b57cec5SDimitry Andric addPass(createWebAssemblyFixIrreducibleControlFlow()); 4570b57cec5SDimitry Andric 4580b57cec5SDimitry Andric // Do various transformations for exception handling. 4590b57cec5SDimitry Andric // Every CFG-changing optimizations should come before this. 460e8d8bef9SDimitry Andric if (TM->Options.ExceptionModel == ExceptionHandling::Wasm) 4610b57cec5SDimitry Andric addPass(createWebAssemblyLateEHPrepare()); 4620b57cec5SDimitry Andric 4630b57cec5SDimitry Andric // Now that we have a prologue and epilogue and all frame indices are 4640b57cec5SDimitry Andric // rewritten, eliminate SP and FP. This allows them to be stackified, 4650b57cec5SDimitry Andric // colored, and numbered with the rest of the registers. 4660b57cec5SDimitry Andric addPass(createWebAssemblyReplacePhysRegs()); 4670b57cec5SDimitry Andric 4680b57cec5SDimitry Andric // Preparations and optimizations related to register stackification. 4690b57cec5SDimitry Andric if (getOptLevel() != CodeGenOpt::None) { 4700b57cec5SDimitry Andric // LiveIntervals isn't commonly run this late. Re-establish preconditions. 4710b57cec5SDimitry Andric addPass(createWebAssemblyPrepareForLiveIntervals()); 4720b57cec5SDimitry Andric 4730b57cec5SDimitry Andric // Depend on LiveIntervals and perform some optimizations on it. 4740b57cec5SDimitry Andric addPass(createWebAssemblyOptimizeLiveIntervals()); 4750b57cec5SDimitry Andric 4760b57cec5SDimitry Andric // Prepare memory intrinsic calls for register stackifying. 4770b57cec5SDimitry Andric addPass(createWebAssemblyMemIntrinsicResults()); 4780b57cec5SDimitry Andric 4790b57cec5SDimitry Andric // Mark registers as representing wasm's value stack. This is a key 4800b57cec5SDimitry Andric // code-compression technique in WebAssembly. We run this pass (and 4810b57cec5SDimitry Andric // MemIntrinsicResults above) very late, so that it sees as much code as 4820b57cec5SDimitry Andric // possible, including code emitted by PEI and expanded by late tail 4830b57cec5SDimitry Andric // duplication. 4840b57cec5SDimitry Andric addPass(createWebAssemblyRegStackify()); 4850b57cec5SDimitry Andric 4860b57cec5SDimitry Andric // Run the register coloring pass to reduce the total number of registers. 4870b57cec5SDimitry Andric // This runs after stackification so that it doesn't consider registers 4880b57cec5SDimitry Andric // that become stackified. 4890b57cec5SDimitry Andric addPass(createWebAssemblyRegColoring()); 4900b57cec5SDimitry Andric } 4910b57cec5SDimitry Andric 4920b57cec5SDimitry Andric // Sort the blocks of the CFG into topological order, a prerequisite for 4930b57cec5SDimitry Andric // BLOCK and LOOP markers. 4940b57cec5SDimitry Andric addPass(createWebAssemblyCFGSort()); 4950b57cec5SDimitry Andric 4960b57cec5SDimitry Andric // Insert BLOCK and LOOP markers. 4970b57cec5SDimitry Andric addPass(createWebAssemblyCFGStackify()); 4980b57cec5SDimitry Andric 4990b57cec5SDimitry Andric // Insert explicit local.get and local.set operators. 5005ffd83dbSDimitry Andric if (!WasmDisableExplicitLocals) 5010b57cec5SDimitry Andric addPass(createWebAssemblyExplicitLocals()); 5020b57cec5SDimitry Andric 5030b57cec5SDimitry Andric // Lower br_unless into br_if. 5040b57cec5SDimitry Andric addPass(createWebAssemblyLowerBrUnless()); 5050b57cec5SDimitry Andric 5060b57cec5SDimitry Andric // Perform the very last peephole optimizations on the code. 5070b57cec5SDimitry Andric if (getOptLevel() != CodeGenOpt::None) 5080b57cec5SDimitry Andric addPass(createWebAssemblyPeephole()); 5090b57cec5SDimitry Andric 5100b57cec5SDimitry Andric // Create a mapping from LLVM CodeGen virtual registers to wasm registers. 5110b57cec5SDimitry Andric addPass(createWebAssemblyRegNumbering()); 5125ffd83dbSDimitry Andric 5135ffd83dbSDimitry Andric // Fix debug_values whose defs have been stackified. 5145ffd83dbSDimitry Andric if (!WasmDisableExplicitLocals) 5155ffd83dbSDimitry Andric addPass(createWebAssemblyDebugFixup()); 516*fe6060f1SDimitry Andric 517*fe6060f1SDimitry Andric // Collect information to prepare for MC lowering / asm printing. 518*fe6060f1SDimitry Andric addPass(createWebAssemblyMCLowerPrePass()); 5190b57cec5SDimitry Andric } 5200b57cec5SDimitry Andric 5210b57cec5SDimitry Andric yaml::MachineFunctionInfo * 5220b57cec5SDimitry Andric WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const { 5230b57cec5SDimitry Andric return new yaml::WebAssemblyFunctionInfo(); 5240b57cec5SDimitry Andric } 5250b57cec5SDimitry Andric 5260b57cec5SDimitry Andric yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML( 5270b57cec5SDimitry Andric const MachineFunction &MF) const { 5280b57cec5SDimitry Andric const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>(); 5290b57cec5SDimitry Andric return new yaml::WebAssemblyFunctionInfo(*MFI); 5300b57cec5SDimitry Andric } 5310b57cec5SDimitry Andric 5320b57cec5SDimitry Andric bool WebAssemblyTargetMachine::parseMachineFunctionInfo( 5330b57cec5SDimitry Andric const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS, 5340b57cec5SDimitry Andric SMDiagnostic &Error, SMRange &SourceRange) const { 5350b57cec5SDimitry Andric const auto &YamlMFI = 5360b57cec5SDimitry Andric reinterpret_cast<const yaml::WebAssemblyFunctionInfo &>(MFI); 5370b57cec5SDimitry Andric MachineFunction &MF = PFS.MF; 5380b57cec5SDimitry Andric MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(YamlMFI); 5390b57cec5SDimitry Andric return false; 5400b57cec5SDimitry Andric } 541