xref: /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp (revision 81ad626541db97eb356e2c1d4a20eb2a26a766ab)
10b57cec5SDimitry Andric //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric ///
90b57cec5SDimitry Andric /// \file
100b57cec5SDimitry Andric /// This file defines the WebAssembly-specific subclass of TargetMachine.
110b57cec5SDimitry Andric ///
120b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
130b57cec5SDimitry Andric 
140b57cec5SDimitry Andric #include "WebAssemblyTargetMachine.h"
150b57cec5SDimitry Andric #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
160b57cec5SDimitry Andric #include "TargetInfo/WebAssemblyTargetInfo.h"
170eae32dcSDimitry Andric #include "Utils/WebAssemblyUtilities.h"
180b57cec5SDimitry Andric #include "WebAssembly.h"
190b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h"
200b57cec5SDimitry Andric #include "WebAssemblyTargetObjectFile.h"
210b57cec5SDimitry Andric #include "WebAssemblyTargetTransformInfo.h"
220b57cec5SDimitry Andric #include "llvm/CodeGen/MIRParser/MIParser.h"
230b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunctionPass.h"
240b57cec5SDimitry Andric #include "llvm/CodeGen/Passes.h"
250b57cec5SDimitry Andric #include "llvm/CodeGen/RegAllocRegistry.h"
260b57cec5SDimitry Andric #include "llvm/CodeGen/TargetPassConfig.h"
270b57cec5SDimitry Andric #include "llvm/IR/Function.h"
28*81ad6265SDimitry Andric #include "llvm/InitializePasses.h"
290eae32dcSDimitry Andric #include "llvm/MC/MCAsmInfo.h"
30349cc55cSDimitry Andric #include "llvm/MC/TargetRegistry.h"
310b57cec5SDimitry Andric #include "llvm/Target/TargetOptions.h"
320b57cec5SDimitry Andric #include "llvm/Transforms/Scalar.h"
33*81ad6265SDimitry Andric #include "llvm/Transforms/Scalar/LowerAtomicPass.h"
340b57cec5SDimitry Andric #include "llvm/Transforms/Utils.h"
350b57cec5SDimitry Andric using namespace llvm;
360b57cec5SDimitry Andric 
370b57cec5SDimitry Andric #define DEBUG_TYPE "wasm"
380b57cec5SDimitry Andric 
395ffd83dbSDimitry Andric // A command-line option to keep implicit locals
405ffd83dbSDimitry Andric // for the purpose of testing with lit/llc ONLY.
415ffd83dbSDimitry Andric // This produces output which is not valid WebAssembly, and is not supported
425ffd83dbSDimitry Andric // by assemblers/disassemblers and other MC based tools.
435ffd83dbSDimitry Andric static cl::opt<bool> WasmDisableExplicitLocals(
445ffd83dbSDimitry Andric     "wasm-disable-explicit-locals", cl::Hidden,
455ffd83dbSDimitry Andric     cl::desc("WebAssembly: output implicit locals in"
465ffd83dbSDimitry Andric              " instruction output for test purposes only."),
475ffd83dbSDimitry Andric     cl::init(false));
485ffd83dbSDimitry Andric 
49480093f4SDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() {
500b57cec5SDimitry Andric   // Register the target.
510b57cec5SDimitry Andric   RegisterTargetMachine<WebAssemblyTargetMachine> X(
520b57cec5SDimitry Andric       getTheWebAssemblyTarget32());
530b57cec5SDimitry Andric   RegisterTargetMachine<WebAssemblyTargetMachine> Y(
540b57cec5SDimitry Andric       getTheWebAssemblyTarget64());
550b57cec5SDimitry Andric 
560b57cec5SDimitry Andric   // Register backend passes
570b57cec5SDimitry Andric   auto &PR = *PassRegistry::getPassRegistry();
580b57cec5SDimitry Andric   initializeWebAssemblyAddMissingPrototypesPass(PR);
590b57cec5SDimitry Andric   initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
60*81ad6265SDimitry Andric   initializeLowerGlobalDtorsLegacyPassPass(PR);
610b57cec5SDimitry Andric   initializeFixFunctionBitcastsPass(PR);
620b57cec5SDimitry Andric   initializeOptimizeReturnedPass(PR);
630b57cec5SDimitry Andric   initializeWebAssemblyArgumentMovePass(PR);
640b57cec5SDimitry Andric   initializeWebAssemblySetP2AlignOperandsPass(PR);
650b57cec5SDimitry Andric   initializeWebAssemblyReplacePhysRegsPass(PR);
660b57cec5SDimitry Andric   initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
670b57cec5SDimitry Andric   initializeWebAssemblyMemIntrinsicResultsPass(PR);
680b57cec5SDimitry Andric   initializeWebAssemblyRegStackifyPass(PR);
690b57cec5SDimitry Andric   initializeWebAssemblyRegColoringPass(PR);
70fe6060f1SDimitry Andric   initializeWebAssemblyNullifyDebugValueListsPass(PR);
710b57cec5SDimitry Andric   initializeWebAssemblyFixIrreducibleControlFlowPass(PR);
720b57cec5SDimitry Andric   initializeWebAssemblyLateEHPreparePass(PR);
730b57cec5SDimitry Andric   initializeWebAssemblyExceptionInfoPass(PR);
740b57cec5SDimitry Andric   initializeWebAssemblyCFGSortPass(PR);
750b57cec5SDimitry Andric   initializeWebAssemblyCFGStackifyPass(PR);
760b57cec5SDimitry Andric   initializeWebAssemblyExplicitLocalsPass(PR);
770b57cec5SDimitry Andric   initializeWebAssemblyLowerBrUnlessPass(PR);
780b57cec5SDimitry Andric   initializeWebAssemblyRegNumberingPass(PR);
795ffd83dbSDimitry Andric   initializeWebAssemblyDebugFixupPass(PR);
800b57cec5SDimitry Andric   initializeWebAssemblyPeepholePass(PR);
81fe6060f1SDimitry Andric   initializeWebAssemblyMCLowerPrePassPass(PR);
820b57cec5SDimitry Andric }
830b57cec5SDimitry Andric 
840b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
850b57cec5SDimitry Andric // WebAssembly Lowering public interface.
860b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
870b57cec5SDimitry Andric 
880b57cec5SDimitry Andric static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM,
890b57cec5SDimitry Andric                                            const Triple &TT) {
90*81ad6265SDimitry Andric   if (!RM) {
910b57cec5SDimitry Andric     // Default to static relocation model.  This should always be more optimial
920b57cec5SDimitry Andric     // than PIC since the static linker can determine all global addresses and
930b57cec5SDimitry Andric     // assume direct function calls.
940b57cec5SDimitry Andric     return Reloc::Static;
950b57cec5SDimitry Andric   }
960b57cec5SDimitry Andric 
970b57cec5SDimitry Andric   if (!TT.isOSEmscripten()) {
980b57cec5SDimitry Andric     // Relocation modes other than static are currently implemented in a way
990b57cec5SDimitry Andric     // that only works for Emscripten, so disable them if we aren't targeting
1000b57cec5SDimitry Andric     // Emscripten.
1010b57cec5SDimitry Andric     return Reloc::Static;
1020b57cec5SDimitry Andric   }
1030b57cec5SDimitry Andric 
1040b57cec5SDimitry Andric   return *RM;
1050b57cec5SDimitry Andric }
1060b57cec5SDimitry Andric 
1070b57cec5SDimitry Andric /// Create an WebAssembly architecture model.
1080b57cec5SDimitry Andric ///
1090b57cec5SDimitry Andric WebAssemblyTargetMachine::WebAssemblyTargetMachine(
1100b57cec5SDimitry Andric     const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
1110b57cec5SDimitry Andric     const TargetOptions &Options, Optional<Reloc::Model> RM,
1120b57cec5SDimitry Andric     Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
113fe6060f1SDimitry Andric     : LLVMTargetMachine(
114fe6060f1SDimitry Andric           T,
115fe6060f1SDimitry Andric           TT.isArch64Bit()
116349cc55cSDimitry Andric               ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
117349cc55cSDimitry Andric                                        "f128:64-n32:64-S128-ni:1:10:20"
118349cc55cSDimitry Andric                                      : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
119349cc55cSDimitry Andric                                        "n32:64-S128-ni:1:10:20")
120349cc55cSDimitry Andric               : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
121349cc55cSDimitry Andric                                        "f128:64-n32:64-S128-ni:1:10:20"
122349cc55cSDimitry Andric                                      : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
123349cc55cSDimitry Andric                                        "n32:64-S128-ni:1:10:20"),
1240b57cec5SDimitry Andric           TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
1250b57cec5SDimitry Andric           getEffectiveCodeModel(CM, CodeModel::Large), OL),
1260b57cec5SDimitry Andric       TLOF(new WebAssemblyTargetObjectFile()) {
1270b57cec5SDimitry Andric   // WebAssembly type-checks instructions, but a noreturn function with a return
1280b57cec5SDimitry Andric   // type that doesn't match the context will cause a check failure. So we lower
1290b57cec5SDimitry Andric   // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
1300b57cec5SDimitry Andric   // 'unreachable' instructions which is meant for that case.
1310b57cec5SDimitry Andric   this->Options.TrapUnreachable = true;
1320b57cec5SDimitry Andric 
1330b57cec5SDimitry Andric   // WebAssembly treats each function as an independent unit. Force
1340b57cec5SDimitry Andric   // -ffunction-sections, effectively, so that we can emit them independently.
1350b57cec5SDimitry Andric   this->Options.FunctionSections = true;
1360b57cec5SDimitry Andric   this->Options.DataSections = true;
1370b57cec5SDimitry Andric   this->Options.UniqueSectionNames = true;
1380b57cec5SDimitry Andric 
1390b57cec5SDimitry Andric   initAsmInfo();
1400b57cec5SDimitry Andric 
1410b57cec5SDimitry Andric   // Note that we don't use setRequiresStructuredCFG(true). It disables
1420b57cec5SDimitry Andric   // optimizations than we're ok with, and want, such as critical edge
1430b57cec5SDimitry Andric   // splitting and tail merging.
1440b57cec5SDimitry Andric }
1450b57cec5SDimitry Andric 
1460b57cec5SDimitry Andric WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor.
1470b57cec5SDimitry Andric 
148e8d8bef9SDimitry Andric const WebAssemblySubtarget *WebAssemblyTargetMachine::getSubtargetImpl() const {
149e8d8bef9SDimitry Andric   return getSubtargetImpl(std::string(getTargetCPU()),
150e8d8bef9SDimitry Andric                           std::string(getTargetFeatureString()));
151e8d8bef9SDimitry Andric }
152e8d8bef9SDimitry Andric 
1530b57cec5SDimitry Andric const WebAssemblySubtarget *
1540b57cec5SDimitry Andric WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU,
1550b57cec5SDimitry Andric                                            std::string FS) const {
1560b57cec5SDimitry Andric   auto &I = SubtargetMap[CPU + FS];
1570b57cec5SDimitry Andric   if (!I) {
1588bcb0991SDimitry Andric     I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
1590b57cec5SDimitry Andric   }
1600b57cec5SDimitry Andric   return I.get();
1610b57cec5SDimitry Andric }
1620b57cec5SDimitry Andric 
1630b57cec5SDimitry Andric const WebAssemblySubtarget *
1640b57cec5SDimitry Andric WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
1650b57cec5SDimitry Andric   Attribute CPUAttr = F.getFnAttribute("target-cpu");
1660b57cec5SDimitry Andric   Attribute FSAttr = F.getFnAttribute("target-features");
1670b57cec5SDimitry Andric 
168e8d8bef9SDimitry Andric   std::string CPU =
169e8d8bef9SDimitry Andric       CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
170e8d8bef9SDimitry Andric   std::string FS =
171e8d8bef9SDimitry Andric       FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
1720b57cec5SDimitry Andric 
1730b57cec5SDimitry Andric   // This needs to be done before we create a new subtarget since any
1740b57cec5SDimitry Andric   // creation will depend on the TM and the code generation flags on the
1750b57cec5SDimitry Andric   // function that reside in TargetOptions.
1760b57cec5SDimitry Andric   resetTargetOptions(F);
1770b57cec5SDimitry Andric 
1780b57cec5SDimitry Andric   return getSubtargetImpl(CPU, FS);
1790b57cec5SDimitry Andric }
1800b57cec5SDimitry Andric 
1810b57cec5SDimitry Andric namespace {
1820b57cec5SDimitry Andric 
1830b57cec5SDimitry Andric class CoalesceFeaturesAndStripAtomics final : public ModulePass {
1840b57cec5SDimitry Andric   // Take the union of all features used in the module and use it for each
1850b57cec5SDimitry Andric   // function individually, since having multiple feature sets in one module
1860b57cec5SDimitry Andric   // currently does not make sense for WebAssembly. If atomics are not enabled,
1870b57cec5SDimitry Andric   // also strip atomic operations and thread local storage.
1880b57cec5SDimitry Andric   static char ID;
1890b57cec5SDimitry Andric   WebAssemblyTargetMachine *WasmTM;
1900b57cec5SDimitry Andric 
1910b57cec5SDimitry Andric public:
1920b57cec5SDimitry Andric   CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
1930b57cec5SDimitry Andric       : ModulePass(ID), WasmTM(WasmTM) {}
1940b57cec5SDimitry Andric 
1950b57cec5SDimitry Andric   bool runOnModule(Module &M) override {
1960b57cec5SDimitry Andric     FeatureBitset Features = coalesceFeatures(M);
1970b57cec5SDimitry Andric 
1980b57cec5SDimitry Andric     std::string FeatureStr = getFeatureString(Features);
199e8d8bef9SDimitry Andric     WasmTM->setTargetFeatureString(FeatureStr);
2000b57cec5SDimitry Andric     for (auto &F : M)
2010b57cec5SDimitry Andric       replaceFeatures(F, FeatureStr);
2020b57cec5SDimitry Andric 
2030b57cec5SDimitry Andric     bool StrippedAtomics = false;
2040b57cec5SDimitry Andric     bool StrippedTLS = false;
2050b57cec5SDimitry Andric 
206*81ad6265SDimitry Andric     if (!Features[WebAssembly::FeatureAtomics]) {
2070b57cec5SDimitry Andric       StrippedAtomics = stripAtomics(M);
2080b57cec5SDimitry Andric       StrippedTLS = stripThreadLocals(M);
209*81ad6265SDimitry Andric     } else if (!Features[WebAssembly::FeatureBulkMemory]) {
210*81ad6265SDimitry Andric       StrippedTLS |= stripThreadLocals(M);
211*81ad6265SDimitry Andric     }
2120b57cec5SDimitry Andric 
2130b57cec5SDimitry Andric     if (StrippedAtomics && !StrippedTLS)
2140b57cec5SDimitry Andric       stripThreadLocals(M);
2150b57cec5SDimitry Andric     else if (StrippedTLS && !StrippedAtomics)
2160b57cec5SDimitry Andric       stripAtomics(M);
2170b57cec5SDimitry Andric 
2180b57cec5SDimitry Andric     recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
2190b57cec5SDimitry Andric 
2200b57cec5SDimitry Andric     // Conservatively assume we have made some change
2210b57cec5SDimitry Andric     return true;
2220b57cec5SDimitry Andric   }
2230b57cec5SDimitry Andric 
2240b57cec5SDimitry Andric private:
2250b57cec5SDimitry Andric   FeatureBitset coalesceFeatures(const Module &M) {
2260b57cec5SDimitry Andric     FeatureBitset Features =
2270b57cec5SDimitry Andric         WasmTM
2285ffd83dbSDimitry Andric             ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
2295ffd83dbSDimitry Andric                                std::string(WasmTM->getTargetFeatureString()))
2300b57cec5SDimitry Andric             ->getFeatureBits();
2310b57cec5SDimitry Andric     for (auto &F : M)
2320b57cec5SDimitry Andric       Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
2330b57cec5SDimitry Andric     return Features;
2340b57cec5SDimitry Andric   }
2350b57cec5SDimitry Andric 
2360b57cec5SDimitry Andric   std::string getFeatureString(const FeatureBitset &Features) {
2370b57cec5SDimitry Andric     std::string Ret;
2380b57cec5SDimitry Andric     for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
2390b57cec5SDimitry Andric       if (Features[KV.Value])
2400b57cec5SDimitry Andric         Ret += (StringRef("+") + KV.Key + ",").str();
2410b57cec5SDimitry Andric     }
2420b57cec5SDimitry Andric     return Ret;
2430b57cec5SDimitry Andric   }
2440b57cec5SDimitry Andric 
2450b57cec5SDimitry Andric   void replaceFeatures(Function &F, const std::string &Features) {
2460b57cec5SDimitry Andric     F.removeFnAttr("target-features");
2470b57cec5SDimitry Andric     F.removeFnAttr("target-cpu");
2480b57cec5SDimitry Andric     F.addFnAttr("target-features", Features);
2490b57cec5SDimitry Andric   }
2500b57cec5SDimitry Andric 
2510b57cec5SDimitry Andric   bool stripAtomics(Module &M) {
2520b57cec5SDimitry Andric     // Detect whether any atomics will be lowered, since there is no way to tell
2530b57cec5SDimitry Andric     // whether the LowerAtomic pass lowers e.g. stores.
2540b57cec5SDimitry Andric     bool Stripped = false;
2550b57cec5SDimitry Andric     for (auto &F : M) {
2560b57cec5SDimitry Andric       for (auto &B : F) {
2570b57cec5SDimitry Andric         for (auto &I : B) {
2580b57cec5SDimitry Andric           if (I.isAtomic()) {
2590b57cec5SDimitry Andric             Stripped = true;
2600b57cec5SDimitry Andric             goto done;
2610b57cec5SDimitry Andric           }
2620b57cec5SDimitry Andric         }
2630b57cec5SDimitry Andric       }
2640b57cec5SDimitry Andric     }
2650b57cec5SDimitry Andric 
2660b57cec5SDimitry Andric   done:
2670b57cec5SDimitry Andric     if (!Stripped)
2680b57cec5SDimitry Andric       return false;
2690b57cec5SDimitry Andric 
2700b57cec5SDimitry Andric     LowerAtomicPass Lowerer;
2710b57cec5SDimitry Andric     FunctionAnalysisManager FAM;
2720b57cec5SDimitry Andric     for (auto &F : M)
2730b57cec5SDimitry Andric       Lowerer.run(F, FAM);
2740b57cec5SDimitry Andric 
2750b57cec5SDimitry Andric     return true;
2760b57cec5SDimitry Andric   }
2770b57cec5SDimitry Andric 
2780b57cec5SDimitry Andric   bool stripThreadLocals(Module &M) {
2790b57cec5SDimitry Andric     bool Stripped = false;
2800b57cec5SDimitry Andric     for (auto &GV : M.globals()) {
281e8d8bef9SDimitry Andric       if (GV.isThreadLocal()) {
2820b57cec5SDimitry Andric         Stripped = true;
283e8d8bef9SDimitry Andric         GV.setThreadLocal(false);
2840b57cec5SDimitry Andric       }
2850b57cec5SDimitry Andric     }
2860b57cec5SDimitry Andric     return Stripped;
2870b57cec5SDimitry Andric   }
2880b57cec5SDimitry Andric 
2890b57cec5SDimitry Andric   void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
2900b57cec5SDimitry Andric     for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
2915ffd83dbSDimitry Andric       if (Features[KV.Value]) {
2925ffd83dbSDimitry Andric         // Mark features as used
2930b57cec5SDimitry Andric         std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
2940b57cec5SDimitry Andric         M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
2950b57cec5SDimitry Andric                         wasm::WASM_FEATURE_PREFIX_USED);
2960b57cec5SDimitry Andric       }
2970b57cec5SDimitry Andric     }
2985ffd83dbSDimitry Andric     // Code compiled without atomics or bulk-memory may have had its atomics or
2995ffd83dbSDimitry Andric     // thread-local data lowered to nonatomic operations or non-thread-local
3005ffd83dbSDimitry Andric     // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
3015ffd83dbSDimitry Andric     // to tell the linker that it would be unsafe to allow this code ot be used
3025ffd83dbSDimitry Andric     // in a module with shared memory.
3035ffd83dbSDimitry Andric     if (Stripped) {
3045ffd83dbSDimitry Andric       M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
3055ffd83dbSDimitry Andric                       wasm::WASM_FEATURE_PREFIX_DISALLOWED);
3065ffd83dbSDimitry Andric     }
3070b57cec5SDimitry Andric   }
3080b57cec5SDimitry Andric };
3090b57cec5SDimitry Andric char CoalesceFeaturesAndStripAtomics::ID = 0;
3100b57cec5SDimitry Andric 
3110b57cec5SDimitry Andric /// WebAssembly Code Generator Pass Configuration Options.
3120b57cec5SDimitry Andric class WebAssemblyPassConfig final : public TargetPassConfig {
3130b57cec5SDimitry Andric public:
3140b57cec5SDimitry Andric   WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
3150b57cec5SDimitry Andric       : TargetPassConfig(TM, PM) {}
3160b57cec5SDimitry Andric 
3170b57cec5SDimitry Andric   WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
3180b57cec5SDimitry Andric     return getTM<WebAssemblyTargetMachine>();
3190b57cec5SDimitry Andric   }
3200b57cec5SDimitry Andric 
3210b57cec5SDimitry Andric   FunctionPass *createTargetRegisterAllocator(bool) override;
3220b57cec5SDimitry Andric 
3230b57cec5SDimitry Andric   void addIRPasses() override;
324*81ad6265SDimitry Andric   void addISelPrepare() override;
3250b57cec5SDimitry Andric   bool addInstSelector() override;
3260b57cec5SDimitry Andric   void addPostRegAlloc() override;
3270b57cec5SDimitry Andric   bool addGCPasses() override { return false; }
3280b57cec5SDimitry Andric   void addPreEmitPass() override;
329349cc55cSDimitry Andric   bool addPreISel() override;
3300b57cec5SDimitry Andric 
3310b57cec5SDimitry Andric   // No reg alloc
332e8d8bef9SDimitry Andric   bool addRegAssignAndRewriteFast() override { return false; }
3330b57cec5SDimitry Andric 
3340b57cec5SDimitry Andric   // No reg alloc
335e8d8bef9SDimitry Andric   bool addRegAssignAndRewriteOptimized() override { return false; }
3360b57cec5SDimitry Andric };
3370b57cec5SDimitry Andric } // end anonymous namespace
3380b57cec5SDimitry Andric 
3390b57cec5SDimitry Andric TargetTransformInfo
340*81ad6265SDimitry Andric WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) const {
3410b57cec5SDimitry Andric   return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
3420b57cec5SDimitry Andric }
3430b57cec5SDimitry Andric 
3440b57cec5SDimitry Andric TargetPassConfig *
3450b57cec5SDimitry Andric WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
3460b57cec5SDimitry Andric   return new WebAssemblyPassConfig(*this, PM);
3470b57cec5SDimitry Andric }
3480b57cec5SDimitry Andric 
3490b57cec5SDimitry Andric FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
3500b57cec5SDimitry Andric   return nullptr; // No reg alloc
3510b57cec5SDimitry Andric }
3520b57cec5SDimitry Andric 
3530eae32dcSDimitry Andric using WebAssembly::WasmEnableEH;
3540eae32dcSDimitry Andric using WebAssembly::WasmEnableEmEH;
3550eae32dcSDimitry Andric using WebAssembly::WasmEnableEmSjLj;
3560eae32dcSDimitry Andric using WebAssembly::WasmEnableSjLj;
3570eae32dcSDimitry Andric 
3580eae32dcSDimitry Andric static void basicCheckForEHAndSjLj(TargetMachine *TM) {
3590eae32dcSDimitry Andric   // Before checking, we make sure TargetOptions.ExceptionModel is the same as
3600eae32dcSDimitry Andric   // MCAsmInfo.ExceptionsType. Normally these have to be the same, because clang
3610eae32dcSDimitry Andric   // stores the exception model info in LangOptions, which is later transferred
3620eae32dcSDimitry Andric   // to TargetOptions and MCAsmInfo. But when clang compiles bitcode directly,
3630eae32dcSDimitry Andric   // clang's LangOptions is not used and thus the exception model info is not
3640eae32dcSDimitry Andric   // correctly transferred to TargetOptions and MCAsmInfo, so we make sure we
3650eae32dcSDimitry Andric   // have the correct exception model in in WebAssemblyMCAsmInfo constructor.
3660eae32dcSDimitry Andric   // But in this case TargetOptions is still not updated, so we make sure they
3670eae32dcSDimitry Andric   // are the same.
3680eae32dcSDimitry Andric   TM->Options.ExceptionModel = TM->getMCAsmInfo()->getExceptionHandlingType();
3690eae32dcSDimitry Andric 
3704824e7fdSDimitry Andric   // Basic Correctness checking related to -exception-model
371349cc55cSDimitry Andric   if (TM->Options.ExceptionModel != ExceptionHandling::None &&
372349cc55cSDimitry Andric       TM->Options.ExceptionModel != ExceptionHandling::Wasm)
373349cc55cSDimitry Andric     report_fatal_error("-exception-model should be either 'none' or 'wasm'");
374349cc55cSDimitry Andric   if (WasmEnableEmEH && TM->Options.ExceptionModel == ExceptionHandling::Wasm)
375349cc55cSDimitry Andric     report_fatal_error("-exception-model=wasm not allowed with "
376349cc55cSDimitry Andric                        "-enable-emscripten-cxx-exceptions");
377349cc55cSDimitry Andric   if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
378349cc55cSDimitry Andric     report_fatal_error(
379349cc55cSDimitry Andric         "-wasm-enable-eh only allowed with -exception-model=wasm");
380349cc55cSDimitry Andric   if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
381349cc55cSDimitry Andric     report_fatal_error(
382349cc55cSDimitry Andric         "-wasm-enable-sjlj only allowed with -exception-model=wasm");
383349cc55cSDimitry Andric   if ((!WasmEnableEH && !WasmEnableSjLj) &&
384349cc55cSDimitry Andric       TM->Options.ExceptionModel == ExceptionHandling::Wasm)
385349cc55cSDimitry Andric     report_fatal_error(
386349cc55cSDimitry Andric         "-exception-model=wasm only allowed with at least one of "
387349cc55cSDimitry Andric         "-wasm-enable-eh or -wasm-enable-sjj");
388349cc55cSDimitry Andric 
389349cc55cSDimitry Andric   // You can't enable two modes of EH at the same time
390349cc55cSDimitry Andric   if (WasmEnableEmEH && WasmEnableEH)
391349cc55cSDimitry Andric     report_fatal_error(
392349cc55cSDimitry Andric         "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-eh");
393349cc55cSDimitry Andric   // You can't enable two modes of SjLj at the same time
394349cc55cSDimitry Andric   if (WasmEnableEmSjLj && WasmEnableSjLj)
395349cc55cSDimitry Andric     report_fatal_error(
396349cc55cSDimitry Andric         "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
397349cc55cSDimitry Andric   // You can't mix Emscripten EH with Wasm SjLj.
398349cc55cSDimitry Andric   if (WasmEnableEmEH && WasmEnableSjLj)
399349cc55cSDimitry Andric     report_fatal_error(
400349cc55cSDimitry Andric         "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-sjlj");
401349cc55cSDimitry Andric   // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
402349cc55cSDimitry Andric   // measure, but some code will error out at compile time in this combination.
403349cc55cSDimitry Andric   // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
404349cc55cSDimitry Andric }
405349cc55cSDimitry Andric 
4060b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
4070b57cec5SDimitry Andric // The following functions are called from lib/CodeGen/Passes.cpp to modify
4080b57cec5SDimitry Andric // the CodeGen pass sequence.
4090b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
4100b57cec5SDimitry Andric 
4110b57cec5SDimitry Andric void WebAssemblyPassConfig::addIRPasses() {
4120b57cec5SDimitry Andric   // Add signatures to prototype-less function declarations
4130b57cec5SDimitry Andric   addPass(createWebAssemblyAddMissingPrototypes());
4140b57cec5SDimitry Andric 
4150b57cec5SDimitry Andric   // Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls.
416*81ad6265SDimitry Andric   addPass(createLowerGlobalDtorsLegacyPass());
4170b57cec5SDimitry Andric 
4180b57cec5SDimitry Andric   // Fix function bitcasts, as WebAssembly requires caller and callee signatures
4190b57cec5SDimitry Andric   // to match.
4200b57cec5SDimitry Andric   addPass(createWebAssemblyFixFunctionBitcasts());
4210b57cec5SDimitry Andric 
4220b57cec5SDimitry Andric   // Optimize "returned" function attributes.
4230b57cec5SDimitry Andric   if (getOptLevel() != CodeGenOpt::None)
4240b57cec5SDimitry Andric     addPass(createWebAssemblyOptimizeReturned());
4250b57cec5SDimitry Andric 
4264824e7fdSDimitry Andric   basicCheckForEHAndSjLj(TM);
427349cc55cSDimitry Andric 
4280b57cec5SDimitry Andric   // If exception handling is not enabled and setjmp/longjmp handling is
4290b57cec5SDimitry Andric   // enabled, we lower invokes into calls and delete unreachable landingpad
4300b57cec5SDimitry Andric   // blocks. Lowering invokes when there is no EH support is done in
431349cc55cSDimitry Andric   // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
432349cc55cSDimitry Andric   // passes and Emscripten SjLj handling expects all invokes to be lowered
433349cc55cSDimitry Andric   // before.
434349cc55cSDimitry Andric   if (!WasmEnableEmEH && !WasmEnableEH) {
4350b57cec5SDimitry Andric     addPass(createLowerInvokePass());
4360b57cec5SDimitry Andric     // The lower invoke pass may create unreachable code. Remove it in order not
4370b57cec5SDimitry Andric     // to process dead blocks in setjmp/longjmp handling.
4380b57cec5SDimitry Andric     addPass(createUnreachableBlockEliminationPass());
4390b57cec5SDimitry Andric   }
4400b57cec5SDimitry Andric 
441349cc55cSDimitry Andric   // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
442349cc55cSDimitry Andric   // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
443349cc55cSDimitry Andric   // transformation algorithms with Emscripten SjLj, so we run
444349cc55cSDimitry Andric   // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
445349cc55cSDimitry Andric   if (WasmEnableEmEH || WasmEnableEmSjLj || WasmEnableSjLj)
446349cc55cSDimitry Andric     addPass(createWebAssemblyLowerEmscriptenEHSjLj());
4470b57cec5SDimitry Andric 
4480b57cec5SDimitry Andric   // Expand indirectbr instructions to switches.
4490b57cec5SDimitry Andric   addPass(createIndirectBrExpandPass());
4500b57cec5SDimitry Andric 
4510b57cec5SDimitry Andric   TargetPassConfig::addIRPasses();
4520b57cec5SDimitry Andric }
4530b57cec5SDimitry Andric 
454*81ad6265SDimitry Andric void WebAssemblyPassConfig::addISelPrepare() {
455*81ad6265SDimitry Andric   // Lower atomics and TLS if necessary
456*81ad6265SDimitry Andric   addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
457*81ad6265SDimitry Andric 
458*81ad6265SDimitry Andric   // This is a no-op if atomics are not used in the module
459*81ad6265SDimitry Andric   addPass(createAtomicExpandPass());
460*81ad6265SDimitry Andric 
461*81ad6265SDimitry Andric   TargetPassConfig::addISelPrepare();
462*81ad6265SDimitry Andric }
463*81ad6265SDimitry Andric 
4640b57cec5SDimitry Andric bool WebAssemblyPassConfig::addInstSelector() {
4650b57cec5SDimitry Andric   (void)TargetPassConfig::addInstSelector();
4660b57cec5SDimitry Andric   addPass(
4670b57cec5SDimitry Andric       createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
4680b57cec5SDimitry Andric   // Run the argument-move pass immediately after the ScheduleDAG scheduler
4690b57cec5SDimitry Andric   // so that we can fix up the ARGUMENT instructions before anything else
4700b57cec5SDimitry Andric   // sees them in the wrong place.
4710b57cec5SDimitry Andric   addPass(createWebAssemblyArgumentMove());
4720b57cec5SDimitry Andric   // Set the p2align operands. This information is present during ISel, however
4730b57cec5SDimitry Andric   // it's inconvenient to collect. Collect it now, and update the immediate
4740b57cec5SDimitry Andric   // operands.
4750b57cec5SDimitry Andric   addPass(createWebAssemblySetP2AlignOperands());
4765ffd83dbSDimitry Andric 
4775ffd83dbSDimitry Andric   // Eliminate range checks and add default targets to br_table instructions.
4785ffd83dbSDimitry Andric   addPass(createWebAssemblyFixBrTableDefaults());
4795ffd83dbSDimitry Andric 
4800b57cec5SDimitry Andric   return false;
4810b57cec5SDimitry Andric }
4820b57cec5SDimitry Andric 
4830b57cec5SDimitry Andric void WebAssemblyPassConfig::addPostRegAlloc() {
4840b57cec5SDimitry Andric   // TODO: The following CodeGen passes don't currently support code containing
4850b57cec5SDimitry Andric   // virtual registers. Consider removing their restrictions and re-enabling
4860b57cec5SDimitry Andric   // them.
4870b57cec5SDimitry Andric 
4880b57cec5SDimitry Andric   // These functions all require the NoVRegs property.
4890b57cec5SDimitry Andric   disablePass(&MachineCopyPropagationID);
4900b57cec5SDimitry Andric   disablePass(&PostRAMachineSinkingID);
4910b57cec5SDimitry Andric   disablePass(&PostRASchedulerID);
4920b57cec5SDimitry Andric   disablePass(&FuncletLayoutID);
4930b57cec5SDimitry Andric   disablePass(&StackMapLivenessID);
4940b57cec5SDimitry Andric   disablePass(&LiveDebugValuesID);
4950b57cec5SDimitry Andric   disablePass(&PatchableFunctionID);
4960b57cec5SDimitry Andric   disablePass(&ShrinkWrapID);
4970b57cec5SDimitry Andric 
4980b57cec5SDimitry Andric   // This pass hurts code size for wasm because it can generate irreducible
4990b57cec5SDimitry Andric   // control flow.
5000b57cec5SDimitry Andric   disablePass(&MachineBlockPlacementID);
5010b57cec5SDimitry Andric 
5020b57cec5SDimitry Andric   TargetPassConfig::addPostRegAlloc();
5030b57cec5SDimitry Andric }
5040b57cec5SDimitry Andric 
5050b57cec5SDimitry Andric void WebAssemblyPassConfig::addPreEmitPass() {
5060b57cec5SDimitry Andric   TargetPassConfig::addPreEmitPass();
5070b57cec5SDimitry Andric 
508fe6060f1SDimitry Andric   // Nullify DBG_VALUE_LISTs that we cannot handle.
509fe6060f1SDimitry Andric   addPass(createWebAssemblyNullifyDebugValueLists());
510fe6060f1SDimitry Andric 
5110b57cec5SDimitry Andric   // Eliminate multiple-entry loops.
5120b57cec5SDimitry Andric   addPass(createWebAssemblyFixIrreducibleControlFlow());
5130b57cec5SDimitry Andric 
5140b57cec5SDimitry Andric   // Do various transformations for exception handling.
5150b57cec5SDimitry Andric   // Every CFG-changing optimizations should come before this.
516e8d8bef9SDimitry Andric   if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
5170b57cec5SDimitry Andric     addPass(createWebAssemblyLateEHPrepare());
5180b57cec5SDimitry Andric 
5190b57cec5SDimitry Andric   // Now that we have a prologue and epilogue and all frame indices are
5200b57cec5SDimitry Andric   // rewritten, eliminate SP and FP. This allows them to be stackified,
5210b57cec5SDimitry Andric   // colored, and numbered with the rest of the registers.
5220b57cec5SDimitry Andric   addPass(createWebAssemblyReplacePhysRegs());
5230b57cec5SDimitry Andric 
5240b57cec5SDimitry Andric   // Preparations and optimizations related to register stackification.
5250b57cec5SDimitry Andric   if (getOptLevel() != CodeGenOpt::None) {
5260b57cec5SDimitry Andric     // Depend on LiveIntervals and perform some optimizations on it.
5270b57cec5SDimitry Andric     addPass(createWebAssemblyOptimizeLiveIntervals());
5280b57cec5SDimitry Andric 
5290b57cec5SDimitry Andric     // Prepare memory intrinsic calls for register stackifying.
5300b57cec5SDimitry Andric     addPass(createWebAssemblyMemIntrinsicResults());
5310b57cec5SDimitry Andric 
5320b57cec5SDimitry Andric     // Mark registers as representing wasm's value stack. This is a key
5330b57cec5SDimitry Andric     // code-compression technique in WebAssembly. We run this pass (and
5340b57cec5SDimitry Andric     // MemIntrinsicResults above) very late, so that it sees as much code as
5350b57cec5SDimitry Andric     // possible, including code emitted by PEI and expanded by late tail
5360b57cec5SDimitry Andric     // duplication.
5370b57cec5SDimitry Andric     addPass(createWebAssemblyRegStackify());
5380b57cec5SDimitry Andric 
5390b57cec5SDimitry Andric     // Run the register coloring pass to reduce the total number of registers.
5400b57cec5SDimitry Andric     // This runs after stackification so that it doesn't consider registers
5410b57cec5SDimitry Andric     // that become stackified.
5420b57cec5SDimitry Andric     addPass(createWebAssemblyRegColoring());
5430b57cec5SDimitry Andric   }
5440b57cec5SDimitry Andric 
5450b57cec5SDimitry Andric   // Sort the blocks of the CFG into topological order, a prerequisite for
5460b57cec5SDimitry Andric   // BLOCK and LOOP markers.
5470b57cec5SDimitry Andric   addPass(createWebAssemblyCFGSort());
5480b57cec5SDimitry Andric 
5490b57cec5SDimitry Andric   // Insert BLOCK and LOOP markers.
5500b57cec5SDimitry Andric   addPass(createWebAssemblyCFGStackify());
5510b57cec5SDimitry Andric 
5520b57cec5SDimitry Andric   // Insert explicit local.get and local.set operators.
5535ffd83dbSDimitry Andric   if (!WasmDisableExplicitLocals)
5540b57cec5SDimitry Andric     addPass(createWebAssemblyExplicitLocals());
5550b57cec5SDimitry Andric 
5560b57cec5SDimitry Andric   // Lower br_unless into br_if.
5570b57cec5SDimitry Andric   addPass(createWebAssemblyLowerBrUnless());
5580b57cec5SDimitry Andric 
5590b57cec5SDimitry Andric   // Perform the very last peephole optimizations on the code.
5600b57cec5SDimitry Andric   if (getOptLevel() != CodeGenOpt::None)
5610b57cec5SDimitry Andric     addPass(createWebAssemblyPeephole());
5620b57cec5SDimitry Andric 
5630b57cec5SDimitry Andric   // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
5640b57cec5SDimitry Andric   addPass(createWebAssemblyRegNumbering());
5655ffd83dbSDimitry Andric 
5665ffd83dbSDimitry Andric   // Fix debug_values whose defs have been stackified.
5675ffd83dbSDimitry Andric   if (!WasmDisableExplicitLocals)
5685ffd83dbSDimitry Andric     addPass(createWebAssemblyDebugFixup());
569fe6060f1SDimitry Andric 
570fe6060f1SDimitry Andric   // Collect information to prepare for MC lowering / asm printing.
571fe6060f1SDimitry Andric   addPass(createWebAssemblyMCLowerPrePass());
5720b57cec5SDimitry Andric }
5730b57cec5SDimitry Andric 
574349cc55cSDimitry Andric bool WebAssemblyPassConfig::addPreISel() {
575349cc55cSDimitry Andric   TargetPassConfig::addPreISel();
576349cc55cSDimitry Andric   addPass(createWebAssemblyLowerRefTypesIntPtrConv());
577349cc55cSDimitry Andric   return false;
578349cc55cSDimitry Andric }
579349cc55cSDimitry Andric 
5800b57cec5SDimitry Andric yaml::MachineFunctionInfo *
5810b57cec5SDimitry Andric WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const {
5820b57cec5SDimitry Andric   return new yaml::WebAssemblyFunctionInfo();
5830b57cec5SDimitry Andric }
5840b57cec5SDimitry Andric 
5850b57cec5SDimitry Andric yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML(
5860b57cec5SDimitry Andric     const MachineFunction &MF) const {
5870b57cec5SDimitry Andric   const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
5880b57cec5SDimitry Andric   return new yaml::WebAssemblyFunctionInfo(*MFI);
5890b57cec5SDimitry Andric }
5900b57cec5SDimitry Andric 
5910b57cec5SDimitry Andric bool WebAssemblyTargetMachine::parseMachineFunctionInfo(
5920b57cec5SDimitry Andric     const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
5930b57cec5SDimitry Andric     SMDiagnostic &Error, SMRange &SourceRange) const {
594*81ad6265SDimitry Andric   const auto &YamlMFI = static_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
5950b57cec5SDimitry Andric   MachineFunction &MF = PFS.MF;
5960b57cec5SDimitry Andric   MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
5970b57cec5SDimitry Andric   return false;
5980b57cec5SDimitry Andric }
599