xref: /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp (revision d4eeb02986980bf33dd56c41ceb9fc5f180c0d47)
1 //===-- WebAssemblySubtarget.cpp - WebAssembly Subtarget Information ------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file implements the WebAssembly-specific subclass of
11 /// TargetSubtarget.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "WebAssemblySubtarget.h"
16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
17 #include "WebAssemblyInstrInfo.h"
18 #include "llvm/MC/TargetRegistry.h"
19 using namespace llvm;
20 
21 #define DEBUG_TYPE "wasm-subtarget"
22 
23 #define GET_SUBTARGETINFO_CTOR
24 #define GET_SUBTARGETINFO_TARGET_DESC
25 #include "WebAssemblyGenSubtargetInfo.inc"
26 
27 WebAssemblySubtarget &
28 WebAssemblySubtarget::initializeSubtargetDependencies(StringRef CPU,
29                                                       StringRef FS) {
30   // Determine default and user-specified characteristics
31   LLVM_DEBUG(llvm::dbgs() << "initializeSubtargetDependencies\n");
32 
33   if (CPU.empty())
34     CPU = "generic";
35 
36   ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS);
37   return *this;
38 }
39 
40 WebAssemblySubtarget::WebAssemblySubtarget(const Triple &TT,
41                                            const std::string &CPU,
42                                            const std::string &FS,
43                                            const TargetMachine &TM)
44     : WebAssemblyGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
45       TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
46       TLInfo(TM, *this) {}
47 
48 bool WebAssemblySubtarget::enableAtomicExpand() const {
49   // If atomics are disabled, atomic ops are lowered instead of expanded
50   return hasAtomics();
51 }
52 
53 bool WebAssemblySubtarget::enableMachineScheduler() const {
54   // Disable the MachineScheduler for now. Even with ShouldTrackPressure set and
55   // enableMachineSchedDefaultSched overridden, it appears to have an overall
56   // negative effect for the kinds of register optimizations we're doing.
57   return false;
58 }
59 
60 bool WebAssemblySubtarget::useAA() const { return true; }
61