10b57cec5SDimitry Andric // WebAssemblyMCInstLower.cpp - Convert WebAssembly MachineInstr to an MCInst // 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric /// 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// This file contains code to lower WebAssembly MachineInstrs to their 110b57cec5SDimitry Andric /// corresponding MCInst records. 120b57cec5SDimitry Andric /// 130b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 140b57cec5SDimitry Andric 150b57cec5SDimitry Andric #include "WebAssemblyMCInstLower.h" 160b57cec5SDimitry Andric #include "WebAssemblyAsmPrinter.h" 170b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h" 180b57cec5SDimitry Andric #include "WebAssemblyRuntimeLibcallSignatures.h" 190b57cec5SDimitry Andric #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 200b57cec5SDimitry Andric #include "llvm/CodeGen/AsmPrinter.h" 210b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 220b57cec5SDimitry Andric #include "llvm/IR/Constants.h" 230b57cec5SDimitry Andric #include "llvm/MC/MCAsmInfo.h" 240b57cec5SDimitry Andric #include "llvm/MC/MCContext.h" 250b57cec5SDimitry Andric #include "llvm/MC/MCExpr.h" 260b57cec5SDimitry Andric #include "llvm/MC/MCInst.h" 270b57cec5SDimitry Andric #include "llvm/MC/MCSymbolWasm.h" 280b57cec5SDimitry Andric #include "llvm/Support/ErrorHandling.h" 290b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h" 300b57cec5SDimitry Andric using namespace llvm; 310b57cec5SDimitry Andric 320b57cec5SDimitry Andric // Defines llvm::WebAssembly::getStackOpcode to convert register instructions to 330b57cec5SDimitry Andric // stack instructions 340b57cec5SDimitry Andric #define GET_INSTRMAP_INFO 1 350b57cec5SDimitry Andric #include "WebAssemblyGenInstrInfo.inc" 360b57cec5SDimitry Andric 370b57cec5SDimitry Andric // This disables the removal of registers when lowering into MC, as required 380b57cec5SDimitry Andric // by some current tests. 390b57cec5SDimitry Andric cl::opt<bool> 400b57cec5SDimitry Andric WasmKeepRegisters("wasm-keep-registers", cl::Hidden, 410b57cec5SDimitry Andric cl::desc("WebAssembly: output stack registers in" 420b57cec5SDimitry Andric " instruction output for test purposes only."), 430b57cec5SDimitry Andric cl::init(false)); 440b57cec5SDimitry Andric 450b57cec5SDimitry Andric static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI); 460b57cec5SDimitry Andric 470b57cec5SDimitry Andric MCSymbol * 480b57cec5SDimitry Andric WebAssemblyMCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const { 490b57cec5SDimitry Andric const GlobalValue *Global = MO.getGlobal(); 500b57cec5SDimitry Andric auto *WasmSym = cast<MCSymbolWasm>(Printer.getSymbol(Global)); 510b57cec5SDimitry Andric 520b57cec5SDimitry Andric if (const auto *FuncTy = dyn_cast<FunctionType>(Global->getValueType())) { 530b57cec5SDimitry Andric const MachineFunction &MF = *MO.getParent()->getParent()->getParent(); 540b57cec5SDimitry Andric const TargetMachine &TM = MF.getTarget(); 550b57cec5SDimitry Andric const Function &CurrentFunc = MF.getFunction(); 560b57cec5SDimitry Andric 570b57cec5SDimitry Andric SmallVector<MVT, 1> ResultMVTs; 580b57cec5SDimitry Andric SmallVector<MVT, 4> ParamMVTs; 590b57cec5SDimitry Andric computeSignatureVTs(FuncTy, CurrentFunc, TM, ParamMVTs, ResultMVTs); 600b57cec5SDimitry Andric 610b57cec5SDimitry Andric auto Signature = signatureFromMVTs(ResultMVTs, ParamMVTs); 620b57cec5SDimitry Andric WasmSym->setSignature(Signature.get()); 630b57cec5SDimitry Andric Printer.addSignature(std::move(Signature)); 640b57cec5SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION); 650b57cec5SDimitry Andric } 660b57cec5SDimitry Andric 670b57cec5SDimitry Andric return WasmSym; 680b57cec5SDimitry Andric } 690b57cec5SDimitry Andric 700b57cec5SDimitry Andric MCSymbol *WebAssemblyMCInstLower::GetExternalSymbolSymbol( 710b57cec5SDimitry Andric const MachineOperand &MO) const { 720b57cec5SDimitry Andric const char *Name = MO.getSymbolName(); 730b57cec5SDimitry Andric auto *WasmSym = cast<MCSymbolWasm>(Printer.GetExternalSymbolSymbol(Name)); 740b57cec5SDimitry Andric const WebAssemblySubtarget &Subtarget = Printer.getSubtarget(); 750b57cec5SDimitry Andric 760b57cec5SDimitry Andric // Except for certain known symbols, all symbols used by CodeGen are 770b57cec5SDimitry Andric // functions. It's OK to hardcode knowledge of specific symbols here; this 780b57cec5SDimitry Andric // method is precisely there for fetching the signatures of known 790b57cec5SDimitry Andric // Clang-provided symbols. 800b57cec5SDimitry Andric if (strcmp(Name, "__stack_pointer") == 0 || strcmp(Name, "__tls_base") == 0 || 810b57cec5SDimitry Andric strcmp(Name, "__memory_base") == 0 || strcmp(Name, "__table_base") == 0 || 82*8bcb0991SDimitry Andric strcmp(Name, "__tls_size") == 0 || strcmp(Name, "__tls_align") == 0) { 830b57cec5SDimitry Andric bool Mutable = 840b57cec5SDimitry Andric strcmp(Name, "__stack_pointer") == 0 || strcmp(Name, "__tls_base") == 0; 850b57cec5SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_GLOBAL); 860b57cec5SDimitry Andric WasmSym->setGlobalType(wasm::WasmGlobalType{ 870b57cec5SDimitry Andric uint8_t(Subtarget.hasAddr64() ? wasm::WASM_TYPE_I64 880b57cec5SDimitry Andric : wasm::WASM_TYPE_I32), 890b57cec5SDimitry Andric Mutable}); 900b57cec5SDimitry Andric return WasmSym; 910b57cec5SDimitry Andric } 920b57cec5SDimitry Andric 930b57cec5SDimitry Andric SmallVector<wasm::ValType, 4> Returns; 940b57cec5SDimitry Andric SmallVector<wasm::ValType, 4> Params; 950b57cec5SDimitry Andric if (strcmp(Name, "__cpp_exception") == 0) { 960b57cec5SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_EVENT); 970b57cec5SDimitry Andric // We can't confirm its signature index for now because there can be 980b57cec5SDimitry Andric // imported exceptions. Set it to be 0 for now. 990b57cec5SDimitry Andric WasmSym->setEventType( 1000b57cec5SDimitry Andric {wasm::WASM_EVENT_ATTRIBUTE_EXCEPTION, /* SigIndex */ 0}); 1010b57cec5SDimitry Andric // We may have multiple C++ compilation units to be linked together, each of 1020b57cec5SDimitry Andric // which defines the exception symbol. To resolve them, we declare them as 1030b57cec5SDimitry Andric // weak. 1040b57cec5SDimitry Andric WasmSym->setWeak(true); 1050b57cec5SDimitry Andric WasmSym->setExternal(true); 1060b57cec5SDimitry Andric 1070b57cec5SDimitry Andric // All C++ exceptions are assumed to have a single i32 (for wasm32) or i64 1080b57cec5SDimitry Andric // (for wasm64) param type and void return type. The reaon is, all C++ 1090b57cec5SDimitry Andric // exception values are pointers, and to share the type section with 1100b57cec5SDimitry Andric // functions, exceptions are assumed to have void return type. 1110b57cec5SDimitry Andric Params.push_back(Subtarget.hasAddr64() ? wasm::ValType::I64 1120b57cec5SDimitry Andric : wasm::ValType::I32); 1130b57cec5SDimitry Andric } else { // Function symbols 1140b57cec5SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION); 1150b57cec5SDimitry Andric getLibcallSignature(Subtarget, Name, Returns, Params); 1160b57cec5SDimitry Andric } 1170b57cec5SDimitry Andric auto Signature = 118*8bcb0991SDimitry Andric std::make_unique<wasm::WasmSignature>(std::move(Returns), std::move(Params)); 1190b57cec5SDimitry Andric WasmSym->setSignature(Signature.get()); 1200b57cec5SDimitry Andric Printer.addSignature(std::move(Signature)); 1210b57cec5SDimitry Andric 1220b57cec5SDimitry Andric return WasmSym; 1230b57cec5SDimitry Andric } 1240b57cec5SDimitry Andric 1250b57cec5SDimitry Andric MCOperand WebAssemblyMCInstLower::lowerSymbolOperand(const MachineOperand &MO, 1260b57cec5SDimitry Andric MCSymbol *Sym) const { 1270b57cec5SDimitry Andric MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 1280b57cec5SDimitry Andric unsigned TargetFlags = MO.getTargetFlags(); 1290b57cec5SDimitry Andric 1300b57cec5SDimitry Andric switch (TargetFlags) { 1310b57cec5SDimitry Andric case WebAssemblyII::MO_NO_FLAG: 1320b57cec5SDimitry Andric break; 1330b57cec5SDimitry Andric case WebAssemblyII::MO_GOT: 1340b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_GOT; 1350b57cec5SDimitry Andric break; 1360b57cec5SDimitry Andric case WebAssemblyII::MO_MEMORY_BASE_REL: 1370b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_MBREL; 1380b57cec5SDimitry Andric break; 1390b57cec5SDimitry Andric case WebAssemblyII::MO_TABLE_BASE_REL: 1400b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_TBREL; 1410b57cec5SDimitry Andric break; 1420b57cec5SDimitry Andric default: 1430b57cec5SDimitry Andric llvm_unreachable("Unknown target flag on GV operand"); 1440b57cec5SDimitry Andric } 1450b57cec5SDimitry Andric 1460b57cec5SDimitry Andric const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Kind, Ctx); 1470b57cec5SDimitry Andric 1480b57cec5SDimitry Andric if (MO.getOffset() != 0) { 1490b57cec5SDimitry Andric const auto *WasmSym = cast<MCSymbolWasm>(Sym); 1500b57cec5SDimitry Andric if (TargetFlags == WebAssemblyII::MO_GOT) 1510b57cec5SDimitry Andric report_fatal_error("GOT symbol references do not support offsets"); 1520b57cec5SDimitry Andric if (WasmSym->isFunction()) 1530b57cec5SDimitry Andric report_fatal_error("Function addresses with offsets not supported"); 1540b57cec5SDimitry Andric if (WasmSym->isGlobal()) 1550b57cec5SDimitry Andric report_fatal_error("Global indexes with offsets not supported"); 1560b57cec5SDimitry Andric if (WasmSym->isEvent()) 1570b57cec5SDimitry Andric report_fatal_error("Event indexes with offsets not supported"); 1580b57cec5SDimitry Andric 1590b57cec5SDimitry Andric Expr = MCBinaryExpr::createAdd( 1600b57cec5SDimitry Andric Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx); 1610b57cec5SDimitry Andric } 1620b57cec5SDimitry Andric 1630b57cec5SDimitry Andric return MCOperand::createExpr(Expr); 1640b57cec5SDimitry Andric } 1650b57cec5SDimitry Andric 166*8bcb0991SDimitry Andric MCOperand WebAssemblyMCInstLower::lowerTypeIndexOperand( 167*8bcb0991SDimitry Andric SmallVector<wasm::ValType, 1> &&Returns, 168*8bcb0991SDimitry Andric SmallVector<wasm::ValType, 4> &&Params) const { 169*8bcb0991SDimitry Andric auto Signature = std::make_unique<wasm::WasmSignature>(std::move(Returns), 170*8bcb0991SDimitry Andric std::move(Params)); 171*8bcb0991SDimitry Andric MCSymbol *Sym = Printer.createTempSymbol("typeindex"); 172*8bcb0991SDimitry Andric auto *WasmSym = cast<MCSymbolWasm>(Sym); 173*8bcb0991SDimitry Andric WasmSym->setSignature(Signature.get()); 174*8bcb0991SDimitry Andric Printer.addSignature(std::move(Signature)); 175*8bcb0991SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION); 176*8bcb0991SDimitry Andric const MCExpr *Expr = 177*8bcb0991SDimitry Andric MCSymbolRefExpr::create(WasmSym, MCSymbolRefExpr::VK_WASM_TYPEINDEX, Ctx); 178*8bcb0991SDimitry Andric return MCOperand::createExpr(Expr); 179*8bcb0991SDimitry Andric } 180*8bcb0991SDimitry Andric 1810b57cec5SDimitry Andric // Return the WebAssembly type associated with the given register class. 1820b57cec5SDimitry Andric static wasm::ValType getType(const TargetRegisterClass *RC) { 1830b57cec5SDimitry Andric if (RC == &WebAssembly::I32RegClass) 1840b57cec5SDimitry Andric return wasm::ValType::I32; 1850b57cec5SDimitry Andric if (RC == &WebAssembly::I64RegClass) 1860b57cec5SDimitry Andric return wasm::ValType::I64; 1870b57cec5SDimitry Andric if (RC == &WebAssembly::F32RegClass) 1880b57cec5SDimitry Andric return wasm::ValType::F32; 1890b57cec5SDimitry Andric if (RC == &WebAssembly::F64RegClass) 1900b57cec5SDimitry Andric return wasm::ValType::F64; 1910b57cec5SDimitry Andric if (RC == &WebAssembly::V128RegClass) 1920b57cec5SDimitry Andric return wasm::ValType::V128; 1930b57cec5SDimitry Andric llvm_unreachable("Unexpected register class"); 1940b57cec5SDimitry Andric } 1950b57cec5SDimitry Andric 196*8bcb0991SDimitry Andric static void getFunctionReturns(const MachineInstr *MI, 197*8bcb0991SDimitry Andric SmallVectorImpl<wasm::ValType> &Returns) { 198*8bcb0991SDimitry Andric const Function &F = MI->getMF()->getFunction(); 199*8bcb0991SDimitry Andric const TargetMachine &TM = MI->getMF()->getTarget(); 200*8bcb0991SDimitry Andric Type *RetTy = F.getReturnType(); 201*8bcb0991SDimitry Andric SmallVector<MVT, 4> CallerRetTys; 202*8bcb0991SDimitry Andric computeLegalValueVTs(F, TM, RetTy, CallerRetTys); 203*8bcb0991SDimitry Andric valTypesFromMVTs(CallerRetTys, Returns); 204*8bcb0991SDimitry Andric } 205*8bcb0991SDimitry Andric 2060b57cec5SDimitry Andric void WebAssemblyMCInstLower::lower(const MachineInstr *MI, 2070b57cec5SDimitry Andric MCInst &OutMI) const { 2080b57cec5SDimitry Andric OutMI.setOpcode(MI->getOpcode()); 2090b57cec5SDimitry Andric 2100b57cec5SDimitry Andric const MCInstrDesc &Desc = MI->getDesc(); 2110b57cec5SDimitry Andric for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) { 2120b57cec5SDimitry Andric const MachineOperand &MO = MI->getOperand(I); 2130b57cec5SDimitry Andric 2140b57cec5SDimitry Andric MCOperand MCOp; 2150b57cec5SDimitry Andric switch (MO.getType()) { 2160b57cec5SDimitry Andric default: 2170b57cec5SDimitry Andric MI->print(errs()); 2180b57cec5SDimitry Andric llvm_unreachable("unknown operand type"); 2190b57cec5SDimitry Andric case MachineOperand::MO_MachineBasicBlock: 2200b57cec5SDimitry Andric MI->print(errs()); 2210b57cec5SDimitry Andric llvm_unreachable("MachineBasicBlock operand should have been rewritten"); 2220b57cec5SDimitry Andric case MachineOperand::MO_Register: { 2230b57cec5SDimitry Andric // Ignore all implicit register operands. 2240b57cec5SDimitry Andric if (MO.isImplicit()) 2250b57cec5SDimitry Andric continue; 2260b57cec5SDimitry Andric const WebAssemblyFunctionInfo &MFI = 2270b57cec5SDimitry Andric *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>(); 2280b57cec5SDimitry Andric unsigned WAReg = MFI.getWAReg(MO.getReg()); 2290b57cec5SDimitry Andric MCOp = MCOperand::createReg(WAReg); 2300b57cec5SDimitry Andric break; 2310b57cec5SDimitry Andric } 2320b57cec5SDimitry Andric case MachineOperand::MO_Immediate: 2330b57cec5SDimitry Andric if (I < Desc.NumOperands) { 2340b57cec5SDimitry Andric const MCOperandInfo &Info = Desc.OpInfo[I]; 2350b57cec5SDimitry Andric if (Info.OperandType == WebAssembly::OPERAND_TYPEINDEX) { 2360b57cec5SDimitry Andric SmallVector<wasm::ValType, 4> Returns; 2370b57cec5SDimitry Andric SmallVector<wasm::ValType, 4> Params; 2380b57cec5SDimitry Andric 2390b57cec5SDimitry Andric const MachineRegisterInfo &MRI = 2400b57cec5SDimitry Andric MI->getParent()->getParent()->getRegInfo(); 2410b57cec5SDimitry Andric for (const MachineOperand &MO : MI->defs()) 2420b57cec5SDimitry Andric Returns.push_back(getType(MRI.getRegClass(MO.getReg()))); 2430b57cec5SDimitry Andric for (const MachineOperand &MO : MI->explicit_uses()) 2440b57cec5SDimitry Andric if (MO.isReg()) 2450b57cec5SDimitry Andric Params.push_back(getType(MRI.getRegClass(MO.getReg()))); 2460b57cec5SDimitry Andric 2470b57cec5SDimitry Andric // call_indirect instructions have a callee operand at the end which 2480b57cec5SDimitry Andric // doesn't count as a param. 2490b57cec5SDimitry Andric if (WebAssembly::isCallIndirect(MI->getOpcode())) 2500b57cec5SDimitry Andric Params.pop_back(); 2510b57cec5SDimitry Andric 252*8bcb0991SDimitry Andric // return_call_indirect instructions have the return type of the 253*8bcb0991SDimitry Andric // caller 254*8bcb0991SDimitry Andric if (MI->getOpcode() == WebAssembly::RET_CALL_INDIRECT) 255*8bcb0991SDimitry Andric getFunctionReturns(MI, Returns); 2560b57cec5SDimitry Andric 257*8bcb0991SDimitry Andric MCOp = lowerTypeIndexOperand(std::move(Returns), std::move(Params)); 2580b57cec5SDimitry Andric break; 259*8bcb0991SDimitry Andric } else if (Info.OperandType == WebAssembly::OPERAND_SIGNATURE) { 260*8bcb0991SDimitry Andric auto BT = static_cast<WebAssembly::BlockType>(MO.getImm()); 261*8bcb0991SDimitry Andric assert(BT != WebAssembly::BlockType::Invalid); 262*8bcb0991SDimitry Andric if (BT == WebAssembly::BlockType::Multivalue) { 263*8bcb0991SDimitry Andric SmallVector<wasm::ValType, 1> Returns; 264*8bcb0991SDimitry Andric getFunctionReturns(MI, Returns); 265*8bcb0991SDimitry Andric MCOp = lowerTypeIndexOperand(std::move(Returns), 266*8bcb0991SDimitry Andric SmallVector<wasm::ValType, 4>()); 267*8bcb0991SDimitry Andric break; 268*8bcb0991SDimitry Andric } 2690b57cec5SDimitry Andric } 2700b57cec5SDimitry Andric } 2710b57cec5SDimitry Andric MCOp = MCOperand::createImm(MO.getImm()); 2720b57cec5SDimitry Andric break; 2730b57cec5SDimitry Andric case MachineOperand::MO_FPImmediate: { 2740b57cec5SDimitry Andric // TODO: MC converts all floating point immediate operands to double. 2750b57cec5SDimitry Andric // This is fine for numeric values, but may cause NaNs to change bits. 2760b57cec5SDimitry Andric const ConstantFP *Imm = MO.getFPImm(); 2770b57cec5SDimitry Andric if (Imm->getType()->isFloatTy()) 2780b57cec5SDimitry Andric MCOp = MCOperand::createFPImm(Imm->getValueAPF().convertToFloat()); 2790b57cec5SDimitry Andric else if (Imm->getType()->isDoubleTy()) 2800b57cec5SDimitry Andric MCOp = MCOperand::createFPImm(Imm->getValueAPF().convertToDouble()); 2810b57cec5SDimitry Andric else 2820b57cec5SDimitry Andric llvm_unreachable("unknown floating point immediate type"); 2830b57cec5SDimitry Andric break; 2840b57cec5SDimitry Andric } 2850b57cec5SDimitry Andric case MachineOperand::MO_GlobalAddress: 2860b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, GetGlobalAddressSymbol(MO)); 2870b57cec5SDimitry Andric break; 2880b57cec5SDimitry Andric case MachineOperand::MO_ExternalSymbol: 2890b57cec5SDimitry Andric // The target flag indicates whether this is a symbol for a 2900b57cec5SDimitry Andric // variable or a function. 2910b57cec5SDimitry Andric assert(MO.getTargetFlags() == 0 && 2920b57cec5SDimitry Andric "WebAssembly uses only symbol flags on ExternalSymbols"); 2930b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, GetExternalSymbolSymbol(MO)); 2940b57cec5SDimitry Andric break; 2950b57cec5SDimitry Andric case MachineOperand::MO_MCSymbol: 2960b57cec5SDimitry Andric // This is currently used only for LSDA symbols (GCC_except_table), 2970b57cec5SDimitry Andric // because global addresses or other external symbols are handled above. 2980b57cec5SDimitry Andric assert(MO.getTargetFlags() == 0 && 2990b57cec5SDimitry Andric "WebAssembly does not use target flags on MCSymbol"); 3000b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, MO.getMCSymbol()); 3010b57cec5SDimitry Andric break; 3020b57cec5SDimitry Andric } 3030b57cec5SDimitry Andric 3040b57cec5SDimitry Andric OutMI.addOperand(MCOp); 3050b57cec5SDimitry Andric } 3060b57cec5SDimitry Andric 3070b57cec5SDimitry Andric if (!WasmKeepRegisters) 3080b57cec5SDimitry Andric removeRegisterOperands(MI, OutMI); 3090b57cec5SDimitry Andric } 3100b57cec5SDimitry Andric 3110b57cec5SDimitry Andric static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) { 3120b57cec5SDimitry Andric // Remove all uses of stackified registers to bring the instruction format 3130b57cec5SDimitry Andric // into its final stack form used thruout MC, and transition opcodes to 3140b57cec5SDimitry Andric // their _S variant. 3150b57cec5SDimitry Andric // We do this seperate from the above code that still may need these 3160b57cec5SDimitry Andric // registers for e.g. call_indirect signatures. 3170b57cec5SDimitry Andric // See comments in lib/Target/WebAssembly/WebAssemblyInstrFormats.td for 3180b57cec5SDimitry Andric // details. 3190b57cec5SDimitry Andric // TODO: the code above creates new registers which are then removed here. 3200b57cec5SDimitry Andric // That code could be slightly simplified by not doing that, though maybe 3210b57cec5SDimitry Andric // it is simpler conceptually to keep the code above in "register mode" 3220b57cec5SDimitry Andric // until this transition point. 3230b57cec5SDimitry Andric // FIXME: we are not processing inline assembly, which contains register 3240b57cec5SDimitry Andric // operands, because it is used by later target generic code. 3250b57cec5SDimitry Andric if (MI->isDebugInstr() || MI->isLabel() || MI->isInlineAsm()) 3260b57cec5SDimitry Andric return; 3270b57cec5SDimitry Andric 3280b57cec5SDimitry Andric // Transform to _S instruction. 3290b57cec5SDimitry Andric auto RegOpcode = OutMI.getOpcode(); 3300b57cec5SDimitry Andric auto StackOpcode = WebAssembly::getStackOpcode(RegOpcode); 3310b57cec5SDimitry Andric assert(StackOpcode != -1 && "Failed to stackify instruction"); 3320b57cec5SDimitry Andric OutMI.setOpcode(StackOpcode); 3330b57cec5SDimitry Andric 3340b57cec5SDimitry Andric // Remove register operands. 3350b57cec5SDimitry Andric for (auto I = OutMI.getNumOperands(); I; --I) { 3360b57cec5SDimitry Andric auto &MO = OutMI.getOperand(I - 1); 3370b57cec5SDimitry Andric if (MO.isReg()) { 3380b57cec5SDimitry Andric OutMI.erase(&MO); 3390b57cec5SDimitry Andric } 3400b57cec5SDimitry Andric } 3410b57cec5SDimitry Andric } 342