10b57cec5SDimitry Andric // WebAssemblyMCInstLower.cpp - Convert WebAssembly MachineInstr to an MCInst // 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric /// 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// This file contains code to lower WebAssembly MachineInstrs to their 110b57cec5SDimitry Andric /// corresponding MCInst records. 120b57cec5SDimitry Andric /// 130b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 140b57cec5SDimitry Andric 150b57cec5SDimitry Andric #include "WebAssemblyMCInstLower.h" 165ffd83dbSDimitry Andric #include "TargetInfo/WebAssemblyTargetInfo.h" 17fe6060f1SDimitry Andric #include "Utils/WebAssemblyTypeUtilities.h" 18fe6060f1SDimitry Andric #include "Utils/WebAssemblyUtilities.h" 190b57cec5SDimitry Andric #include "WebAssemblyAsmPrinter.h" 20*349cc55cSDimitry Andric #include "WebAssemblyISelLowering.h" 210b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h" 220b57cec5SDimitry Andric #include "llvm/CodeGen/AsmPrinter.h" 230b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 240b57cec5SDimitry Andric #include "llvm/IR/Constants.h" 250b57cec5SDimitry Andric #include "llvm/MC/MCAsmInfo.h" 260b57cec5SDimitry Andric #include "llvm/MC/MCContext.h" 270b57cec5SDimitry Andric #include "llvm/MC/MCExpr.h" 280b57cec5SDimitry Andric #include "llvm/MC/MCInst.h" 290b57cec5SDimitry Andric #include "llvm/MC/MCSymbolWasm.h" 300b57cec5SDimitry Andric #include "llvm/Support/ErrorHandling.h" 310b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h" 32*349cc55cSDimitry Andric 330b57cec5SDimitry Andric using namespace llvm; 340b57cec5SDimitry Andric 350b57cec5SDimitry Andric // This disables the removal of registers when lowering into MC, as required 360b57cec5SDimitry Andric // by some current tests. 370b57cec5SDimitry Andric cl::opt<bool> 380b57cec5SDimitry Andric WasmKeepRegisters("wasm-keep-registers", cl::Hidden, 390b57cec5SDimitry Andric cl::desc("WebAssembly: output stack registers in" 400b57cec5SDimitry Andric " instruction output for test purposes only."), 410b57cec5SDimitry Andric cl::init(false)); 420b57cec5SDimitry Andric 43*349cc55cSDimitry Andric extern cl::opt<bool> WasmEnableEmEH; 44*349cc55cSDimitry Andric extern cl::opt<bool> WasmEnableEmSjLj; 45e8d8bef9SDimitry Andric 460b57cec5SDimitry Andric static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI); 470b57cec5SDimitry Andric 480b57cec5SDimitry Andric MCSymbol * 490b57cec5SDimitry Andric WebAssemblyMCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const { 500b57cec5SDimitry Andric const GlobalValue *Global = MO.getGlobal(); 51fe6060f1SDimitry Andric if (!isa<Function>(Global)) { 52fe6060f1SDimitry Andric auto *WasmSym = cast<MCSymbolWasm>(Printer.getSymbol(Global)); 53fe6060f1SDimitry Andric // If the symbol doesn't have an explicit WasmSymbolType yet and the 54fe6060f1SDimitry Andric // GlobalValue is actually a WebAssembly global, then ensure the symbol is a 55fe6060f1SDimitry Andric // WASM_SYMBOL_TYPE_GLOBAL. 56fe6060f1SDimitry Andric if (WebAssembly::isWasmVarAddressSpace(Global->getAddressSpace()) && 57fe6060f1SDimitry Andric !WasmSym->getType()) { 58fe6060f1SDimitry Andric const MachineFunction &MF = *MO.getParent()->getParent()->getParent(); 59fe6060f1SDimitry Andric const TargetMachine &TM = MF.getTarget(); 60fe6060f1SDimitry Andric const Function &CurrentFunc = MF.getFunction(); 61*349cc55cSDimitry Andric Type *GlobalVT = Global->getValueType(); 62fe6060f1SDimitry Andric SmallVector<MVT, 1> VTs; 63*349cc55cSDimitry Andric computeLegalValueVTs(CurrentFunc, TM, GlobalVT, VTs); 64*349cc55cSDimitry Andric 65*349cc55cSDimitry Andric // Tables are represented as Arrays in LLVM IR therefore 66*349cc55cSDimitry Andric // they reach this point as aggregate Array types with an element type 67*349cc55cSDimitry Andric // that is a reference type. 68*349cc55cSDimitry Andric wasm::ValType Type; 69*349cc55cSDimitry Andric if (GlobalVT->isArrayTy() && 70*349cc55cSDimitry Andric WebAssembly::isRefType(GlobalVT->getArrayElementType())) { 71*349cc55cSDimitry Andric MVT VT; 72*349cc55cSDimitry Andric switch (GlobalVT->getArrayElementType()->getPointerAddressSpace()) { 73*349cc55cSDimitry Andric case WebAssembly::WasmAddressSpace::WASM_ADDRESS_SPACE_FUNCREF: 74*349cc55cSDimitry Andric VT = MVT::funcref; 75*349cc55cSDimitry Andric break; 76*349cc55cSDimitry Andric case WebAssembly::WasmAddressSpace::WASM_ADDRESS_SPACE_EXTERNREF: 77*349cc55cSDimitry Andric VT = MVT::externref; 78*349cc55cSDimitry Andric break; 79*349cc55cSDimitry Andric default: 80*349cc55cSDimitry Andric report_fatal_error("unhandled address space type"); 81*349cc55cSDimitry Andric } 82*349cc55cSDimitry Andric Type = WebAssembly::toValType(VT); 83*349cc55cSDimitry Andric } else if (VTs.size() == 1) { 84*349cc55cSDimitry Andric Type = WebAssembly::toValType(VTs[0]); 85*349cc55cSDimitry Andric } else 86fe6060f1SDimitry Andric report_fatal_error("Aggregate globals not yet implemented"); 87fe6060f1SDimitry Andric 88fe6060f1SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_GLOBAL); 89*349cc55cSDimitry Andric WasmSym->setGlobalType( 90*349cc55cSDimitry Andric wasm::WasmGlobalType{uint8_t(Type), /*Mutable=*/true}); 91fe6060f1SDimitry Andric } 92fe6060f1SDimitry Andric return WasmSym; 93fe6060f1SDimitry Andric } 940b57cec5SDimitry Andric 95e8d8bef9SDimitry Andric const auto *FuncTy = cast<FunctionType>(Global->getValueType()); 960b57cec5SDimitry Andric const MachineFunction &MF = *MO.getParent()->getParent()->getParent(); 970b57cec5SDimitry Andric const TargetMachine &TM = MF.getTarget(); 980b57cec5SDimitry Andric const Function &CurrentFunc = MF.getFunction(); 990b57cec5SDimitry Andric 1000b57cec5SDimitry Andric SmallVector<MVT, 1> ResultMVTs; 1010b57cec5SDimitry Andric SmallVector<MVT, 4> ParamMVTs; 1025ffd83dbSDimitry Andric const auto *const F = dyn_cast<Function>(Global); 1035ffd83dbSDimitry Andric computeSignatureVTs(FuncTy, F, CurrentFunc, TM, ParamMVTs, ResultMVTs); 1040b57cec5SDimitry Andric auto Signature = signatureFromMVTs(ResultMVTs, ParamMVTs); 105e8d8bef9SDimitry Andric 106e8d8bef9SDimitry Andric bool InvokeDetected = false; 107e8d8bef9SDimitry Andric auto *WasmSym = Printer.getMCSymbolForFunction( 108*349cc55cSDimitry Andric F, WasmEnableEmEH || WasmEnableEmSjLj, Signature.get(), InvokeDetected); 1090b57cec5SDimitry Andric WasmSym->setSignature(Signature.get()); 1100b57cec5SDimitry Andric Printer.addSignature(std::move(Signature)); 1110b57cec5SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION); 1120b57cec5SDimitry Andric return WasmSym; 1130b57cec5SDimitry Andric } 1140b57cec5SDimitry Andric 1150b57cec5SDimitry Andric MCSymbol *WebAssemblyMCInstLower::GetExternalSymbolSymbol( 1160b57cec5SDimitry Andric const MachineOperand &MO) const { 117fe6060f1SDimitry Andric return Printer.getOrCreateWasmSymbol(MO.getSymbolName()); 1180b57cec5SDimitry Andric } 1190b57cec5SDimitry Andric 1200b57cec5SDimitry Andric MCOperand WebAssemblyMCInstLower::lowerSymbolOperand(const MachineOperand &MO, 1210b57cec5SDimitry Andric MCSymbol *Sym) const { 1220b57cec5SDimitry Andric MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 1230b57cec5SDimitry Andric unsigned TargetFlags = MO.getTargetFlags(); 1240b57cec5SDimitry Andric 1250b57cec5SDimitry Andric switch (TargetFlags) { 1260b57cec5SDimitry Andric case WebAssemblyII::MO_NO_FLAG: 1270b57cec5SDimitry Andric break; 128*349cc55cSDimitry Andric case WebAssemblyII::MO_GOT_TLS: 129*349cc55cSDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_GOT_TLS; 130*349cc55cSDimitry Andric break; 1310b57cec5SDimitry Andric case WebAssemblyII::MO_GOT: 1320b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_GOT; 1330b57cec5SDimitry Andric break; 1340b57cec5SDimitry Andric case WebAssemblyII::MO_MEMORY_BASE_REL: 1350b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_MBREL; 1360b57cec5SDimitry Andric break; 137e8d8bef9SDimitry Andric case WebAssemblyII::MO_TLS_BASE_REL: 138e8d8bef9SDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_TLSREL; 139e8d8bef9SDimitry Andric break; 1400b57cec5SDimitry Andric case WebAssemblyII::MO_TABLE_BASE_REL: 1410b57cec5SDimitry Andric Kind = MCSymbolRefExpr::VK_WASM_TBREL; 1420b57cec5SDimitry Andric break; 1430b57cec5SDimitry Andric default: 1440b57cec5SDimitry Andric llvm_unreachable("Unknown target flag on GV operand"); 1450b57cec5SDimitry Andric } 1460b57cec5SDimitry Andric 1470b57cec5SDimitry Andric const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Kind, Ctx); 1480b57cec5SDimitry Andric 1490b57cec5SDimitry Andric if (MO.getOffset() != 0) { 1500b57cec5SDimitry Andric const auto *WasmSym = cast<MCSymbolWasm>(Sym); 1510b57cec5SDimitry Andric if (TargetFlags == WebAssemblyII::MO_GOT) 1520b57cec5SDimitry Andric report_fatal_error("GOT symbol references do not support offsets"); 1530b57cec5SDimitry Andric if (WasmSym->isFunction()) 1540b57cec5SDimitry Andric report_fatal_error("Function addresses with offsets not supported"); 1550b57cec5SDimitry Andric if (WasmSym->isGlobal()) 1560b57cec5SDimitry Andric report_fatal_error("Global indexes with offsets not supported"); 157fe6060f1SDimitry Andric if (WasmSym->isTag()) 158fe6060f1SDimitry Andric report_fatal_error("Tag indexes with offsets not supported"); 159fe6060f1SDimitry Andric if (WasmSym->isTable()) 160fe6060f1SDimitry Andric report_fatal_error("Table indexes with offsets not supported"); 1610b57cec5SDimitry Andric 1620b57cec5SDimitry Andric Expr = MCBinaryExpr::createAdd( 1630b57cec5SDimitry Andric Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx); 1640b57cec5SDimitry Andric } 1650b57cec5SDimitry Andric 1660b57cec5SDimitry Andric return MCOperand::createExpr(Expr); 1670b57cec5SDimitry Andric } 1680b57cec5SDimitry Andric 1698bcb0991SDimitry Andric MCOperand WebAssemblyMCInstLower::lowerTypeIndexOperand( 1708bcb0991SDimitry Andric SmallVector<wasm::ValType, 1> &&Returns, 1718bcb0991SDimitry Andric SmallVector<wasm::ValType, 4> &&Params) const { 1728bcb0991SDimitry Andric auto Signature = std::make_unique<wasm::WasmSignature>(std::move(Returns), 1738bcb0991SDimitry Andric std::move(Params)); 1748bcb0991SDimitry Andric MCSymbol *Sym = Printer.createTempSymbol("typeindex"); 1758bcb0991SDimitry Andric auto *WasmSym = cast<MCSymbolWasm>(Sym); 1768bcb0991SDimitry Andric WasmSym->setSignature(Signature.get()); 1778bcb0991SDimitry Andric Printer.addSignature(std::move(Signature)); 1788bcb0991SDimitry Andric WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION); 1798bcb0991SDimitry Andric const MCExpr *Expr = 1808bcb0991SDimitry Andric MCSymbolRefExpr::create(WasmSym, MCSymbolRefExpr::VK_WASM_TYPEINDEX, Ctx); 1818bcb0991SDimitry Andric return MCOperand::createExpr(Expr); 1828bcb0991SDimitry Andric } 1838bcb0991SDimitry Andric 1840b57cec5SDimitry Andric // Return the WebAssembly type associated with the given register class. 1850b57cec5SDimitry Andric static wasm::ValType getType(const TargetRegisterClass *RC) { 1860b57cec5SDimitry Andric if (RC == &WebAssembly::I32RegClass) 1870b57cec5SDimitry Andric return wasm::ValType::I32; 1880b57cec5SDimitry Andric if (RC == &WebAssembly::I64RegClass) 1890b57cec5SDimitry Andric return wasm::ValType::I64; 1900b57cec5SDimitry Andric if (RC == &WebAssembly::F32RegClass) 1910b57cec5SDimitry Andric return wasm::ValType::F32; 1920b57cec5SDimitry Andric if (RC == &WebAssembly::F64RegClass) 1930b57cec5SDimitry Andric return wasm::ValType::F64; 1940b57cec5SDimitry Andric if (RC == &WebAssembly::V128RegClass) 1950b57cec5SDimitry Andric return wasm::ValType::V128; 196fe6060f1SDimitry Andric if (RC == &WebAssembly::EXTERNREFRegClass) 197fe6060f1SDimitry Andric return wasm::ValType::EXTERNREF; 198fe6060f1SDimitry Andric if (RC == &WebAssembly::FUNCREFRegClass) 199fe6060f1SDimitry Andric return wasm::ValType::FUNCREF; 2000b57cec5SDimitry Andric llvm_unreachable("Unexpected register class"); 2010b57cec5SDimitry Andric } 2020b57cec5SDimitry Andric 2038bcb0991SDimitry Andric static void getFunctionReturns(const MachineInstr *MI, 2048bcb0991SDimitry Andric SmallVectorImpl<wasm::ValType> &Returns) { 2058bcb0991SDimitry Andric const Function &F = MI->getMF()->getFunction(); 2068bcb0991SDimitry Andric const TargetMachine &TM = MI->getMF()->getTarget(); 2078bcb0991SDimitry Andric Type *RetTy = F.getReturnType(); 2088bcb0991SDimitry Andric SmallVector<MVT, 4> CallerRetTys; 2098bcb0991SDimitry Andric computeLegalValueVTs(F, TM, RetTy, CallerRetTys); 2108bcb0991SDimitry Andric valTypesFromMVTs(CallerRetTys, Returns); 2118bcb0991SDimitry Andric } 2128bcb0991SDimitry Andric 2130b57cec5SDimitry Andric void WebAssemblyMCInstLower::lower(const MachineInstr *MI, 2140b57cec5SDimitry Andric MCInst &OutMI) const { 2150b57cec5SDimitry Andric OutMI.setOpcode(MI->getOpcode()); 2160b57cec5SDimitry Andric 2170b57cec5SDimitry Andric const MCInstrDesc &Desc = MI->getDesc(); 2185ffd83dbSDimitry Andric unsigned NumVariadicDefs = MI->getNumExplicitDefs() - Desc.getNumDefs(); 2190b57cec5SDimitry Andric for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) { 2200b57cec5SDimitry Andric const MachineOperand &MO = MI->getOperand(I); 2210b57cec5SDimitry Andric 2220b57cec5SDimitry Andric MCOperand MCOp; 2230b57cec5SDimitry Andric switch (MO.getType()) { 2240b57cec5SDimitry Andric default: 2250b57cec5SDimitry Andric MI->print(errs()); 2260b57cec5SDimitry Andric llvm_unreachable("unknown operand type"); 2270b57cec5SDimitry Andric case MachineOperand::MO_MachineBasicBlock: 2280b57cec5SDimitry Andric MI->print(errs()); 2290b57cec5SDimitry Andric llvm_unreachable("MachineBasicBlock operand should have been rewritten"); 2300b57cec5SDimitry Andric case MachineOperand::MO_Register: { 2310b57cec5SDimitry Andric // Ignore all implicit register operands. 2320b57cec5SDimitry Andric if (MO.isImplicit()) 2330b57cec5SDimitry Andric continue; 2340b57cec5SDimitry Andric const WebAssemblyFunctionInfo &MFI = 2350b57cec5SDimitry Andric *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>(); 2360b57cec5SDimitry Andric unsigned WAReg = MFI.getWAReg(MO.getReg()); 2370b57cec5SDimitry Andric MCOp = MCOperand::createReg(WAReg); 2380b57cec5SDimitry Andric break; 2390b57cec5SDimitry Andric } 2405ffd83dbSDimitry Andric case MachineOperand::MO_Immediate: { 2415ffd83dbSDimitry Andric unsigned DescIndex = I - NumVariadicDefs; 2425ffd83dbSDimitry Andric if (DescIndex < Desc.NumOperands) { 2435ffd83dbSDimitry Andric const MCOperandInfo &Info = Desc.OpInfo[DescIndex]; 2440b57cec5SDimitry Andric if (Info.OperandType == WebAssembly::OPERAND_TYPEINDEX) { 2450b57cec5SDimitry Andric SmallVector<wasm::ValType, 4> Returns; 2460b57cec5SDimitry Andric SmallVector<wasm::ValType, 4> Params; 2470b57cec5SDimitry Andric 2480b57cec5SDimitry Andric const MachineRegisterInfo &MRI = 2490b57cec5SDimitry Andric MI->getParent()->getParent()->getRegInfo(); 2500b57cec5SDimitry Andric for (const MachineOperand &MO : MI->defs()) 2510b57cec5SDimitry Andric Returns.push_back(getType(MRI.getRegClass(MO.getReg()))); 2520b57cec5SDimitry Andric for (const MachineOperand &MO : MI->explicit_uses()) 2530b57cec5SDimitry Andric if (MO.isReg()) 2540b57cec5SDimitry Andric Params.push_back(getType(MRI.getRegClass(MO.getReg()))); 2550b57cec5SDimitry Andric 2560b57cec5SDimitry Andric // call_indirect instructions have a callee operand at the end which 2570b57cec5SDimitry Andric // doesn't count as a param. 2580b57cec5SDimitry Andric if (WebAssembly::isCallIndirect(MI->getOpcode())) 2590b57cec5SDimitry Andric Params.pop_back(); 2600b57cec5SDimitry Andric 2618bcb0991SDimitry Andric // return_call_indirect instructions have the return type of the 2628bcb0991SDimitry Andric // caller 2638bcb0991SDimitry Andric if (MI->getOpcode() == WebAssembly::RET_CALL_INDIRECT) 2648bcb0991SDimitry Andric getFunctionReturns(MI, Returns); 2650b57cec5SDimitry Andric 2668bcb0991SDimitry Andric MCOp = lowerTypeIndexOperand(std::move(Returns), std::move(Params)); 2670b57cec5SDimitry Andric break; 2688bcb0991SDimitry Andric } else if (Info.OperandType == WebAssembly::OPERAND_SIGNATURE) { 2698bcb0991SDimitry Andric auto BT = static_cast<WebAssembly::BlockType>(MO.getImm()); 2708bcb0991SDimitry Andric assert(BT != WebAssembly::BlockType::Invalid); 2718bcb0991SDimitry Andric if (BT == WebAssembly::BlockType::Multivalue) { 2728bcb0991SDimitry Andric SmallVector<wasm::ValType, 1> Returns; 2738bcb0991SDimitry Andric getFunctionReturns(MI, Returns); 2748bcb0991SDimitry Andric MCOp = lowerTypeIndexOperand(std::move(Returns), 2758bcb0991SDimitry Andric SmallVector<wasm::ValType, 4>()); 2768bcb0991SDimitry Andric break; 2778bcb0991SDimitry Andric } 278e8d8bef9SDimitry Andric } else if (Info.OperandType == WebAssembly::OPERAND_HEAPTYPE) { 279e8d8bef9SDimitry Andric assert(static_cast<WebAssembly::HeapType>(MO.getImm()) != 280e8d8bef9SDimitry Andric WebAssembly::HeapType::Invalid); 281e8d8bef9SDimitry Andric // With typed function references, this will need a case for type 282e8d8bef9SDimitry Andric // index operands. Otherwise, fall through. 2830b57cec5SDimitry Andric } 2840b57cec5SDimitry Andric } 2850b57cec5SDimitry Andric MCOp = MCOperand::createImm(MO.getImm()); 2860b57cec5SDimitry Andric break; 2875ffd83dbSDimitry Andric } 2880b57cec5SDimitry Andric case MachineOperand::MO_FPImmediate: { 2890b57cec5SDimitry Andric const ConstantFP *Imm = MO.getFPImm(); 290fe6060f1SDimitry Andric const uint64_t BitPattern = 291fe6060f1SDimitry Andric Imm->getValueAPF().bitcastToAPInt().getZExtValue(); 2920b57cec5SDimitry Andric if (Imm->getType()->isFloatTy()) 293fe6060f1SDimitry Andric MCOp = MCOperand::createSFPImm(static_cast<uint32_t>(BitPattern)); 2940b57cec5SDimitry Andric else if (Imm->getType()->isDoubleTy()) 295fe6060f1SDimitry Andric MCOp = MCOperand::createDFPImm(BitPattern); 2960b57cec5SDimitry Andric else 2970b57cec5SDimitry Andric llvm_unreachable("unknown floating point immediate type"); 2980b57cec5SDimitry Andric break; 2990b57cec5SDimitry Andric } 3000b57cec5SDimitry Andric case MachineOperand::MO_GlobalAddress: 3010b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, GetGlobalAddressSymbol(MO)); 3020b57cec5SDimitry Andric break; 3030b57cec5SDimitry Andric case MachineOperand::MO_ExternalSymbol: 3040b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, GetExternalSymbolSymbol(MO)); 3050b57cec5SDimitry Andric break; 3060b57cec5SDimitry Andric case MachineOperand::MO_MCSymbol: 3070b57cec5SDimitry Andric assert(MO.getTargetFlags() == 0 && 3080b57cec5SDimitry Andric "WebAssembly does not use target flags on MCSymbol"); 3090b57cec5SDimitry Andric MCOp = lowerSymbolOperand(MO, MO.getMCSymbol()); 3100b57cec5SDimitry Andric break; 3110b57cec5SDimitry Andric } 3120b57cec5SDimitry Andric 3130b57cec5SDimitry Andric OutMI.addOperand(MCOp); 3140b57cec5SDimitry Andric } 3150b57cec5SDimitry Andric 3160b57cec5SDimitry Andric if (!WasmKeepRegisters) 3170b57cec5SDimitry Andric removeRegisterOperands(MI, OutMI); 3185ffd83dbSDimitry Andric else if (Desc.variadicOpsAreDefs()) 3195ffd83dbSDimitry Andric OutMI.insert(OutMI.begin(), MCOperand::createImm(MI->getNumExplicitDefs())); 3200b57cec5SDimitry Andric } 3210b57cec5SDimitry Andric 3220b57cec5SDimitry Andric static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) { 3230b57cec5SDimitry Andric // Remove all uses of stackified registers to bring the instruction format 3240b57cec5SDimitry Andric // into its final stack form used thruout MC, and transition opcodes to 3250b57cec5SDimitry Andric // their _S variant. 3265ffd83dbSDimitry Andric // We do this separate from the above code that still may need these 3270b57cec5SDimitry Andric // registers for e.g. call_indirect signatures. 3280b57cec5SDimitry Andric // See comments in lib/Target/WebAssembly/WebAssemblyInstrFormats.td for 3290b57cec5SDimitry Andric // details. 3300b57cec5SDimitry Andric // TODO: the code above creates new registers which are then removed here. 3310b57cec5SDimitry Andric // That code could be slightly simplified by not doing that, though maybe 3320b57cec5SDimitry Andric // it is simpler conceptually to keep the code above in "register mode" 3330b57cec5SDimitry Andric // until this transition point. 3340b57cec5SDimitry Andric // FIXME: we are not processing inline assembly, which contains register 3350b57cec5SDimitry Andric // operands, because it is used by later target generic code. 3360b57cec5SDimitry Andric if (MI->isDebugInstr() || MI->isLabel() || MI->isInlineAsm()) 3370b57cec5SDimitry Andric return; 3380b57cec5SDimitry Andric 3390b57cec5SDimitry Andric // Transform to _S instruction. 3400b57cec5SDimitry Andric auto RegOpcode = OutMI.getOpcode(); 3410b57cec5SDimitry Andric auto StackOpcode = WebAssembly::getStackOpcode(RegOpcode); 3420b57cec5SDimitry Andric assert(StackOpcode != -1 && "Failed to stackify instruction"); 3430b57cec5SDimitry Andric OutMI.setOpcode(StackOpcode); 3440b57cec5SDimitry Andric 3450b57cec5SDimitry Andric // Remove register operands. 3460b57cec5SDimitry Andric for (auto I = OutMI.getNumOperands(); I; --I) { 3470b57cec5SDimitry Andric auto &MO = OutMI.getOperand(I - 1); 3480b57cec5SDimitry Andric if (MO.isReg()) { 3490b57cec5SDimitry Andric OutMI.erase(&MO); 3500b57cec5SDimitry Andric } 3510b57cec5SDimitry Andric } 3520b57cec5SDimitry Andric } 353