1// WebAssemblyInstrInteger.td-WebAssembly Integer codegen -------*- tablegen -*- 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8/// 9/// \file 10/// WebAssembly Integer operand code-gen constructs. 11/// 12//===----------------------------------------------------------------------===// 13 14multiclass UnaryInt<SDNode node, string name, bits<32> i32Inst, 15 bits<32> i64Inst> { 16 defm _I32 : I<(outs I32:$dst), (ins I32:$src), (outs), (ins), 17 [(set I32:$dst, (node I32:$src))], 18 !strconcat("i32.", !strconcat(name, "\t$dst, $src")), 19 !strconcat("i32.", name), i32Inst>; 20 defm _I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins), 21 [(set I64:$dst, (node I64:$src))], 22 !strconcat("i64.", !strconcat(name, "\t$dst, $src")), 23 !strconcat("i64.", name), i64Inst>; 24} 25multiclass BinaryInt<SDNode node, string name, bits<32> i32Inst, 26 bits<32> i64Inst> { 27 defm _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs), (outs), (ins), 28 [(set I32:$dst, (node I32:$lhs, I32:$rhs))], 29 !strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs")), 30 !strconcat("i32.", name), i32Inst>; 31 defm _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins), 32 [(set I64:$dst, (node I64:$lhs, I64:$rhs))], 33 !strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs")), 34 !strconcat("i64.", name), i64Inst>; 35} 36multiclass ComparisonInt<CondCode cond, string name, bits<32> i32Inst, bits<32> i64Inst> { 37 defm _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs), (outs), (ins), 38 [(set I32:$dst, (setcc I32:$lhs, I32:$rhs, cond))], 39 !strconcat("i32.", !strconcat(name, "\t$dst, $lhs, $rhs")), 40 !strconcat("i32.", name), i32Inst>; 41 defm _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs), (outs), (ins), 42 [(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))], 43 !strconcat("i64.", !strconcat(name, "\t$dst, $lhs, $rhs")), 44 !strconcat("i64.", name), i64Inst>; 45} 46 47// The spaces after the names are for aesthetic purposes only, to make 48// operands line up vertically after tab expansion. 49let isCommutable = 1 in 50defm ADD : BinaryInt<add, "add ", 0x6a, 0x7c>; 51defm SUB : BinaryInt<sub, "sub ", 0x6b, 0x7d>; 52let isCommutable = 1 in 53defm MUL : BinaryInt<mul, "mul ", 0x6c, 0x7e>; 54// Divide and remainder trap on a zero denominator. 55let hasSideEffects = 1 in { 56defm DIV_S : BinaryInt<sdiv, "div_s", 0x6d, 0x7f>; 57defm DIV_U : BinaryInt<udiv, "div_u", 0x6e, 0x80>; 58defm REM_S : BinaryInt<srem, "rem_s", 0x6f, 0x81>; 59defm REM_U : BinaryInt<urem, "rem_u", 0x70, 0x82>; 60} // hasSideEffects = 1 61let isCommutable = 1 in { 62defm AND : BinaryInt<and, "and ", 0x71, 0x83>; 63defm OR : BinaryInt<or, "or ", 0x72, 0x84>; 64defm XOR : BinaryInt<xor, "xor ", 0x73, 0x85>; 65} // isCommutable = 1 66defm SHL : BinaryInt<shl, "shl ", 0x74, 0x86>; 67defm SHR_S : BinaryInt<sra, "shr_s", 0x75, 0x87>; 68defm SHR_U : BinaryInt<srl, "shr_u", 0x76, 0x88>; 69defm ROTL : BinaryInt<rotl, "rotl", 0x77, 0x89>; 70defm ROTR : BinaryInt<rotr, "rotr", 0x78, 0x8a>; 71 72let isCommutable = 1 in { 73defm EQ : ComparisonInt<SETEQ, "eq ", 0x46, 0x51>; 74defm NE : ComparisonInt<SETNE, "ne ", 0x47, 0x52>; 75} // isCommutable = 1 76defm LT_S : ComparisonInt<SETLT, "lt_s", 0x48, 0x53>; 77defm LT_U : ComparisonInt<SETULT, "lt_u", 0x49, 0x54>; 78defm GT_S : ComparisonInt<SETGT, "gt_s", 0x4a, 0x55>; 79defm GT_U : ComparisonInt<SETUGT, "gt_u", 0x4b, 0x56>; 80defm LE_S : ComparisonInt<SETLE, "le_s", 0x4c, 0x57>; 81defm LE_U : ComparisonInt<SETULE, "le_u", 0x4d, 0x58>; 82defm GE_S : ComparisonInt<SETGE, "ge_s", 0x4e, 0x59>; 83defm GE_U : ComparisonInt<SETUGE, "ge_u", 0x4f, 0x5a>; 84 85defm CLZ : UnaryInt<ctlz, "clz ", 0x67, 0x79>; 86defm CTZ : UnaryInt<cttz, "ctz ", 0x68, 0x7a>; 87defm POPCNT : UnaryInt<ctpop, "popcnt", 0x69, 0x7b>; 88 89defm EQZ_I32 : I<(outs I32:$dst), (ins I32:$src), (outs), (ins), 90 [(set I32:$dst, (setcc I32:$src, 0, SETEQ))], 91 "i32.eqz \t$dst, $src", "i32.eqz", 0x45>; 92defm EQZ_I64 : I<(outs I32:$dst), (ins I64:$src), (outs), (ins), 93 [(set I32:$dst, (setcc I64:$src, 0, SETEQ))], 94 "i64.eqz \t$dst, $src", "i64.eqz", 0x50>; 95 96// Optimize away an explicit mask on a rotate count. 97def : Pat<(rotl I32:$lhs, (and I32:$rhs, 31)), (ROTL_I32 I32:$lhs, I32:$rhs)>; 98def : Pat<(rotr I32:$lhs, (and I32:$rhs, 31)), (ROTR_I32 I32:$lhs, I32:$rhs)>; 99def : Pat<(rotl I64:$lhs, (and I64:$rhs, 63)), (ROTL_I64 I64:$lhs, I64:$rhs)>; 100def : Pat<(rotr I64:$lhs, (and I64:$rhs, 63)), (ROTR_I64 I64:$lhs, I64:$rhs)>; 101 102defm SELECT_I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs, I32:$cond), 103 (outs), (ins), 104 [(set I32:$dst, (select I32:$cond, I32:$lhs, I32:$rhs))], 105 "i32.select\t$dst, $lhs, $rhs, $cond", "i32.select", 0x1b>; 106defm SELECT_I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs, I32:$cond), 107 (outs), (ins), 108 [(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))], 109 "i64.select\t$dst, $lhs, $rhs, $cond", "i64.select", 0x1b>; 110 111// ISD::SELECT requires its operand to conform to getBooleanContents, but 112// WebAssembly's select interprets any non-zero value as true, so we can fold 113// a setne with 0 into a select. 114def : Pat<(select (i32 (setne I32:$cond, 0)), I32:$lhs, I32:$rhs), 115 (SELECT_I32 I32:$lhs, I32:$rhs, I32:$cond)>; 116def : Pat<(select (i32 (setne I32:$cond, 0)), I64:$lhs, I64:$rhs), 117 (SELECT_I64 I64:$lhs, I64:$rhs, I32:$cond)>; 118 119// And again, this time with seteq instead of setne and the arms reversed. 120def : Pat<(select (i32 (seteq I32:$cond, 0)), I32:$lhs, I32:$rhs), 121 (SELECT_I32 I32:$rhs, I32:$lhs, I32:$cond)>; 122def : Pat<(select (i32 (seteq I32:$cond, 0)), I64:$lhs, I64:$rhs), 123 (SELECT_I64 I64:$rhs, I64:$lhs, I32:$cond)>; 124