1// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*- 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8/// 9/// \file 10/// WebAssembly Instruction definitions. 11/// 12//===----------------------------------------------------------------------===// 13 14//===----------------------------------------------------------------------===// 15// WebAssembly Instruction Predicate Definitions. 16//===----------------------------------------------------------------------===// 17 18def IsPIC : Predicate<"TM.isPositionIndependent()">; 19def IsNotPIC : Predicate<"!TM.isPositionIndependent()">; 20 21def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">; 22 23def HasAddr64 : Predicate<"Subtarget->hasAddr64()">; 24 25def HasSIMD128 : 26 Predicate<"Subtarget->hasSIMD128()">, 27 AssemblerPredicate<(all_of FeatureSIMD128), "simd128">; 28 29def HasUnimplementedSIMD128 : 30 Predicate<"Subtarget->hasUnimplementedSIMD128()">, 31 AssemblerPredicate<(all_of FeatureUnimplementedSIMD128), "unimplemented-simd128">; 32 33def HasAtomics : 34 Predicate<"Subtarget->hasAtomics()">, 35 AssemblerPredicate<(all_of FeatureAtomics), "atomics">; 36 37def HasMultivalue : 38 Predicate<"Subtarget->hasMultivalue()">, 39 AssemblerPredicate<(all_of FeatureMultivalue), "multivalue">; 40 41def HasNontrappingFPToInt : 42 Predicate<"Subtarget->hasNontrappingFPToInt()">, 43 AssemblerPredicate<(all_of FeatureNontrappingFPToInt), "nontrapping-fptoint">; 44 45def NotHasNontrappingFPToInt : 46 Predicate<"!Subtarget->hasNontrappingFPToInt()">, 47 AssemblerPredicate<(all_of (not FeatureNontrappingFPToInt)), "nontrapping-fptoint">; 48 49def HasSignExt : 50 Predicate<"Subtarget->hasSignExt()">, 51 AssemblerPredicate<(all_of FeatureSignExt), "sign-ext">; 52 53def HasTailCall : 54 Predicate<"Subtarget->hasTailCall()">, 55 AssemblerPredicate<(all_of FeatureTailCall), "tail-call">; 56 57def HasExceptionHandling : 58 Predicate<"Subtarget->hasExceptionHandling()">, 59 AssemblerPredicate<(all_of FeatureExceptionHandling), "exception-handling">; 60 61def HasBulkMemory : 62 Predicate<"Subtarget->hasBulkMemory()">, 63 AssemblerPredicate<(all_of FeatureBulkMemory), "bulk-memory">; 64 65def HasReferenceTypes : 66 Predicate<"Subtarget->hasReferenceTypes()">, 67 AssemblerPredicate<(all_of FeatureReferenceTypes), "reference-types">; 68 69//===----------------------------------------------------------------------===// 70// WebAssembly-specific DAG Node Types. 71//===----------------------------------------------------------------------===// 72 73def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>, 74 SDTCisVT<1, iPTR>]>; 75def SDT_WebAssemblyCallSeqEnd : 76 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 77def SDT_WebAssemblyBrTable : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 78def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>; 79def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>; 80def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, 81 SDTCisPtrTy<0>]>; 82def SDT_WebAssemblyWrapperPIC : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, 83 SDTCisPtrTy<0>]>; 84def SDT_WebAssemblyThrow : SDTypeProfile<0, -1, []>; 85def SDT_WebAssemblyCatch : SDTypeProfile<1, 1, [SDTCisPtrTy<0>]>; 86 87//===----------------------------------------------------------------------===// 88// WebAssembly-specific DAG Nodes. 89//===----------------------------------------------------------------------===// 90 91def WebAssemblycallseq_start : 92 SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart, 93 [SDNPHasChain, SDNPOutGlue]>; 94def WebAssemblycallseq_end : 95 SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd, 96 [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>; 97def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE", 98 SDT_WebAssemblyBrTable, 99 [SDNPHasChain, SDNPVariadic]>; 100def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT", 101 SDT_WebAssemblyArgument>; 102def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN", 103 SDT_WebAssemblyReturn, 104 [SDNPHasChain, SDNPVariadic]>; 105def WebAssemblywrapper : SDNode<"WebAssemblyISD::Wrapper", 106 SDT_WebAssemblyWrapper>; 107def WebAssemblywrapperPIC : SDNode<"WebAssemblyISD::WrapperPIC", 108 SDT_WebAssemblyWrapperPIC>; 109def WebAssemblythrow : SDNode<"WebAssemblyISD::THROW", SDT_WebAssemblyThrow, 110 [SDNPHasChain, SDNPVariadic]>; 111def WebAssemblycatch : SDNode<"WebAssemblyISD::CATCH", SDT_WebAssemblyCatch, 112 [SDNPHasChain, SDNPSideEffect]>; 113 114//===----------------------------------------------------------------------===// 115// WebAssembly-specific Operands. 116//===----------------------------------------------------------------------===// 117 118// Default Operand has AsmOperandClass "Imm" which is for integers (and 119// symbols), so specialize one for floats: 120def FPImmAsmOperand : AsmOperandClass { 121 let Name = "FPImm"; 122 let PredicateMethod = "isFPImm"; 123} 124 125class FPOperand<ValueType ty> : Operand<ty> { 126 AsmOperandClass ParserMatchClass = FPImmAsmOperand; 127} 128 129let OperandNamespace = "WebAssembly" in { 130 131let OperandType = "OPERAND_BASIC_BLOCK" in 132def bb_op : Operand<OtherVT>; 133 134let OperandType = "OPERAND_LOCAL" in 135def local_op : Operand<i32>; 136 137let OperandType = "OPERAND_GLOBAL" in 138def global_op : Operand<i32>; 139 140let OperandType = "OPERAND_I32IMM" in 141def i32imm_op : Operand<i32>; 142 143let OperandType = "OPERAND_I64IMM" in 144def i64imm_op : Operand<i64>; 145 146let OperandType = "OPERAND_F32IMM" in 147def f32imm_op : FPOperand<f32>; 148 149let OperandType = "OPERAND_F64IMM" in 150def f64imm_op : FPOperand<f64>; 151 152let OperandType = "OPERAND_VEC_I8IMM" in 153def vec_i8imm_op : Operand<i32>; 154 155let OperandType = "OPERAND_VEC_I16IMM" in 156def vec_i16imm_op : Operand<i32>; 157 158let OperandType = "OPERAND_VEC_I32IMM" in 159def vec_i32imm_op : Operand<i32>; 160 161let OperandType = "OPERAND_VEC_I64IMM" in 162def vec_i64imm_op : Operand<i64>; 163 164let OperandType = "OPERAND_FUNCTION32" in 165def function32_op : Operand<i32>; 166 167let OperandType = "OPERAND_TABLE" in 168def table32_op : Operand<i32>; 169 170let OperandType = "OPERAND_OFFSET32" in 171def offset32_op : Operand<i32>; 172 173let OperandType = "OPERAND_OFFSET64" in 174def offset64_op : Operand<i64>; 175 176let OperandType = "OPERAND_P2ALIGN" in { 177def P2Align : Operand<i32> { 178 let PrintMethod = "printWebAssemblyP2AlignOperand"; 179} 180 181let OperandType = "OPERAND_EVENT" in 182def event_op : Operand<i32>; 183 184} // OperandType = "OPERAND_P2ALIGN" 185 186let OperandType = "OPERAND_SIGNATURE" in 187def Signature : Operand<i32> { 188 let PrintMethod = "printWebAssemblySignatureOperand"; 189} 190 191let OperandType = "OPERAND_HEAPTYPE" in 192def HeapType : Operand<i32> { 193 let PrintMethod = "printWebAssemblyHeapTypeOperand"; 194} 195 196let OperandType = "OPERAND_TYPEINDEX" in 197def TypeIndex : Operand<i32>; 198 199} // OperandNamespace = "WebAssembly" 200 201//===----------------------------------------------------------------------===// 202// WebAssembly Register to Stack instruction mapping 203//===----------------------------------------------------------------------===// 204 205class StackRel; 206def getStackOpcode : InstrMapping { 207 let FilterClass = "StackRel"; 208 let RowFields = ["BaseName"]; 209 let ColFields = ["StackBased"]; 210 let KeyCol = ["false"]; 211 let ValueCols = [["true"]]; 212} 213 214//===----------------------------------------------------------------------===// 215// WebAssembly 32 to 64-bit instruction mapping 216//===----------------------------------------------------------------------===// 217 218class Wasm64Rel; 219def getWasm64Opcode : InstrMapping { 220 let FilterClass = "Wasm64Rel"; 221 let RowFields = ["Wasm32Name"]; 222 let ColFields = ["IsWasm64"]; 223 let KeyCol = ["false"]; 224 let ValueCols = [["true"]]; 225} 226 227//===----------------------------------------------------------------------===// 228// WebAssembly Instruction Format Definitions. 229//===----------------------------------------------------------------------===// 230 231include "WebAssemblyInstrFormats.td" 232 233//===----------------------------------------------------------------------===// 234// Additional instructions. 235//===----------------------------------------------------------------------===// 236 237multiclass ARGUMENT<WebAssemblyRegClass reg, ValueType vt> { 238 let hasSideEffects = 1, isCodeGenOnly = 1, Defs = []<Register>, 239 Uses = [ARGUMENTS] in 240 defm ARGUMENT_#vt : 241 I<(outs reg:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno), 242 [(set (vt reg:$res), (WebAssemblyargument timm:$argno))]>; 243} 244defm "": ARGUMENT<I32, i32>; 245defm "": ARGUMENT<I64, i64>; 246defm "": ARGUMENT<F32, f32>; 247defm "": ARGUMENT<F64, f64>; 248defm "": ARGUMENT<FUNCREF, funcref>; 249defm "": ARGUMENT<EXTERNREF, externref>; 250 251// local.get and local.set are not generated by instruction selection; they 252// are implied by virtual register uses and defs. 253multiclass LOCAL<WebAssemblyRegClass vt> { 254 let hasSideEffects = 0 in { 255 // COPY is not an actual instruction in wasm, but since we allow local.get and 256 // local.set to be implicit during most of codegen, we can have a COPY which 257 // is actually a no-op because all the work is done in the implied local.get 258 // and local.set. COPYs are eliminated (and replaced with 259 // local.get/local.set) in the ExplicitLocals pass. 260 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in 261 defm COPY_#vt : I<(outs vt:$res), (ins vt:$src), (outs), (ins), [], 262 "local.copy\t$res, $src", "local.copy">; 263 264 // TEE is similar to COPY, but writes two copies of its result. Typically 265 // this would be used to stackify one result and write the other result to a 266 // local. 267 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in 268 defm TEE_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), (outs), (ins), [], 269 "local.tee\t$res, $also, $src", "local.tee">; 270 271 // This is the actual local.get instruction in wasm. These are made explicit 272 // by the ExplicitLocals pass. It has mayLoad because it reads from a wasm 273 // local, which is a side effect not otherwise modeled in LLVM. 274 let mayLoad = 1, isAsCheapAsAMove = 1 in 275 defm LOCAL_GET_#vt : I<(outs vt:$res), (ins local_op:$local), 276 (outs), (ins local_op:$local), [], 277 "local.get\t$res, $local", "local.get\t$local", 0x20>; 278 279 // This is the actual local.set instruction in wasm. These are made explicit 280 // by the ExplicitLocals pass. It has mayStore because it writes to a wasm 281 // local, which is a side effect not otherwise modeled in LLVM. 282 let mayStore = 1, isAsCheapAsAMove = 1 in 283 defm LOCAL_SET_#vt : I<(outs), (ins local_op:$local, vt:$src), 284 (outs), (ins local_op:$local), [], 285 "local.set\t$local, $src", "local.set\t$local", 0x21>; 286 287 // This is the actual local.tee instruction in wasm. TEEs are turned into 288 // LOCAL_TEEs by the ExplicitLocals pass. It has mayStore for the same reason 289 // as LOCAL_SET. 290 let mayStore = 1, isAsCheapAsAMove = 1 in 291 defm LOCAL_TEE_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src), 292 (outs), (ins local_op:$local), [], 293 "local.tee\t$res, $local, $src", "local.tee\t$local", 294 0x22>; 295 296 // Unused values must be dropped in some contexts. 297 defm DROP_#vt : I<(outs), (ins vt:$src), (outs), (ins), [], 298 "drop\t$src", "drop", 0x1a>; 299 300 let mayLoad = 1 in 301 defm GLOBAL_GET_#vt : I<(outs vt:$res), (ins global_op:$local), 302 (outs), (ins global_op:$local), [], 303 "global.get\t$res, $local", "global.get\t$local", 304 0x23>; 305 306 let mayStore = 1 in 307 defm GLOBAL_SET_#vt : I<(outs), (ins global_op:$local, vt:$src), 308 (outs), (ins global_op:$local), [], 309 "global.set\t$local, $src", "global.set\t$local", 310 0x24>; 311 312} // hasSideEffects = 0 313} 314defm "" : LOCAL<I32>; 315defm "" : LOCAL<I64>; 316defm "" : LOCAL<F32>; 317defm "" : LOCAL<F64>; 318defm "" : LOCAL<V128>, Requires<[HasSIMD128]>; 319defm "" : LOCAL<FUNCREF>, Requires<[HasReferenceTypes]>; 320defm "" : LOCAL<EXTERNREF>, Requires<[HasReferenceTypes]>; 321 322let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in { 323defm CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm), 324 (outs), (ins i32imm_op:$imm), 325 [(set I32:$res, imm:$imm)], 326 "i32.const\t$res, $imm", "i32.const\t$imm", 0x41>; 327defm CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm), 328 (outs), (ins i64imm_op:$imm), 329 [(set I64:$res, imm:$imm)], 330 "i64.const\t$res, $imm", "i64.const\t$imm", 0x42>; 331defm CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm), 332 (outs), (ins f32imm_op:$imm), 333 [(set F32:$res, fpimm:$imm)], 334 "f32.const\t$res, $imm", "f32.const\t$imm", 0x43>; 335defm CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm), 336 (outs), (ins f64imm_op:$imm), 337 [(set F64:$res, fpimm:$imm)], 338 "f64.const\t$res, $imm", "f64.const\t$imm", 0x44>; 339} // isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 340 341def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)), 342 (CONST_I32 tglobaladdr:$addr)>, Requires<[IsNotPIC, HasAddr32]>; 343def : Pat<(i64 (WebAssemblywrapper tglobaladdr:$addr)), 344 (CONST_I64 tglobaladdr:$addr)>, Requires<[IsNotPIC, HasAddr64]>; 345 346def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)), 347 (GLOBAL_GET_I32 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr32]>; 348 349def : Pat<(i32 (WebAssemblywrapperPIC tglobaladdr:$addr)), 350 (CONST_I32 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr32]>; 351def : Pat<(i64 (WebAssemblywrapperPIC tglobaladdr:$addr)), 352 (CONST_I64 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr64]>; 353 354def : Pat<(i32 (WebAssemblywrapper tglobaltlsaddr:$addr)), 355 (CONST_I32 tglobaltlsaddr:$addr)>, Requires<[HasAddr32]>; 356def : Pat<(i64 (WebAssemblywrapper tglobaltlsaddr:$addr)), 357 (CONST_I64 tglobaltlsaddr:$addr)>, Requires<[HasAddr64]>; 358 359def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)), 360 (GLOBAL_GET_I32 texternalsym:$addr)>, Requires<[IsPIC, HasAddr32]>; 361 362def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)), 363 (CONST_I32 texternalsym:$addr)>, Requires<[IsNotPIC, HasAddr32]>; 364def : Pat<(i64 (WebAssemblywrapper texternalsym:$addr)), 365 (CONST_I64 texternalsym:$addr)>, Requires<[IsNotPIC, HasAddr64]>; 366 367def : Pat<(i32 (WebAssemblywrapper mcsym:$sym)), (CONST_I32 mcsym:$sym)>; 368def : Pat<(i64 (WebAssemblywrapper mcsym:$sym)), (CONST_I64 mcsym:$sym)>; 369 370//===----------------------------------------------------------------------===// 371// Additional sets of instructions. 372//===----------------------------------------------------------------------===// 373 374include "WebAssemblyInstrMemory.td" 375include "WebAssemblyInstrCall.td" 376include "WebAssemblyInstrControl.td" 377include "WebAssemblyInstrInteger.td" 378include "WebAssemblyInstrConv.td" 379include "WebAssemblyInstrFloat.td" 380include "WebAssemblyInstrAtomics.td" 381include "WebAssemblyInstrSIMD.td" 382include "WebAssemblyInstrRef.td" 383include "WebAssemblyInstrBulkMemory.td" 384include "WebAssemblyInstrTable.td" 385