10b57cec5SDimitry Andric//===- WebAssemblyInstrControl.td-WebAssembly control-flow ------*- tablegen -*- 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric/// 90b57cec5SDimitry Andric/// \file 100b57cec5SDimitry Andric/// WebAssembly control-flow code-gen constructs. 110b57cec5SDimitry Andric/// 120b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric 140b57cec5SDimitry Andriclet isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in { 150b57cec5SDimitry Andric// The condition operand is a boolean value which WebAssembly represents as i32. 160b57cec5SDimitry Andricdefm BR_IF : I<(outs), (ins bb_op:$dst, I32:$cond), 170b57cec5SDimitry Andric (outs), (ins bb_op:$dst), 180b57cec5SDimitry Andric [(brcond I32:$cond, bb:$dst)], 190b57cec5SDimitry Andric "br_if \t$dst, $cond", "br_if \t$dst", 0x0d>; 200b57cec5SDimitry Andriclet isCodeGenOnly = 1 in 210b57cec5SDimitry Andricdefm BR_UNLESS : I<(outs), (ins bb_op:$dst, I32:$cond), 220b57cec5SDimitry Andric (outs), (ins bb_op:$dst), []>; 230b57cec5SDimitry Andriclet isBarrier = 1 in 240b57cec5SDimitry Andricdefm BR : NRI<(outs), (ins bb_op:$dst), 250b57cec5SDimitry Andric [(br bb:$dst)], 260b57cec5SDimitry Andric "br \t$dst", 0x0c>; 270b57cec5SDimitry Andric} // isBranch = 1, isTerminator = 1, hasCtrlDep = 1 280b57cec5SDimitry Andric 290b57cec5SDimitry Andricdef : Pat<(brcond (i32 (setne I32:$cond, 0)), bb:$dst), 300b57cec5SDimitry Andric (BR_IF bb_op:$dst, I32:$cond)>; 310b57cec5SDimitry Andricdef : Pat<(brcond (i32 (seteq I32:$cond, 0)), bb:$dst), 320b57cec5SDimitry Andric (BR_UNLESS bb_op:$dst, I32:$cond)>; 330b57cec5SDimitry Andric 340b57cec5SDimitry Andric// A list of branch targets enclosed in {} and separated by comma. 350b57cec5SDimitry Andric// Used by br_table only. 360b57cec5SDimitry Andricdef BrListAsmOperand : AsmOperandClass { let Name = "BrList"; } 370b57cec5SDimitry Andriclet OperandNamespace = "WebAssembly", OperandType = "OPERAND_BRLIST" in 380b57cec5SDimitry Andricdef brlist : Operand<i32> { 390b57cec5SDimitry Andric let ParserMatchClass = BrListAsmOperand; 400b57cec5SDimitry Andric let PrintMethod = "printBrList"; 410b57cec5SDimitry Andric} 420b57cec5SDimitry Andric 430b57cec5SDimitry Andric// TODO: SelectionDAG's lowering insists on using a pointer as the index for 440b57cec5SDimitry Andric// jump tables, so in practice we don't ever use BR_TABLE_I64 in wasm32 mode 450b57cec5SDimitry Andric// currently. 460b57cec5SDimitry Andriclet isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { 470b57cec5SDimitry Andricdefm BR_TABLE_I32 : I<(outs), (ins I32:$index, variable_ops), 480b57cec5SDimitry Andric (outs), (ins brlist:$brl), 490b57cec5SDimitry Andric [(WebAssemblybr_table I32:$index)], 500b57cec5SDimitry Andric "br_table \t$index", "br_table \t$brl", 510b57cec5SDimitry Andric 0x0e>; 520b57cec5SDimitry Andricdefm BR_TABLE_I64 : I<(outs), (ins I64:$index, variable_ops), 530b57cec5SDimitry Andric (outs), (ins brlist:$brl), 540b57cec5SDimitry Andric [(WebAssemblybr_table I64:$index)], 550b57cec5SDimitry Andric "br_table \t$index", "br_table \t$brl", 560b57cec5SDimitry Andric 0x0e>; 570b57cec5SDimitry Andric} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 580b57cec5SDimitry Andric 590b57cec5SDimitry Andric// This is technically a control-flow instruction, since all it affects is the 600b57cec5SDimitry Andric// IP. 610b57cec5SDimitry Andricdefm NOP : NRI<(outs), (ins), [], "nop", 0x01>; 620b57cec5SDimitry Andric 630b57cec5SDimitry Andric// Placemarkers to indicate the start or end of a block or loop scope. 640b57cec5SDimitry Andric// These use/clobber VALUE_STACK to prevent them from being moved into the 650b57cec5SDimitry Andric// middle of an expression tree. 660b57cec5SDimitry Andriclet Uses = [VALUE_STACK], Defs = [VALUE_STACK] in { 670b57cec5SDimitry Andricdefm BLOCK : NRI<(outs), (ins Signature:$sig), [], "block \t$sig", 0x02>; 680b57cec5SDimitry Andricdefm LOOP : NRI<(outs), (ins Signature:$sig), [], "loop \t$sig", 0x03>; 690b57cec5SDimitry Andric 700b57cec5SDimitry Andricdefm IF : I<(outs), (ins Signature:$sig, I32:$cond), 710b57cec5SDimitry Andric (outs), (ins Signature:$sig), 720b57cec5SDimitry Andric [], "if \t$sig, $cond", "if \t$sig", 0x04>; 730b57cec5SDimitry Andricdefm ELSE : NRI<(outs), (ins), [], "else", 0x05>; 740b57cec5SDimitry Andric 750b57cec5SDimitry Andric// END_BLOCK, END_LOOP, END_IF and END_FUNCTION are represented with the same 760b57cec5SDimitry Andric// opcode in wasm. 770b57cec5SDimitry Andricdefm END_BLOCK : NRI<(outs), (ins), [], "end_block", 0x0b>; 780b57cec5SDimitry Andricdefm END_LOOP : NRI<(outs), (ins), [], "end_loop", 0x0b>; 790b57cec5SDimitry Andricdefm END_IF : NRI<(outs), (ins), [], "end_if", 0x0b>; 800b57cec5SDimitry Andric// Generic instruction, for disassembler. 810b57cec5SDimitry Andriclet IsCanonical = 1 in 820b57cec5SDimitry Andricdefm END : NRI<(outs), (ins), [], "end", 0x0b>; 830b57cec5SDimitry Andriclet isTerminator = 1, isBarrier = 1 in 840b57cec5SDimitry Andricdefm END_FUNCTION : NRI<(outs), (ins), [], "end_function", 0x0b>; 850b57cec5SDimitry Andric} // Uses = [VALUE_STACK], Defs = [VALUE_STACK] 860b57cec5SDimitry Andric 870b57cec5SDimitry Andric 880b57cec5SDimitry Andriclet isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { 890b57cec5SDimitry Andric 900b57cec5SDimitry Andriclet isReturn = 1 in { 910b57cec5SDimitry Andric 92*8bcb0991SDimitry Andricdefm RETURN : I<(outs), (ins variable_ops), (outs), (ins), 93*8bcb0991SDimitry Andric [(WebAssemblyreturn)], 94*8bcb0991SDimitry Andric "return", "return", 0x0f>; 95*8bcb0991SDimitry Andric// Equivalent to RETURN, for use at the end of a function when wasm 96*8bcb0991SDimitry Andric// semantics return by falling off the end of the block. 970b57cec5SDimitry Andriclet isCodeGenOnly = 1 in 98*8bcb0991SDimitry Andricdefm FALLTHROUGH_RETURN : I<(outs), (ins variable_ops), (outs), (ins), []>; 99*8bcb0991SDimitry Andric 1000b57cec5SDimitry Andric} // isReturn = 1 1010b57cec5SDimitry Andric 1020b57cec5SDimitry Andricdefm UNREACHABLE : NRI<(outs), (ins), [(trap)], "unreachable", 0x00>; 1030b57cec5SDimitry Andric} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 1040b57cec5SDimitry Andric 1050b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 1060b57cec5SDimitry Andric// Exception handling instructions 1070b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 1080b57cec5SDimitry Andric 1090b57cec5SDimitry Andriclet Predicates = [HasExceptionHandling] in { 1100b57cec5SDimitry Andric 1110b57cec5SDimitry Andric// Throwing an exception: throw / rethrow 1120b57cec5SDimitry Andriclet isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { 1130b57cec5SDimitry Andricdefm THROW : I<(outs), (ins event_op:$tag, variable_ops), 1140b57cec5SDimitry Andric (outs), (ins event_op:$tag), 1150b57cec5SDimitry Andric [(WebAssemblythrow (WebAssemblywrapper texternalsym:$tag))], 1160b57cec5SDimitry Andric "throw \t$tag", "throw \t$tag", 0x08>; 1170b57cec5SDimitry Andricdefm RETHROW : I<(outs), (ins EXNREF:$exn), (outs), (ins), [], 1180b57cec5SDimitry Andric "rethrow \t$exn", "rethrow", 0x09>; 1190b57cec5SDimitry Andric// Pseudo instruction to be the lowering target of int_wasm_rethrow_in_catch 1200b57cec5SDimitry Andric// intrinsic. Will be converted to the real rethrow instruction later. 1210b57cec5SDimitry Andriclet isPseudo = 1 in 1220b57cec5SDimitry Andricdefm RETHROW_IN_CATCH : NRI<(outs), (ins), [(int_wasm_rethrow_in_catch)], 1230b57cec5SDimitry Andric "rethrow_in_catch", 0>; 1240b57cec5SDimitry Andric} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 1250b57cec5SDimitry Andric 1260b57cec5SDimitry Andric// Region within which an exception is caught: try / end_try 1270b57cec5SDimitry Andriclet Uses = [VALUE_STACK], Defs = [VALUE_STACK] in { 1280b57cec5SDimitry Andricdefm TRY : NRI<(outs), (ins Signature:$sig), [], "try \t$sig", 0x06>; 1290b57cec5SDimitry Andricdefm END_TRY : NRI<(outs), (ins), [], "end_try", 0x0b>; 1300b57cec5SDimitry Andric} // Uses = [VALUE_STACK], Defs = [VALUE_STACK] 1310b57cec5SDimitry Andric 1320b57cec5SDimitry Andric// Catching an exception: catch / extract_exception 1330b57cec5SDimitry Andriclet hasCtrlDep = 1, hasSideEffects = 1 in 1340b57cec5SDimitry Andricdefm CATCH : I<(outs EXNREF:$dst), (ins), (outs), (ins), [], 1350b57cec5SDimitry Andric "catch \t$dst", "catch", 0x07>; 1360b57cec5SDimitry Andric 1370b57cec5SDimitry Andric// Querying / extracing exception: br_on_exn 1380b57cec5SDimitry Andric// br_on_exn queries an exnref to see if it matches the corresponding exception 1390b57cec5SDimitry Andric// tag index. If true it branches to the given label and pushes the 1400b57cec5SDimitry Andric// corresponding argument values of the exception onto the stack. 1410b57cec5SDimitry Andriclet isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in 1420b57cec5SDimitry Andricdefm BR_ON_EXN : I<(outs), (ins bb_op:$dst, event_op:$tag, EXNREF:$exn), 1430b57cec5SDimitry Andric (outs), (ins bb_op:$dst, event_op:$tag), [], 1440b57cec5SDimitry Andric "br_on_exn \t$dst, $tag, $exn", "br_on_exn \t$dst, $tag", 1450b57cec5SDimitry Andric 0x0a>; 1460b57cec5SDimitry Andric// This is a pseudo instruction that simulates popping a value from stack, which 1470b57cec5SDimitry Andric// has been pushed by br_on_exn 1480b57cec5SDimitry Andriclet isCodeGenOnly = 1, hasSideEffects = 1 in 1490b57cec5SDimitry Andricdefm EXTRACT_EXCEPTION_I32 : NRI<(outs I32:$dst), (ins), 1500b57cec5SDimitry Andric [(set I32:$dst, (int_wasm_extract_exception))], 1510b57cec5SDimitry Andric "extract_exception\t$dst">; 1520b57cec5SDimitry Andric 1530b57cec5SDimitry Andric// Pseudo instructions: cleanupret / catchret 1540b57cec5SDimitry Andriclet isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1, 1550b57cec5SDimitry Andric isPseudo = 1, isEHScopeReturn = 1 in { 1560b57cec5SDimitry Andric defm CLEANUPRET : NRI<(outs), (ins), [(cleanupret)], "cleanupret", 0>; 1570b57cec5SDimitry Andric defm CATCHRET : NRI<(outs), (ins bb_op:$dst, bb_op:$from), 1580b57cec5SDimitry Andric [(catchret bb:$dst, bb:$from)], "catchret", 0>; 1590b57cec5SDimitry Andric} // isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1, 1600b57cec5SDimitry Andric // isPseudo = 1, isEHScopeReturn = 1 1610b57cec5SDimitry Andric} // Predicates = [HasExceptionHandling] 162