1*0b57cec5SDimitry Andric//===- WebAssemblyInstrControl.td-WebAssembly control-flow ------*- tablegen -*- 2*0b57cec5SDimitry Andric// 3*0b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric// 7*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric/// 9*0b57cec5SDimitry Andric/// \file 10*0b57cec5SDimitry Andric/// WebAssembly control-flow code-gen constructs. 11*0b57cec5SDimitry Andric/// 12*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 13*0b57cec5SDimitry Andric 14*0b57cec5SDimitry Andriclet isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in { 15*0b57cec5SDimitry Andric// The condition operand is a boolean value which WebAssembly represents as i32. 16*0b57cec5SDimitry Andricdefm BR_IF : I<(outs), (ins bb_op:$dst, I32:$cond), 17*0b57cec5SDimitry Andric (outs), (ins bb_op:$dst), 18*0b57cec5SDimitry Andric [(brcond I32:$cond, bb:$dst)], 19*0b57cec5SDimitry Andric "br_if \t$dst, $cond", "br_if \t$dst", 0x0d>; 20*0b57cec5SDimitry Andriclet isCodeGenOnly = 1 in 21*0b57cec5SDimitry Andricdefm BR_UNLESS : I<(outs), (ins bb_op:$dst, I32:$cond), 22*0b57cec5SDimitry Andric (outs), (ins bb_op:$dst), []>; 23*0b57cec5SDimitry Andriclet isBarrier = 1 in 24*0b57cec5SDimitry Andricdefm BR : NRI<(outs), (ins bb_op:$dst), 25*0b57cec5SDimitry Andric [(br bb:$dst)], 26*0b57cec5SDimitry Andric "br \t$dst", 0x0c>; 27*0b57cec5SDimitry Andric} // isBranch = 1, isTerminator = 1, hasCtrlDep = 1 28*0b57cec5SDimitry Andric 29*0b57cec5SDimitry Andricdef : Pat<(brcond (i32 (setne I32:$cond, 0)), bb:$dst), 30*0b57cec5SDimitry Andric (BR_IF bb_op:$dst, I32:$cond)>; 31*0b57cec5SDimitry Andricdef : Pat<(brcond (i32 (seteq I32:$cond, 0)), bb:$dst), 32*0b57cec5SDimitry Andric (BR_UNLESS bb_op:$dst, I32:$cond)>; 33*0b57cec5SDimitry Andric 34*0b57cec5SDimitry Andric// A list of branch targets enclosed in {} and separated by comma. 35*0b57cec5SDimitry Andric// Used by br_table only. 36*0b57cec5SDimitry Andricdef BrListAsmOperand : AsmOperandClass { let Name = "BrList"; } 37*0b57cec5SDimitry Andriclet OperandNamespace = "WebAssembly", OperandType = "OPERAND_BRLIST" in 38*0b57cec5SDimitry Andricdef brlist : Operand<i32> { 39*0b57cec5SDimitry Andric let ParserMatchClass = BrListAsmOperand; 40*0b57cec5SDimitry Andric let PrintMethod = "printBrList"; 41*0b57cec5SDimitry Andric} 42*0b57cec5SDimitry Andric 43*0b57cec5SDimitry Andric// TODO: SelectionDAG's lowering insists on using a pointer as the index for 44*0b57cec5SDimitry Andric// jump tables, so in practice we don't ever use BR_TABLE_I64 in wasm32 mode 45*0b57cec5SDimitry Andric// currently. 46*0b57cec5SDimitry Andriclet isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { 47*0b57cec5SDimitry Andricdefm BR_TABLE_I32 : I<(outs), (ins I32:$index, variable_ops), 48*0b57cec5SDimitry Andric (outs), (ins brlist:$brl), 49*0b57cec5SDimitry Andric [(WebAssemblybr_table I32:$index)], 50*0b57cec5SDimitry Andric "br_table \t$index", "br_table \t$brl", 51*0b57cec5SDimitry Andric 0x0e>; 52*0b57cec5SDimitry Andricdefm BR_TABLE_I64 : I<(outs), (ins I64:$index, variable_ops), 53*0b57cec5SDimitry Andric (outs), (ins brlist:$brl), 54*0b57cec5SDimitry Andric [(WebAssemblybr_table I64:$index)], 55*0b57cec5SDimitry Andric "br_table \t$index", "br_table \t$brl", 56*0b57cec5SDimitry Andric 0x0e>; 57*0b57cec5SDimitry Andric} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 58*0b57cec5SDimitry Andric 59*0b57cec5SDimitry Andric// This is technically a control-flow instruction, since all it affects is the 60*0b57cec5SDimitry Andric// IP. 61*0b57cec5SDimitry Andricdefm NOP : NRI<(outs), (ins), [], "nop", 0x01>; 62*0b57cec5SDimitry Andric 63*0b57cec5SDimitry Andric// Placemarkers to indicate the start or end of a block or loop scope. 64*0b57cec5SDimitry Andric// These use/clobber VALUE_STACK to prevent them from being moved into the 65*0b57cec5SDimitry Andric// middle of an expression tree. 66*0b57cec5SDimitry Andriclet Uses = [VALUE_STACK], Defs = [VALUE_STACK] in { 67*0b57cec5SDimitry Andricdefm BLOCK : NRI<(outs), (ins Signature:$sig), [], "block \t$sig", 0x02>; 68*0b57cec5SDimitry Andricdefm LOOP : NRI<(outs), (ins Signature:$sig), [], "loop \t$sig", 0x03>; 69*0b57cec5SDimitry Andric 70*0b57cec5SDimitry Andricdefm IF : I<(outs), (ins Signature:$sig, I32:$cond), 71*0b57cec5SDimitry Andric (outs), (ins Signature:$sig), 72*0b57cec5SDimitry Andric [], "if \t$sig, $cond", "if \t$sig", 0x04>; 73*0b57cec5SDimitry Andricdefm ELSE : NRI<(outs), (ins), [], "else", 0x05>; 74*0b57cec5SDimitry Andric 75*0b57cec5SDimitry Andric// END_BLOCK, END_LOOP, END_IF and END_FUNCTION are represented with the same 76*0b57cec5SDimitry Andric// opcode in wasm. 77*0b57cec5SDimitry Andricdefm END_BLOCK : NRI<(outs), (ins), [], "end_block", 0x0b>; 78*0b57cec5SDimitry Andricdefm END_LOOP : NRI<(outs), (ins), [], "end_loop", 0x0b>; 79*0b57cec5SDimitry Andricdefm END_IF : NRI<(outs), (ins), [], "end_if", 0x0b>; 80*0b57cec5SDimitry Andric// Generic instruction, for disassembler. 81*0b57cec5SDimitry Andriclet IsCanonical = 1 in 82*0b57cec5SDimitry Andricdefm END : NRI<(outs), (ins), [], "end", 0x0b>; 83*0b57cec5SDimitry Andriclet isTerminator = 1, isBarrier = 1 in 84*0b57cec5SDimitry Andricdefm END_FUNCTION : NRI<(outs), (ins), [], "end_function", 0x0b>; 85*0b57cec5SDimitry Andric} // Uses = [VALUE_STACK], Defs = [VALUE_STACK] 86*0b57cec5SDimitry Andric 87*0b57cec5SDimitry Andricmulticlass RETURN<WebAssemblyRegClass vt> { 88*0b57cec5SDimitry Andric defm RETURN_#vt : I<(outs), (ins vt:$val), (outs), (ins), 89*0b57cec5SDimitry Andric [(WebAssemblyreturn vt:$val)], 90*0b57cec5SDimitry Andric "return \t$val", "return", 0x0f>; 91*0b57cec5SDimitry Andric // Equivalent to RETURN_#vt, for use at the end of a function when wasm 92*0b57cec5SDimitry Andric // semantics return by falling off the end of the block. 93*0b57cec5SDimitry Andric let isCodeGenOnly = 1 in 94*0b57cec5SDimitry Andric defm FALLTHROUGH_RETURN_#vt : I<(outs), (ins vt:$val), (outs), (ins), []>; 95*0b57cec5SDimitry Andric} 96*0b57cec5SDimitry Andric 97*0b57cec5SDimitry Andricmulticlass SIMD_RETURN<ValueType vt> { 98*0b57cec5SDimitry Andric defm RETURN_#vt : I<(outs), (ins V128:$val), (outs), (ins), 99*0b57cec5SDimitry Andric [(WebAssemblyreturn (vt V128:$val))], 100*0b57cec5SDimitry Andric "return \t$val", "return", 0x0f>, 101*0b57cec5SDimitry Andric Requires<[HasSIMD128]>; 102*0b57cec5SDimitry Andric // Equivalent to RETURN_#vt, for use at the end of a function when wasm 103*0b57cec5SDimitry Andric // semantics return by falling off the end of the block. 104*0b57cec5SDimitry Andric let isCodeGenOnly = 1 in 105*0b57cec5SDimitry Andric defm FALLTHROUGH_RETURN_#vt : I<(outs), (ins V128:$val), (outs), (ins), 106*0b57cec5SDimitry Andric []>, 107*0b57cec5SDimitry Andric Requires<[HasSIMD128]>; 108*0b57cec5SDimitry Andric} 109*0b57cec5SDimitry Andric 110*0b57cec5SDimitry Andriclet isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { 111*0b57cec5SDimitry Andric 112*0b57cec5SDimitry Andriclet isReturn = 1 in { 113*0b57cec5SDimitry Andric defm "": RETURN<I32>; 114*0b57cec5SDimitry Andric defm "": RETURN<I64>; 115*0b57cec5SDimitry Andric defm "": RETURN<F32>; 116*0b57cec5SDimitry Andric defm "": RETURN<F64>; 117*0b57cec5SDimitry Andric defm "": RETURN<EXNREF>; 118*0b57cec5SDimitry Andric defm "": SIMD_RETURN<v16i8>; 119*0b57cec5SDimitry Andric defm "": SIMD_RETURN<v8i16>; 120*0b57cec5SDimitry Andric defm "": SIMD_RETURN<v4i32>; 121*0b57cec5SDimitry Andric defm "": SIMD_RETURN<v2i64>; 122*0b57cec5SDimitry Andric defm "": SIMD_RETURN<v4f32>; 123*0b57cec5SDimitry Andric defm "": SIMD_RETURN<v2f64>; 124*0b57cec5SDimitry Andric 125*0b57cec5SDimitry Andric defm RETURN_VOID : NRI<(outs), (ins), [(WebAssemblyreturn)], "return", 0x0f>; 126*0b57cec5SDimitry Andric 127*0b57cec5SDimitry Andric // This is to RETURN_VOID what FALLTHROUGH_RETURN_#vt is to RETURN_#vt. 128*0b57cec5SDimitry Andric let isCodeGenOnly = 1 in 129*0b57cec5SDimitry Andric defm FALLTHROUGH_RETURN_VOID : NRI<(outs), (ins), []>; 130*0b57cec5SDimitry Andric} // isReturn = 1 131*0b57cec5SDimitry Andric 132*0b57cec5SDimitry Andricdefm UNREACHABLE : NRI<(outs), (ins), [(trap)], "unreachable", 0x00>; 133*0b57cec5SDimitry Andric} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 134*0b57cec5SDimitry Andric 135*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 136*0b57cec5SDimitry Andric// Exception handling instructions 137*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 138*0b57cec5SDimitry Andric 139*0b57cec5SDimitry Andriclet Predicates = [HasExceptionHandling] in { 140*0b57cec5SDimitry Andric 141*0b57cec5SDimitry Andric// Throwing an exception: throw / rethrow 142*0b57cec5SDimitry Andriclet isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { 143*0b57cec5SDimitry Andricdefm THROW : I<(outs), (ins event_op:$tag, variable_ops), 144*0b57cec5SDimitry Andric (outs), (ins event_op:$tag), 145*0b57cec5SDimitry Andric [(WebAssemblythrow (WebAssemblywrapper texternalsym:$tag))], 146*0b57cec5SDimitry Andric "throw \t$tag", "throw \t$tag", 0x08>; 147*0b57cec5SDimitry Andricdefm RETHROW : I<(outs), (ins EXNREF:$exn), (outs), (ins), [], 148*0b57cec5SDimitry Andric "rethrow \t$exn", "rethrow", 0x09>; 149*0b57cec5SDimitry Andric// Pseudo instruction to be the lowering target of int_wasm_rethrow_in_catch 150*0b57cec5SDimitry Andric// intrinsic. Will be converted to the real rethrow instruction later. 151*0b57cec5SDimitry Andriclet isPseudo = 1 in 152*0b57cec5SDimitry Andricdefm RETHROW_IN_CATCH : NRI<(outs), (ins), [(int_wasm_rethrow_in_catch)], 153*0b57cec5SDimitry Andric "rethrow_in_catch", 0>; 154*0b57cec5SDimitry Andric} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 155*0b57cec5SDimitry Andric 156*0b57cec5SDimitry Andric// Region within which an exception is caught: try / end_try 157*0b57cec5SDimitry Andriclet Uses = [VALUE_STACK], Defs = [VALUE_STACK] in { 158*0b57cec5SDimitry Andricdefm TRY : NRI<(outs), (ins Signature:$sig), [], "try \t$sig", 0x06>; 159*0b57cec5SDimitry Andricdefm END_TRY : NRI<(outs), (ins), [], "end_try", 0x0b>; 160*0b57cec5SDimitry Andric} // Uses = [VALUE_STACK], Defs = [VALUE_STACK] 161*0b57cec5SDimitry Andric 162*0b57cec5SDimitry Andric// Catching an exception: catch / extract_exception 163*0b57cec5SDimitry Andriclet hasCtrlDep = 1, hasSideEffects = 1 in 164*0b57cec5SDimitry Andricdefm CATCH : I<(outs EXNREF:$dst), (ins), (outs), (ins), [], 165*0b57cec5SDimitry Andric "catch \t$dst", "catch", 0x07>; 166*0b57cec5SDimitry Andric 167*0b57cec5SDimitry Andric// Querying / extracing exception: br_on_exn 168*0b57cec5SDimitry Andric// br_on_exn queries an exnref to see if it matches the corresponding exception 169*0b57cec5SDimitry Andric// tag index. If true it branches to the given label and pushes the 170*0b57cec5SDimitry Andric// corresponding argument values of the exception onto the stack. 171*0b57cec5SDimitry Andriclet isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in 172*0b57cec5SDimitry Andricdefm BR_ON_EXN : I<(outs), (ins bb_op:$dst, event_op:$tag, EXNREF:$exn), 173*0b57cec5SDimitry Andric (outs), (ins bb_op:$dst, event_op:$tag), [], 174*0b57cec5SDimitry Andric "br_on_exn \t$dst, $tag, $exn", "br_on_exn \t$dst, $tag", 175*0b57cec5SDimitry Andric 0x0a>; 176*0b57cec5SDimitry Andric// This is a pseudo instruction that simulates popping a value from stack, which 177*0b57cec5SDimitry Andric// has been pushed by br_on_exn 178*0b57cec5SDimitry Andriclet isCodeGenOnly = 1, hasSideEffects = 1 in 179*0b57cec5SDimitry Andricdefm EXTRACT_EXCEPTION_I32 : NRI<(outs I32:$dst), (ins), 180*0b57cec5SDimitry Andric [(set I32:$dst, (int_wasm_extract_exception))], 181*0b57cec5SDimitry Andric "extract_exception\t$dst">; 182*0b57cec5SDimitry Andric 183*0b57cec5SDimitry Andric// Pseudo instructions: cleanupret / catchret 184*0b57cec5SDimitry Andriclet isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1, 185*0b57cec5SDimitry Andric isPseudo = 1, isEHScopeReturn = 1 in { 186*0b57cec5SDimitry Andric defm CLEANUPRET : NRI<(outs), (ins), [(cleanupret)], "cleanupret", 0>; 187*0b57cec5SDimitry Andric defm CATCHRET : NRI<(outs), (ins bb_op:$dst, bb_op:$from), 188*0b57cec5SDimitry Andric [(catchret bb:$dst, bb:$from)], "catchret", 0>; 189*0b57cec5SDimitry Andric} // isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1, 190*0b57cec5SDimitry Andric // isPseudo = 1, isEHScopeReturn = 1 191*0b57cec5SDimitry Andric} // Predicates = [HasExceptionHandling] 192