1//- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8/// 9/// \file 10/// This is a target description file for the WebAssembly architecture, 11/// which is also known as "wasm". 12/// 13//===----------------------------------------------------------------------===// 14 15//===----------------------------------------------------------------------===// 16// Target-independent interfaces which we are implementing 17//===----------------------------------------------------------------------===// 18 19include "llvm/Target/Target.td" 20 21//===----------------------------------------------------------------------===// 22// WebAssembly Subtarget features. 23//===----------------------------------------------------------------------===// 24 25def FeatureAtomics : SubtargetFeature<"atomics", "HasAtomics", "true", 26 "Enable Atomics">; 27 28def FeatureBulkMemory : 29 SubtargetFeature<"bulk-memory", "HasBulkMemory", "true", 30 "Enable bulk memory operations">; 31 32def FeatureExceptionHandling : 33 SubtargetFeature<"exception-handling", "HasExceptionHandling", "true", 34 "Enable Wasm exception handling">; 35 36def FeatureExtendedConst : 37 SubtargetFeature<"extended-const", "HasExtendedConst", "true", 38 "Enable extended const expressions">; 39 40def FeatureHalfPrecision : 41 SubtargetFeature<"half-precision", "HasHalfPrecision", "true", 42 "Enable half precision instructions">; 43 44def FeatureMultiMemory : 45 SubtargetFeature<"multimemory", "HasMultiMemory", "true", 46 "Enable multiple memories">; 47 48def FeatureMultivalue : 49 SubtargetFeature<"multivalue", 50 "HasMultivalue", "true", 51 "Enable multivalue blocks, instructions, and functions">; 52 53def FeatureMutableGlobals : 54 SubtargetFeature<"mutable-globals", "HasMutableGlobals", "true", 55 "Enable mutable globals">; 56 57def FeatureNontrappingFPToInt : 58 SubtargetFeature<"nontrapping-fptoint", 59 "HasNontrappingFPToInt", "true", 60 "Enable non-trapping float-to-int conversion operators">; 61 62def FeatureReferenceTypes : 63 SubtargetFeature<"reference-types", "HasReferenceTypes", "true", 64 "Enable reference types">; 65 66def FeatureRelaxedSIMD : 67 SubtargetFeature<"relaxed-simd", "SIMDLevel", "RelaxedSIMD", 68 "Enable relaxed-simd instructions">; 69 70def FeatureSignExt : 71 SubtargetFeature<"sign-ext", "HasSignExt", "true", 72 "Enable sign extension operators">; 73 74def FeatureSIMD128 : SubtargetFeature<"simd128", "SIMDLevel", "SIMD128", 75 "Enable 128-bit SIMD">; 76 77def FeatureTailCall : 78 SubtargetFeature<"tail-call", "HasTailCall", "true", 79 "Enable tail call instructions">; 80 81//===----------------------------------------------------------------------===// 82// Architectures. 83//===----------------------------------------------------------------------===// 84 85//===----------------------------------------------------------------------===// 86// Register File Description 87//===----------------------------------------------------------------------===// 88 89include "WebAssemblyRegisterInfo.td" 90 91//===----------------------------------------------------------------------===// 92// Instruction Descriptions 93//===----------------------------------------------------------------------===// 94 95include "WebAssemblyInstrInfo.td" 96 97def WebAssemblyInstrInfo : InstrInfo; 98 99//===----------------------------------------------------------------------===// 100// WebAssembly Processors supported. 101//===----------------------------------------------------------------------===// 102 103// Minimal Viable Product. 104def : ProcessorModel<"mvp", NoSchedModel, []>; 105 106// Generic processor: latest stable version. 107// 108// This includes features that have achieved phase 4 of the standards process, 109// and that are expected to work for most users in the current time, with 110// consideration given to available support in relevant engines and tools, and 111// the importance of the features. 112def : ProcessorModel<"generic", NoSchedModel, 113 [FeatureMultivalue, FeatureMutableGlobals, 114 FeatureReferenceTypes, FeatureSignExt]>; 115 116// Latest and greatest experimental version of WebAssembly. Bugs included! 117def : ProcessorModel<"bleeding-edge", NoSchedModel, 118 [FeatureAtomics, FeatureBulkMemory, 119 FeatureExceptionHandling, FeatureExtendedConst, 120 FeatureHalfPrecision, FeatureMultiMemory, 121 FeatureMultivalue, FeatureMutableGlobals, 122 FeatureNontrappingFPToInt, FeatureRelaxedSIMD, 123 FeatureReferenceTypes, FeatureSIMD128, FeatureSignExt, 124 FeatureTailCall]>; 125 126//===----------------------------------------------------------------------===// 127// Target Declaration 128//===----------------------------------------------------------------------===// 129 130def WebAssemblyAsmParser : AsmParser { 131 // The physical register names are not in the binary format or asm text 132 let ShouldEmitMatchRegisterName = 0; 133} 134 135def WebAssemblyAsmWriter : AsmWriter { 136 string AsmWriterClassName = "InstPrinter"; 137 int PassSubtarget = 0; 138 int Variant = 0; 139 bit isMCAsmWriter = 1; 140} 141 142def WebAssembly : Target { 143 let InstructionSet = WebAssemblyInstrInfo; 144 let AssemblyParsers = [WebAssemblyAsmParser]; 145 let AssemblyWriters = [WebAssemblyAsmWriter]; 146} 147