1//- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8/// 9/// \file 10/// This is a target description file for the WebAssembly architecture, 11/// which is also known as "wasm". 12/// 13//===----------------------------------------------------------------------===// 14 15//===----------------------------------------------------------------------===// 16// Target-independent interfaces which we are implementing 17//===----------------------------------------------------------------------===// 18 19include "llvm/Target/Target.td" 20 21//===----------------------------------------------------------------------===// 22// WebAssembly Subtarget features. 23//===----------------------------------------------------------------------===// 24 25def FeatureSIMD128 : SubtargetFeature<"simd128", "SIMDLevel", "SIMD128", 26 "Enable 128-bit SIMD">; 27 28def FeatureRelaxedSIMD : SubtargetFeature<"relaxed-simd", "SIMDLevel", "RelaxedSIMD", 29 "Enable relaxed-simd instructions">; 30 31def FeatureAtomics : SubtargetFeature<"atomics", "HasAtomics", "true", 32 "Enable Atomics">; 33 34def FeatureNontrappingFPToInt : 35 SubtargetFeature<"nontrapping-fptoint", 36 "HasNontrappingFPToInt", "true", 37 "Enable non-trapping float-to-int conversion operators">; 38 39def FeatureSignExt : 40 SubtargetFeature<"sign-ext", 41 "HasSignExt", "true", 42 "Enable sign extension operators">; 43 44def FeatureTailCall : 45 SubtargetFeature<"tail-call", 46 "HasTailCall", "true", 47 "Enable tail call instructions">; 48 49def FeatureExceptionHandling : 50 SubtargetFeature<"exception-handling", "HasExceptionHandling", "true", 51 "Enable Wasm exception handling">; 52 53def FeatureBulkMemory : 54 SubtargetFeature<"bulk-memory", "HasBulkMemory", "true", 55 "Enable bulk memory operations">; 56 57def FeatureMultivalue : 58 SubtargetFeature<"multivalue", 59 "HasMultivalue", "true", 60 "Enable multivalue blocks, instructions, and functions">; 61 62def FeatureMutableGlobals : 63 SubtargetFeature<"mutable-globals", "HasMutableGlobals", "true", 64 "Enable mutable globals">; 65 66def FeatureReferenceTypes : 67 SubtargetFeature<"reference-types", "HasReferenceTypes", "true", 68 "Enable reference types">; 69 70def FeatureExtendedConst : 71 SubtargetFeature<"extended-const", "HasExtendedConst", "true", 72 "Enable extended const expressions">; 73 74//===----------------------------------------------------------------------===// 75// Architectures. 76//===----------------------------------------------------------------------===// 77 78//===----------------------------------------------------------------------===// 79// Register File Description 80//===----------------------------------------------------------------------===// 81 82include "WebAssemblyRegisterInfo.td" 83 84//===----------------------------------------------------------------------===// 85// Instruction Descriptions 86//===----------------------------------------------------------------------===// 87 88include "WebAssemblyInstrInfo.td" 89 90def WebAssemblyInstrInfo : InstrInfo; 91 92//===----------------------------------------------------------------------===// 93// WebAssembly Processors supported. 94//===----------------------------------------------------------------------===// 95 96// Minimal Viable Product. 97def : ProcessorModel<"mvp", NoSchedModel, []>; 98 99// Generic processor: latest stable version. 100// 101// This includes features that have achieved phase 4 of the standards process, 102// and that are expected to work for most users in the current time, with 103// consideration given to available support in relevant engines and tools, and 104// the importance of the features. 105def : ProcessorModel<"generic", NoSchedModel, 106 [FeatureSignExt, FeatureMutableGlobals]>; 107 108// Latest and greatest experimental version of WebAssembly. Bugs included! 109def : ProcessorModel<"bleeding-edge", NoSchedModel, 110 [FeatureSIMD128, FeatureAtomics, 111 FeatureNontrappingFPToInt, FeatureSignExt, 112 FeatureMutableGlobals, FeatureBulkMemory, 113 FeatureTailCall]>; 114 115//===----------------------------------------------------------------------===// 116// Target Declaration 117//===----------------------------------------------------------------------===// 118 119def WebAssemblyAsmParser : AsmParser { 120 // The physical register names are not in the binary format or asm text 121 let ShouldEmitMatchRegisterName = 0; 122} 123 124def WebAssemblyAsmWriter : AsmWriter { 125 string AsmWriterClassName = "InstPrinter"; 126 int PassSubtarget = 0; 127 int Variant = 0; 128 bit isMCAsmWriter = 1; 129} 130 131def WebAssembly : Target { 132 let InstructionSet = WebAssemblyInstrInfo; 133 let AssemblyParsers = [WebAssemblyAsmParser]; 134 let AssemblyWriters = [WebAssemblyAsmWriter]; 135} 136