1 //===-- VETargetMachine.cpp - Define TargetMachine for VE -----------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // 10 //===----------------------------------------------------------------------===// 11 12 #include "VETargetMachine.h" 13 #include "TargetInfo/VETargetInfo.h" 14 #include "VE.h" 15 #include "VETargetTransformInfo.h" 16 #include "llvm/CodeGen/Passes.h" 17 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 18 #include "llvm/CodeGen/TargetPassConfig.h" 19 #include "llvm/IR/LegacyPassManager.h" 20 #include "llvm/Support/TargetRegistry.h" 21 22 using namespace llvm; 23 24 #define DEBUG_TYPE "ve" 25 26 extern "C" void LLVMInitializeVETarget() { 27 // Register the target. 28 RegisterTargetMachine<VETargetMachine> X(getTheVETarget()); 29 } 30 31 static std::string computeDataLayout(const Triple &T) { 32 // Aurora VE is little endian 33 std::string Ret = "e"; 34 35 // Use ELF mangling 36 Ret += "-m:e"; 37 38 // Alignments for 64 bit integers. 39 Ret += "-i64:64"; 40 41 // VE supports 32 bit and 64 bits integer on registers 42 Ret += "-n32:64"; 43 44 // Stack alignment is 128 bits 45 Ret += "-S128"; 46 47 return Ret; 48 } 49 50 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) { 51 if (!RM.hasValue()) 52 return Reloc::Static; 53 return *RM; 54 } 55 56 class VEELFTargetObjectFile : public TargetLoweringObjectFileELF { 57 void Initialize(MCContext &Ctx, const TargetMachine &TM) override { 58 TargetLoweringObjectFileELF::Initialize(Ctx, TM); 59 InitializeELF(TM.Options.UseInitArray); 60 } 61 }; 62 63 static std::unique_ptr<TargetLoweringObjectFile> createTLOF() { 64 return std::make_unique<VEELFTargetObjectFile>(); 65 } 66 67 /// Create an Aurora VE architecture model 68 VETargetMachine::VETargetMachine(const Target &T, const Triple &TT, 69 StringRef CPU, StringRef FS, 70 const TargetOptions &Options, 71 Optional<Reloc::Model> RM, 72 Optional<CodeModel::Model> CM, 73 CodeGenOpt::Level OL, bool JIT) 74 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, 75 getEffectiveRelocModel(RM), 76 getEffectiveCodeModel(CM, CodeModel::Small), OL), 77 TLOF(createTLOF()), 78 Subtarget(TT, std::string(CPU), std::string(FS), *this) { 79 initAsmInfo(); 80 } 81 82 VETargetMachine::~VETargetMachine() {} 83 84 TargetTransformInfo VETargetMachine::getTargetTransformInfo(const Function &F) { 85 return TargetTransformInfo(VETTIImpl(this, F)); 86 } 87 88 namespace { 89 /// VE Code Generator Pass Configuration Options. 90 class VEPassConfig : public TargetPassConfig { 91 public: 92 VEPassConfig(VETargetMachine &TM, PassManagerBase &PM) 93 : TargetPassConfig(TM, PM) {} 94 95 VETargetMachine &getVETargetMachine() const { 96 return getTM<VETargetMachine>(); 97 } 98 99 bool addInstSelector() override; 100 }; 101 } // namespace 102 103 TargetPassConfig *VETargetMachine::createPassConfig(PassManagerBase &PM) { 104 return new VEPassConfig(*this, PM); 105 } 106 107 bool VEPassConfig::addInstSelector() { 108 addPass(createVEISelDag(getVETargetMachine())); 109 return false; 110 } 111