1 //===-- VECustomDAG.h - VE Custom DAG Nodes ------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines the interfaces that VE uses to lower LLVM code into a 10 // selection DAG. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "VECustomDAG.h" 15 16 #ifndef DEBUG_TYPE 17 #define DEBUG_TYPE "vecustomdag" 18 #endif 19 20 namespace llvm { 21 22 static const int StandardVectorWidth = 256; 23 24 bool isPackedVectorType(EVT SomeVT) { 25 if (!SomeVT.isVector()) 26 return false; 27 return SomeVT.getVectorNumElements() > StandardVectorWidth; 28 } 29 30 /// \returns the VVP_* SDNode opcode corresponsing to \p OC. 31 Optional<unsigned> getVVPOpcode(unsigned Opcode) { 32 switch (Opcode) { 33 #define HANDLE_VP_TO_VVP(VPOPC, VVPNAME) \ 34 case ISD::VPOPC: \ 35 return VEISD::VVPNAME; 36 #define ADD_VVP_OP(VVPNAME, SDNAME) \ 37 case VEISD::VVPNAME: \ 38 case ISD::SDNAME: \ 39 return VEISD::VVPNAME; 40 #include "VVPNodes.def" 41 } 42 return None; 43 } 44 45 bool isVVPBinaryOp(unsigned VVPOpcode) { 46 switch (VVPOpcode) { 47 #define ADD_BINARY_VVP_OP(VVPNAME, ...) \ 48 case VEISD::VVPNAME: \ 49 return true; 50 #include "VVPNodes.def" 51 } 52 return false; 53 } 54 55 SDValue VECustomDAG::getConstant(uint64_t Val, EVT VT, bool IsTarget, 56 bool IsOpaque) const { 57 return DAG.getConstant(Val, DL, VT, IsTarget, IsOpaque); 58 } 59 60 SDValue VECustomDAG::getBroadcast(EVT ResultVT, SDValue Scalar, 61 SDValue AVL) const { 62 assert(ResultVT.isVector()); 63 auto ScaVT = Scalar.getValueType(); 64 assert(ScaVT != MVT::i1 && "TODO: Mask broadcasts"); 65 66 if (isPackedVectorType(ResultVT)) { 67 // v512x packed mode broadcast 68 // Replicate the scalar reg (f32 or i32) onto the opposing half of the full 69 // scalar register. If it's an I64 type, assume that this has already 70 // happened. 71 if (ScaVT == MVT::f32) { 72 Scalar = getNode(VEISD::REPL_F32, MVT::i64, Scalar); 73 } else if (ScaVT == MVT::i32) { 74 Scalar = getNode(VEISD::REPL_I32, MVT::i64, Scalar); 75 } 76 } 77 78 return getNode(VEISD::VEC_BROADCAST, ResultVT, {Scalar, AVL}); 79 } 80 81 } // namespace llvm 82