1//===-- VE.td - Describe the VE Target Machine -------------*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// 10//===----------------------------------------------------------------------===// 11 12//===----------------------------------------------------------------------===// 13// Target-independent interfaces which we are implementing 14//===----------------------------------------------------------------------===// 15 16include "llvm/Target/Target.td" 17 18//===----------------------------------------------------------------------===// 19// VE Subtarget features. 20// 21 22//===----------------------------------------------------------------------===// 23// Register File, Calling Conv, Instruction Descriptions 24//===----------------------------------------------------------------------===// 25 26include "VERegisterInfo.td" 27include "VECallingConv.td" 28include "VEInstrInfo.td" 29 30def VEInstrInfo : InstrInfo; 31 32def VEAsmParser : AsmParser { 33 // Use both VE register name matcher to accept "S0~S63" register names 34 // and default register matcher to accept other registeres. 35 let AllowDuplicateRegisterNames = 1; 36 let ShouldEmitMatchRegisterAltName = 1; 37} 38 39//===----------------------------------------------------------------------===// 40// VE processors supported. 41//===----------------------------------------------------------------------===// 42 43class Proc<string Name, list<SubtargetFeature> Features> 44 : Processor<Name, NoItineraries, Features>; 45 46def : Proc<"ve", []>; 47 48//===----------------------------------------------------------------------===// 49// Declare the target which we are implementing 50//===----------------------------------------------------------------------===// 51 52def VEAsmWriter : AsmWriter { 53 string AsmWriterClassName = "InstPrinter"; 54 int PassSubtarget = 1; 55 int Variant = 0; 56} 57 58def VE : Target { 59 // Pull in Instruction Info: 60 let InstructionSet = VEInstrInfo; 61 let AssemblyParsers = [VEAsmParser]; 62 let AssemblyWriters = [VEAsmWriter]; 63 let AllowRegisterRenaming = 1; 64} 65