1 //===-- VEAsmBackend.cpp - VE Assembler Backend ---------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "MCTargetDesc/VEFixupKinds.h" 10 #include "MCTargetDesc/VEMCTargetDesc.h" 11 #include "llvm/MC/MCAsmBackend.h" 12 #include "llvm/MC/MCELFObjectWriter.h" 13 #include "llvm/MC/MCExpr.h" 14 #include "llvm/MC/MCFixupKindInfo.h" 15 #include "llvm/MC/MCObjectWriter.h" 16 #include "llvm/MC/MCSubtargetInfo.h" 17 #include "llvm/MC/MCValue.h" 18 #include "llvm/Support/EndianStream.h" 19 #include "llvm/Support/TargetRegistry.h" 20 21 using namespace llvm; 22 23 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { 24 switch (Kind) { 25 default: 26 llvm_unreachable("Unknown fixup kind!"); 27 case FK_Data_1: 28 case FK_Data_2: 29 case FK_Data_4: 30 case FK_Data_8: 31 case FK_PCRel_1: 32 case FK_PCRel_2: 33 case FK_PCRel_4: 34 case FK_PCRel_8: 35 return Value; 36 case VE::fixup_ve_hi32: 37 case VE::fixup_ve_pc_hi32: 38 case VE::fixup_ve_got_hi32: 39 case VE::fixup_ve_gotoff_hi32: 40 case VE::fixup_ve_plt_hi32: 41 case VE::fixup_ve_tls_gd_hi32: 42 case VE::fixup_ve_tpoff_hi32: 43 return (Value >> 32) & 0xffffffff; 44 case VE::fixup_ve_reflong: 45 case VE::fixup_ve_lo32: 46 case VE::fixup_ve_pc_lo32: 47 case VE::fixup_ve_got_lo32: 48 case VE::fixup_ve_gotoff_lo32: 49 case VE::fixup_ve_plt_lo32: 50 case VE::fixup_ve_tls_gd_lo32: 51 case VE::fixup_ve_tpoff_lo32: 52 return Value & 0xffffffff; 53 } 54 } 55 56 /// getFixupKindNumBytes - The number of bytes the fixup may change. 57 static unsigned getFixupKindNumBytes(unsigned Kind) { 58 switch (Kind) { 59 default: 60 llvm_unreachable("Unknown fixup kind!"); 61 case FK_Data_1: 62 case FK_PCRel_1: 63 return 1; 64 case FK_Data_2: 65 case FK_PCRel_2: 66 return 2; 67 return 4; 68 case FK_Data_4: 69 case FK_PCRel_4: 70 case VE::fixup_ve_reflong: 71 case VE::fixup_ve_hi32: 72 case VE::fixup_ve_lo32: 73 case VE::fixup_ve_pc_hi32: 74 case VE::fixup_ve_pc_lo32: 75 case VE::fixup_ve_got_hi32: 76 case VE::fixup_ve_got_lo32: 77 case VE::fixup_ve_gotoff_hi32: 78 case VE::fixup_ve_gotoff_lo32: 79 case VE::fixup_ve_plt_hi32: 80 case VE::fixup_ve_plt_lo32: 81 case VE::fixup_ve_tls_gd_hi32: 82 case VE::fixup_ve_tls_gd_lo32: 83 case VE::fixup_ve_tpoff_hi32: 84 case VE::fixup_ve_tpoff_lo32: 85 return 4; 86 case FK_Data_8: 87 case FK_PCRel_8: 88 return 8; 89 } 90 } 91 92 namespace { 93 class VEAsmBackend : public MCAsmBackend { 94 protected: 95 const Target &TheTarget; 96 97 public: 98 VEAsmBackend(const Target &T) : MCAsmBackend(support::little), TheTarget(T) {} 99 100 unsigned getNumFixupKinds() const override { return VE::NumTargetFixupKinds; } 101 102 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override { 103 const static MCFixupKindInfo Infos[VE::NumTargetFixupKinds] = { 104 // name, offset, bits, flags 105 {"fixup_ve_reflong", 0, 32, 0}, 106 {"fixup_ve_hi32", 0, 32, 0}, 107 {"fixup_ve_lo32", 0, 32, 0}, 108 {"fixup_ve_pc_hi32", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, 109 {"fixup_ve_pc_lo32", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, 110 {"fixup_ve_got_hi32", 0, 32, 0}, 111 {"fixup_ve_got_lo32", 0, 32, 0}, 112 {"fixup_ve_gotoff_hi32", 0, 32, 0}, 113 {"fixup_ve_gotoff_lo32", 0, 32, 0}, 114 {"fixup_ve_plt_hi32", 0, 32, 0}, 115 {"fixup_ve_plt_lo32", 0, 32, 0}, 116 {"fixup_ve_tls_gd_hi32", 0, 32, 0}, 117 {"fixup_ve_tls_gd_lo32", 0, 32, 0}, 118 {"fixup_ve_tpoff_hi32", 0, 32, 0}, 119 {"fixup_ve_tpoff_lo32", 0, 32, 0}, 120 }; 121 122 if (Kind < FirstTargetFixupKind) 123 return MCAsmBackend::getFixupKindInfo(Kind); 124 125 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 126 "Invalid kind!"); 127 return Infos[Kind - FirstTargetFixupKind]; 128 } 129 130 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 131 const MCValue &Target) override { 132 switch ((VE::Fixups)Fixup.getKind()) { 133 default: 134 return false; 135 case VE::fixup_ve_tls_gd_hi32: 136 case VE::fixup_ve_tls_gd_lo32: 137 case VE::fixup_ve_tpoff_hi32: 138 case VE::fixup_ve_tpoff_lo32: 139 return true; 140 } 141 } 142 143 bool mayNeedRelaxation(const MCInst &Inst, 144 const MCSubtargetInfo &STI) const override { 145 // Not implemented yet. For example, if we have a branch with 146 // lager than SIMM32 immediate value, we want to relaxation such 147 // branch instructions. 148 return false; 149 } 150 151 /// fixupNeedsRelaxation - Target specific predicate for whether a given 152 /// fixup requires the associated instruction to be relaxed. 153 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, 154 const MCRelaxableFragment *DF, 155 const MCAsmLayout &Layout) const override { 156 // Not implemented yet. For example, if we have a branch with 157 // lager than SIMM32 immediate value, we want to relaxation such 158 // branch instructions. 159 return false; 160 } 161 void relaxInstruction(MCInst &Inst, 162 const MCSubtargetInfo &STI) const override { 163 // Aurora VE doesn't support relaxInstruction yet. 164 llvm_unreachable("relaxInstruction() should not be called"); 165 } 166 167 bool writeNopData(raw_ostream &OS, uint64_t Count) const override { 168 if ((Count % 8) != 0) 169 return false; 170 171 for (uint64_t i = 0; i < Count; i += 8) 172 support::endian::write<uint64_t>(OS, 0x7900000000000000ULL, 173 support::little); 174 175 return true; 176 } 177 }; 178 179 class ELFVEAsmBackend : public VEAsmBackend { 180 Triple::OSType OSType; 181 182 public: 183 ELFVEAsmBackend(const Target &T, Triple::OSType OSType) 184 : VEAsmBackend(T), OSType(OSType) {} 185 186 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 187 const MCValue &Target, MutableArrayRef<char> Data, 188 uint64_t Value, bool IsResolved, 189 const MCSubtargetInfo *STI) const override { 190 Value = adjustFixupValue(Fixup.getKind(), Value); 191 if (!Value) 192 return; // Doesn't change encoding. 193 194 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); 195 196 // Shift the value into position. 197 Value <<= Info.TargetOffset; 198 199 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); 200 unsigned Offset = Fixup.getOffset(); 201 assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!"); 202 // For each byte of the fragment that the fixup touches, mask in the bits 203 // from the fixup value. The Value has been "split up" into the 204 // appropriate bitfields above. 205 for (unsigned i = 0; i != NumBytes; ++i) { 206 unsigned Idx = Endian == support::little ? i : (NumBytes - 1) - i; 207 Data[Offset + Idx] |= static_cast<uint8_t>((Value >> (i * 8)) & 0xff); 208 } 209 } 210 211 std::unique_ptr<MCObjectTargetWriter> 212 createObjectTargetWriter() const override { 213 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType); 214 return createVEELFObjectWriter(OSABI); 215 } 216 }; 217 } // end anonymous namespace 218 219 MCAsmBackend *llvm::createVEAsmBackend(const Target &T, 220 const MCSubtargetInfo &STI, 221 const MCRegisterInfo &MRI, 222 const MCTargetOptions &Options) { 223 return new ELFVEAsmBackend(T, STI.getTargetTriple().getOS()); 224 } 225