1//-- SystemZScheduleZ15.td - SystemZ Scheduling Definitions ----*- tblgen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file defines the machine model for Z15 to support instruction 10// scheduling and other instruction cost heuristics. 11// 12// Pseudos expanded right after isel do not need to be modelled here. 13// 14//===----------------------------------------------------------------------===// 15 16def Z15Model : SchedMachineModel { 17 18 let UnsupportedFeatures = Arch13UnsupportedFeatures.List; 19 20 let IssueWidth = 6; // Number of instructions decoded per cycle. 21 let MicroOpBufferSize = 60; // Issue queues 22 let LoadLatency = 1; // Optimistic load latency. 23 24 let PostRAScheduler = 1; 25 26 // Extra cycles for a mispredicted branch. 27 let MispredictPenalty = 20; 28} 29 30let SchedModel = Z15Model in { 31// These definitions need the SchedModel value. They could be put in a 32// subtarget common include file, but it seems the include system in Tablegen 33// currently (2016) rejects multiple includes of same file. 34 35// Decoder grouping rules 36let NumMicroOps = 1 in { 37 def : WriteRes<NormalGr, []>; 38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; } 39 def : WriteRes<EndGroup, []> { let EndGroup = 1; } 40} 41def : WriteRes<Cracked, []> { 42 let NumMicroOps = 2; 43 let BeginGroup = 1; 44} 45def : WriteRes<GroupAlone, []> { 46 let NumMicroOps = 3; 47 let BeginGroup = 1; 48 let EndGroup = 1; 49} 50def : WriteRes<GroupAlone2, []> { 51 let NumMicroOps = 6; 52 let BeginGroup = 1; 53 let EndGroup = 1; 54} 55def : WriteRes<GroupAlone3, []> { 56 let NumMicroOps = 9; 57 let BeginGroup = 1; 58 let EndGroup = 1; 59} 60 61// Incoming latency removed from the register operand which is used together 62// with a memory operand by the instruction. 63def : ReadAdvance<RegReadAdv, 4>; 64 65// LoadLatency (above) is not used for instructions in this file. This is 66// instead the role of LSULatency, which is the latency value added to the 67// result of loads and instructions with folded memory operands. 68def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; } 69 70let NumMicroOps = 0 in { 71 foreach L = 1-30 in 72 def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; } 73} 74 75// Execution units. 76def Z15_FXaUnit : ProcResource<2>; 77def Z15_FXbUnit : ProcResource<2>; 78def Z15_LSUnit : ProcResource<2>; 79def Z15_VecUnit : ProcResource<2>; 80def Z15_VecFPdUnit : ProcResource<2> { let BufferSize = 1; /* blocking */ } 81def Z15_VBUnit : ProcResource<2>; 82def Z15_MCD : ProcResource<1>; 83 84// Subtarget specific definitions of scheduling resources. 85let NumMicroOps = 0 in { 86 def : WriteRes<FXa, [Z15_FXaUnit]>; 87 def : WriteRes<FXb, [Z15_FXbUnit]>; 88 def : WriteRes<LSU, [Z15_LSUnit]>; 89 def : WriteRes<VecBF, [Z15_VecUnit]>; 90 def : WriteRes<VecDF, [Z15_VecUnit]>; 91 def : WriteRes<VecDFX, [Z15_VecUnit]>; 92 def : WriteRes<VecMul, [Z15_VecUnit]>; 93 def : WriteRes<VecStr, [Z15_VecUnit]>; 94 def : WriteRes<VecXsPm, [Z15_VecUnit]>; 95 foreach Num = 2-5 in { let ResourceCycles = [Num] in { 96 def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z15_FXaUnit]>; 97 def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z15_FXbUnit]>; 98 def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z15_LSUnit]>; 99 def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z15_VecUnit]>; 100 def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z15_VecUnit]>; 101 def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z15_VecUnit]>; 102 def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z15_VecUnit]>; 103 def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z15_VecUnit]>; 104 def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z15_VecUnit]>; 105 }} 106 107 def : WriteRes<VecFPd, [Z15_VecFPdUnit]> { let ResourceCycles = [30]; } 108 109 def : WriteRes<VBU, [Z15_VBUnit]>; // Virtual Branching Unit 110} 111 112def : WriteRes<MCD, [Z15_MCD]> { let NumMicroOps = 3; 113 let BeginGroup = 1; 114 let EndGroup = 1; } 115 116// -------------------------- INSTRUCTIONS ---------------------------------- // 117 118// InstRW constructs have been used in order to preserve the 119// readability of the InstrInfo files. 120 121// For each instruction, as matched by a regexp, provide a list of 122// resources that it needs. These will be combined into a SchedClass. 123 124//===----------------------------------------------------------------------===// 125// Stack allocation 126//===----------------------------------------------------------------------===// 127 128// Pseudo -> LA / LAY 129def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>; 130 131//===----------------------------------------------------------------------===// 132// Branch instructions 133//===----------------------------------------------------------------------===// 134 135// Branch 136def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>; 137def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>; 138def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>; 139def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>; 140def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "BI(C)?(Asm.*)?$")>; 141def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>; 142def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>; 143def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>; 144def : InstRW<[WLat1, FXa2, FXb2, GroupAlone2], 145 (instregex "B(R)?X(H|L).*$")>; 146 147// Compare and branch 148def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>; 149def : InstRW<[WLat1, FXb2, GroupAlone], 150 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>; 151 152//===----------------------------------------------------------------------===// 153// Trap instructions 154//===----------------------------------------------------------------------===// 155 156// Trap 157def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>; 158 159// Compare and trap 160def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>; 161def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>; 162def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>; 163def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>; 164 165//===----------------------------------------------------------------------===// 166// Call and return instructions 167//===----------------------------------------------------------------------===// 168 169// Call 170def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>; 171def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL(_XPLINK64)?$")>; 172def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?(_XPLINK64|_STACKEXT)?$")>; 173def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>; 174 175// Return 176def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return(_XPLINK)?$")>; 177def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn(_XPLINK)?$")>; 178 179//===----------------------------------------------------------------------===// 180// Move instructions 181//===----------------------------------------------------------------------===// 182 183// Moves 184def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>; 185def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>; 186 187// Move character 188def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>; 189def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>; 190def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "MVCRL$")>; 191 192// Pseudo -> reg move 193def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>; 194def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>; 195def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>; 196def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>; 197 198// Loads 199def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>; 200def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>; 201def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>; 202def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>; 203 204def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>; 205def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>; 206 207def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>; 208def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>; 209def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR$")>; 210 211// Load and zero rightmost byte 212def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>; 213 214// Load and trap 215def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>; 216 217// Load and test 218def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>; 219def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>; 220 221// Stores 222def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>; 223def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>; 224def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>; 225 226// String moves. 227def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>; 228 229//===----------------------------------------------------------------------===// 230// Conditional move instructions 231//===----------------------------------------------------------------------===// 232 233def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>; 234def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>; 235def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>; 236def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 237 (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>; 238def : InstRW<[WLat1, FXb, LSU, NormalGr], 239 (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>; 240 241def : InstRW<[WLat2, FXa, NormalGr], (instregex "SELRMux$")>; 242def : InstRW<[WLat2, FXa, NormalGr], (instregex "SEL(G|FH)?R(Asm.*)?$")>; 243 244//===----------------------------------------------------------------------===// 245// Sign extensions 246//===----------------------------------------------------------------------===// 247 248def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>; 249def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>; 250 251def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>; 252def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>; 253 254def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>; 255def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>; 256def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>; 257def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>; 258def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>; 259 260//===----------------------------------------------------------------------===// 261// Zero extensions 262//===----------------------------------------------------------------------===// 263 264def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>; 265def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>; 266def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>; 267def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>; 268def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>; 269def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>; 270def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>; 271def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>; 272 273// Load and zero rightmost byte 274def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>; 275 276// Load and trap 277def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>; 278 279//===----------------------------------------------------------------------===// 280// Truncations 281//===----------------------------------------------------------------------===// 282 283def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 284def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>; 285def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>; 286 287//===----------------------------------------------------------------------===// 288// Multi-register moves 289//===----------------------------------------------------------------------===// 290 291// Load multiple (estimated average of 5 ops) 292def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>; 293 294// Load multiple disjoint 295def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>; 296 297// Store multiple 298def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>; 299 300//===----------------------------------------------------------------------===// 301// Byte swaps 302//===----------------------------------------------------------------------===// 303 304def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>; 305def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>; 306def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>; 307def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>; 308 309//===----------------------------------------------------------------------===// 310// Load address instructions 311//===----------------------------------------------------------------------===// 312 313def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>; 314 315// Load the Global Offset Table address ( -> larl ) 316def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>; 317 318//===----------------------------------------------------------------------===// 319// Absolute and Negation 320//===----------------------------------------------------------------------===// 321 322def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LP(G)?R$")>; 323def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "L(N|P)GFR$")>; 324def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LN(R|GR)$")>; 325def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>; 326def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>; 327 328//===----------------------------------------------------------------------===// 329// Insertion 330//===----------------------------------------------------------------------===// 331 332def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>; 333def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 334 (instregex "IC32(Y)?$")>; 335def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr], 336 (instregex "ICM(H|Y)?$")>; 337def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>; 338def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>; 339def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>; 340def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>; 341def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>; 342def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>; 343def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>; 344 345//===----------------------------------------------------------------------===// 346// Addition 347//===----------------------------------------------------------------------===// 348 349def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 350 (instregex "A(Y)?$")>; 351def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 352 (instregex "AH(Y)?$")>; 353def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>; 354def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>; 355def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 356 (instregex "AG$")>; 357def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>; 358def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>; 359def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>; 360def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>; 361def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>; 362def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 363 (instregex "AL(Y)?$")>; 364def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>; 365def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 366 (instregex "ALG(F)?$")>; 367def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>; 368def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>; 369def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>; 370def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>; 371def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>; 372def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>; 373def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>; 374def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>; 375def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>; 376 377// Logical addition with carry 378def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone], 379 (instregex "ALC(G)?$")>; 380def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>; 381 382// Add with sign extension (16/32 -> 64) 383def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 384 (instregex "AG(F|H)$")>; 385def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>; 386 387//===----------------------------------------------------------------------===// 388// Subtraction 389//===----------------------------------------------------------------------===// 390 391def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 392 (instregex "S(G|Y)?$")>; 393def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 394 (instregex "SH(Y)?$")>; 395def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>; 396def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>; 397def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 398 (instregex "SL(G|GF|Y)?$")>; 399def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>; 400def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>; 401def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>; 402def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>; 403def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>; 404def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>; 405 406// Subtraction with borrow 407def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone], 408 (instregex "SLB(G)?$")>; 409def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>; 410 411// Subtraction with sign extension (16/32 -> 64) 412def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 413 (instregex "SG(F|H)$")>; 414def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>; 415 416//===----------------------------------------------------------------------===// 417// AND 418//===----------------------------------------------------------------------===// 419 420def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 421 (instregex "N(G|Y)?$")>; 422def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>; 423def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>; 424def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>; 425def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>; 426def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>; 427def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>; 428def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>; 429def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>; 430def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>; 431def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>; 432def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>; 433 434//===----------------------------------------------------------------------===// 435// OR 436//===----------------------------------------------------------------------===// 437 438def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 439 (instregex "O(G|Y)?$")>; 440def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>; 441def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>; 442def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>; 443def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>; 444def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>; 445def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>; 446def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>; 447def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>; 448def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>; 449def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>; 450def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>; 451 452//===----------------------------------------------------------------------===// 453// XOR 454//===----------------------------------------------------------------------===// 455 456def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 457 (instregex "X(G|Y)?$")>; 458def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>; 459def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>; 460def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>; 461def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>; 462def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>; 463def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>; 464def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>; 465 466//===----------------------------------------------------------------------===// 467// Combined logical operations 468//===----------------------------------------------------------------------===// 469 470def : InstRW<[WLat1, FXa, NormalGr], (instregex "NC(G)?RK$")>; 471def : InstRW<[WLat1, FXa, NormalGr], (instregex "OC(G)?RK$")>; 472def : InstRW<[WLat1, FXa, NormalGr], (instregex "NN(G)?RK$")>; 473def : InstRW<[WLat1, FXa, NormalGr], (instregex "NO(G)?RK$")>; 474def : InstRW<[WLat1, FXa, NormalGr], (instregex "NX(G)?RK$")>; 475 476//===----------------------------------------------------------------------===// 477// Multiplication 478//===----------------------------------------------------------------------===// 479 480def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr], 481 (instregex "MS(GF|Y)?$")>; 482def : InstRW<[WLat5, FXa, NormalGr], (instregex "MS(R|FI)$")>; 483def : InstRW<[WLat7LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>; 484def : InstRW<[WLat7, FXa, NormalGr], (instregex "MSGR$")>; 485def : InstRW<[WLat5, FXa, NormalGr], (instregex "MSGF(I|R)$")>; 486def : InstRW<[WLat8LSU, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MLG$")>; 487def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MLGR$")>; 488def : InstRW<[WLat4, FXa, NormalGr], (instregex "MGHI$")>; 489def : InstRW<[WLat4, FXa, NormalGr], (instregex "MHI$")>; 490def : InstRW<[WLat4LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>; 491def : InstRW<[WLat6, FXa2, GroupAlone], (instregex "M(L)?R$")>; 492def : InstRW<[WLat6LSU, RegReadAdv, FXa2, LSU, GroupAlone], 493 (instregex "M(FY|L)?$")>; 494def : InstRW<[WLat8, RegReadAdv, FXa, LSU, NormalGr], (instregex "MGH$")>; 495def : InstRW<[WLat12, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MG$")>; 496def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MGRK$")>; 497def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, FXa, LSU, NormalGr], 498 (instregex "MSC$")>; 499def : InstRW<[WLat8LSU, WLat8LSU, RegReadAdv, FXa, LSU, NormalGr], 500 (instregex "MSGC$")>; 501def : InstRW<[WLat6, WLat6, FXa, NormalGr], (instregex "MSRKC$")>; 502def : InstRW<[WLat8, WLat8, FXa, NormalGr], (instregex "MSGRKC$")>; 503 504//===----------------------------------------------------------------------===// 505// Division and remainder 506//===----------------------------------------------------------------------===// 507 508def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>; 509def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "D$")>; 510def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>; 511def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone2], 512 (instregex "DSG(F)?$")>; 513def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>; 514def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>; 515def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], 516 (instregex "DL(G)?$")>; 517 518//===----------------------------------------------------------------------===// 519// Shifts 520//===----------------------------------------------------------------------===// 521 522def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>; 523def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>; 524def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>; 525def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>; 526def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2], 527 (instregex "S(L|R)D(A|L)$")>; 528 529// Rotate 530def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>; 531 532// Rotate and insert 533def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>; 534def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>; 535def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>; 536def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>; 537 538// Rotate and Select 539def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>; 540 541//===----------------------------------------------------------------------===// 542// Comparison 543//===----------------------------------------------------------------------===// 544 545def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], 546 (instregex "C(G|Y|Mux)?$")>; 547def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>; 548def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>; 549def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>; 550def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>; 551def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>; 552def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>; 553def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>; 554def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>; 555def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], 556 (instregex "CL(Y|Mux)?$")>; 557def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>; 558def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>; 559def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>; 560def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>; 561def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>; 562def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>; 563def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>; 564def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>; 565def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>; 566def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>; 567def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>; 568def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>; 569def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>; 570def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>; 571def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>; 572def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>; 573def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>; 574 575// Compare halfword 576def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>; 577def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>; 578def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>; 579def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>; 580def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>; 581 582// Compare with sign extension (32 -> 64) 583def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>; 584def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>; 585def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>; 586 587// Compare logical character 588def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>; 589def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>; 590def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>; 591 592// Test under mask 593def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>; 594def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>; 595def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>; 596def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>; 597def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>; 598def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>; 599 600// Compare logical characters under mask 601def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], 602 (instregex "CLM(H|Y)?$")>; 603 604//===----------------------------------------------------------------------===// 605// Prefetch and execution hint 606//===----------------------------------------------------------------------===// 607 608def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>; 609def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>; 610def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>; 611def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>; 612 613//===----------------------------------------------------------------------===// 614// Atomic operations 615//===----------------------------------------------------------------------===// 616 617def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>; 618 619def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>; 620def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>; 621def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>; 622def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>; 623def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>; 624 625// Test and set 626def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>; 627 628// Compare and swap 629def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone], 630 (instregex "CS(G|Y)?$")>; 631 632// Compare double and swap 633def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone2], 634 (instregex "CDS(Y)?$")>; 635def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3, 636 GroupAlone3], (instregex "CDSG$")>; 637 638// Compare and swap and store 639def : InstRW<[WLat30, MCD], (instregex "CSST$")>; 640 641// Perform locked operation 642def : InstRW<[WLat30, MCD], (instregex "PLO$")>; 643 644// Load/store pair from/to quadword 645def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>; 646def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>; 647 648// Load pair disjoint 649def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>; 650 651//===----------------------------------------------------------------------===// 652// Translate and convert 653//===----------------------------------------------------------------------===// 654 655def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>; 656def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone2], 657 (instregex "TRT$")>; 658def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>; 659def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>; 660def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>; 661def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>; 662def : InstRW<[WLat30, WLat30, WLat30, MCD], 663 (instregex "CU(12|14|21|24|41|42)(Opt)?$")>; 664def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>; 665 666//===----------------------------------------------------------------------===// 667// Message-security assist 668//===----------------------------------------------------------------------===// 669 670def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], 671 (instregex "KM(C|F|O|CTR|A)?$")>; 672def : InstRW<[WLat30, WLat30, WLat30, MCD], 673 (instregex "(KIMD|KLMD|KMAC|KDSA)$")>; 674def : InstRW<[WLat30, WLat30, WLat30, MCD], 675 (instregex "(PCC|PPNO|PRNO)$")>; 676 677//===----------------------------------------------------------------------===// 678// Guarded storage 679//===----------------------------------------------------------------------===// 680 681def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LGG$")>; 682def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLGFSG$")>; 683def : InstRW<[WLat30, MCD], (instregex "(L|ST)GSC$")>; 684 685//===----------------------------------------------------------------------===// 686// Decimal arithmetic 687//===----------------------------------------------------------------------===// 688 689def : InstRW<[WLat20, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone2], 690 (instregex "CVBG$")>; 691def : InstRW<[WLat20, RegReadAdv, FXb, VecDF, LSU, GroupAlone2], 692 (instregex "CVB(Y)?$")>; 693def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone3], (instregex "CVDG$")>; 694def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone2], (instregex "CVD(Y)?$")>; 695def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>; 696def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; 697def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>; 698def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>; 699 700def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone2], 701 (instregex "(A|S|ZA)P$")>; 702def : InstRW<[WLat1, FXb, VecDFX2, LSU3, GroupAlone2], (instregex "MP$")>; 703def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone2], (instregex "DP$")>; 704def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone3], (instregex "SRP$")>; 705def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>; 706def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>; 707def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>; 708 709//===----------------------------------------------------------------------===// 710// Access registers 711//===----------------------------------------------------------------------===// 712 713// Extract/set/copy access register 714def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>; 715 716// Load address extended 717def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>; 718 719// Load/store access multiple (not modeled precisely) 720def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>; 721def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STAM(Y)?$")>; 722 723//===----------------------------------------------------------------------===// 724// Program mask and addressing mode 725//===----------------------------------------------------------------------===// 726 727// Insert Program Mask 728def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>; 729 730// Set Program Mask 731def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>; 732 733// Branch and link 734def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>; 735 736// Test addressing mode 737def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>; 738 739// Set addressing mode 740def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>; 741 742// Branch (and save) and set mode. 743def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>; 744def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>; 745 746//===----------------------------------------------------------------------===// 747// Transactional execution 748//===----------------------------------------------------------------------===// 749 750// Transaction begin 751def : InstRW<[WLat9, LSU2, FXb5, GroupAlone2], (instregex "TBEGIN(C)?$")>; 752 753// Transaction end 754def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>; 755 756// Transaction abort 757def : InstRW<[WLat30, MCD], (instregex "TABORT$")>; 758 759// Extract Transaction Nesting Depth 760def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>; 761 762// Nontransactional store 763def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>; 764 765//===----------------------------------------------------------------------===// 766// Processor assist 767//===----------------------------------------------------------------------===// 768 769def : InstRW<[WLat1, FXb, GroupAlone], (instregex "PPA$")>; 770 771//===----------------------------------------------------------------------===// 772// Miscellaneous Instructions. 773//===----------------------------------------------------------------------===// 774 775// Find leftmost one 776def : InstRW<[WLat5, WLat5, FXa2, GroupAlone], (instregex "FLOGR$")>; 777 778// Population count 779def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT(Opt)?$")>; 780 781// String instructions 782def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>; 783def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>; 784 785// Various complex instructions 786def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>; 787def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD], 788 (instregex "UPT$")>; 789def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>; 790def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>; 791def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "SORTL$")>; 792def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "DFLTCC$")>; 793 794// Execute 795def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>; 796 797//===----------------------------------------------------------------------===// 798// .insn directive instructions 799//===----------------------------------------------------------------------===// 800 801// An "empty" sched-class will be assigned instead of the "invalid sched-class". 802// getNumDecoderSlots() will then return 1 instead of 0. 803def : InstRW<[], (instregex "Insn.*")>; 804 805 806// ----------------------------- Floating point ----------------------------- // 807 808//===----------------------------------------------------------------------===// 809// FP: Move instructions 810//===----------------------------------------------------------------------===// 811 812// Load zero 813def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>; 814def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>; 815 816// Load 817def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>; 818def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>; 819def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>; 820def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>; 821 822// Load and Test 823def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>; 824def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BRCompare$")>; 825def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], 826 (instregex "LTXBR(Compare)?$")>; 827 828// Copy sign 829def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>; 830 831//===----------------------------------------------------------------------===// 832// FP: Load instructions 833//===----------------------------------------------------------------------===// 834 835def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>; 836def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>; 837def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>; 838 839//===----------------------------------------------------------------------===// 840// FP: Store instructions 841//===----------------------------------------------------------------------===// 842 843def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>; 844def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>; 845 846//===----------------------------------------------------------------------===// 847// FP: Conversion instructions 848//===----------------------------------------------------------------------===// 849 850// Load rounded 851def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LEDBR(A)?$")>; 852def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>; 853 854// Load lengthened 855def : InstRW<[WLat6LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>; 856def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LDEBR$")>; 857def : InstRW<[WLat7LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>; 858def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>; 859 860// Convert from fixed / logical 861def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>; 862def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)BR(A)?$")>; 863def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>; 864def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)BR$")>; 865 866// Convert to fixed / logical 867def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], 868 (instregex "C(F|G)(E|D)BR(A)?$")>; 869def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], 870 (instregex "C(F|G)XBR(A)?$")>; 871def : InstRW<[WLat9, WLat9, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>; 872def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "CLFDBR$")>; 873def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>; 874def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>; 875 876//===----------------------------------------------------------------------===// 877// FP: Unary arithmetic 878//===----------------------------------------------------------------------===// 879 880// Load Complement / Negative / Positive 881def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>; 882def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>; 883def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>; 884 885// Square root 886def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>; 887def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>; 888def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>; 889 890// Load FP integer 891def : InstRW<[WLat6, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>; 892def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>; 893 894//===----------------------------------------------------------------------===// 895// FP: Binary arithmetic 896//===----------------------------------------------------------------------===// 897 898// Addition 899def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr], 900 (instregex "A(E|D)B$")>; 901def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "A(E|D)BR$")>; 902def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>; 903 904// Subtraction 905def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr], 906 (instregex "S(E|D)B$")>; 907def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "S(E|D)BR$")>; 908def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>; 909 910// Multiply 911def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr], 912 (instregex "M(D|DE|EE)B$")>; 913def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>; 914def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 915 (instregex "MXDB$")>; 916def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MXDBR$")>; 917def : InstRW<[WLat15, VecDF4, GroupAlone], (instregex "MXBR$")>; 918 919// Multiply and add / subtract 920def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 921 (instregex "M(A|S)EB$")>; 922def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>; 923def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 924 (instregex "M(A|S)DB$")>; 925def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(A|S)DBR$")>; 926 927// Division 928def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], 929 (instregex "D(E|D)B$")>; 930def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>; 931def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>; 932 933// Divide to integer 934def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>; 935 936//===----------------------------------------------------------------------===// 937// FP: Comparisons 938//===----------------------------------------------------------------------===// 939 940// Compare 941def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 942 (instregex "(K|C)(E|D)B$")>; 943def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>; 944def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>; 945 946// Test Data Class 947def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>; 948def : InstRW<[WLat10, LSU, VecDF4, GroupAlone], (instregex "TCXB$")>; 949 950//===----------------------------------------------------------------------===// 951// FP: Floating-point control register instructions 952//===----------------------------------------------------------------------===// 953 954def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>; 955def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>; 956def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>; 957def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>; 958def : InstRW<[WLat30, MCD], (instregex "SFASR$")>; 959def : InstRW<[WLat30, MCD], (instregex "LFAS$")>; 960def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>; 961 962 963// --------------------- Hexadecimal floating point ------------------------- // 964 965//===----------------------------------------------------------------------===// 966// HFP: Move instructions 967//===----------------------------------------------------------------------===// 968 969// Load and Test 970def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>; 971def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>; 972 973//===----------------------------------------------------------------------===// 974// HFP: Conversion instructions 975//===----------------------------------------------------------------------===// 976 977// Load rounded 978def : InstRW<[WLat6, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>; 979def : InstRW<[WLat6, VecBF, NormalGr], (instregex "LEXR$")>; 980def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>; 981 982// Load lengthened 983def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>; 984def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>; 985def : InstRW<[WLat7LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>; 986def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>; 987 988// Convert from fixed 989def : InstRW<[WLat7, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>; 990def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)R$")>; 991 992// Convert to fixed 993def : InstRW<[WLat9, WLat9, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>; 994def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>; 995 996// Convert BFP to HFP / HFP to BFP. 997def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "THD(E)?R$")>; 998def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "TB(E)?DR$")>; 999 1000//===----------------------------------------------------------------------===// 1001// HFP: Unary arithmetic 1002//===----------------------------------------------------------------------===// 1003 1004// Load Complement / Negative / Positive 1005def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>; 1006def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>; 1007 1008// Halve 1009def : InstRW<[WLat6, VecBF, NormalGr], (instregex "H(E|D)R$")>; 1010 1011// Square root 1012def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>; 1013def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>; 1014def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>; 1015 1016// Load FP integer 1017def : InstRW<[WLat6, VecBF, NormalGr], (instregex "FI(E|D)R$")>; 1018def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>; 1019 1020//===----------------------------------------------------------------------===// 1021// HFP: Binary arithmetic 1022//===----------------------------------------------------------------------===// 1023 1024// Addition 1025def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr], 1026 (instregex "A(E|D|U|W)$")>; 1027def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>; 1028def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>; 1029 1030// Subtraction 1031def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr], 1032 (instregex "S(E|D|U|W)$")>; 1033def : InstRW<[WLat6, WLat6, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>; 1034def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>; 1035 1036// Multiply 1037def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr], 1038 (instregex "M(D|DE|E|EE)$")>; 1039def : InstRW<[WLat6, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>; 1040def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 1041 (instregex "MXD$")>; 1042def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MXDR$")>; 1043def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>; 1044def : InstRW<[WLat7LSU, RegReadAdv, VecBF4, LSU, GroupAlone], (instregex "MY$")>; 1045def : InstRW<[WLat6LSU, RegReadAdv, VecBF2, LSU, GroupAlone], 1046 (instregex "MY(H|L)$")>; 1047def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MYR$")>; 1048def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "MY(H|L)R$")>; 1049 1050// Multiply and add / subtract 1051def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 1052 (instregex "M(A|S)(E|D)$")>; 1053def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>; 1054def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone], 1055 (instregex "MAY$")>; 1056def : InstRW<[WLat6LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 1057 (instregex "MAY(H|L)$")>; 1058def : InstRW<[WLat7, VecBF4, GroupAlone], (instregex "MAYR$")>; 1059def : InstRW<[WLat6, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>; 1060 1061// Division 1062def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], (instregex "D(E|D)$")>; 1063def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>; 1064def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>; 1065 1066//===----------------------------------------------------------------------===// 1067// HFP: Comparisons 1068//===----------------------------------------------------------------------===// 1069 1070// Compare 1071def : InstRW<[WLat6LSU, RegReadAdv, VecBF, LSU, NormalGr], 1072 (instregex "C(E|D)$")>; 1073def : InstRW<[WLat6, VecBF, NormalGr], (instregex "C(E|D)R$")>; 1074def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>; 1075 1076 1077// ------------------------ Decimal floating point -------------------------- // 1078 1079//===----------------------------------------------------------------------===// 1080// DFP: Move instructions 1081//===----------------------------------------------------------------------===// 1082 1083// Load and Test 1084def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>; 1085def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>; 1086 1087//===----------------------------------------------------------------------===// 1088// DFP: Conversion instructions 1089//===----------------------------------------------------------------------===// 1090 1091// Load rounded 1092def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>; 1093def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>; 1094 1095// Load lengthened 1096def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>; 1097def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>; 1098 1099// Convert from fixed / logical 1100def : InstRW<[WLat15, FXb, VecDF, Cracked], (instregex "CDFTR(A)?$")>; 1101def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDGTR(A)?$")>; 1102def : InstRW<[WLat15, FXb, VecDF4, GroupAlone2], (instregex "CXFTR(A)?$")>; 1103def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXGTR(A)?$")>; 1104def : InstRW<[WLat15, FXb, VecDF, Cracked], (instregex "CDLFTR$")>; 1105def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDLGTR$")>; 1106def : InstRW<[WLat15, FXb, VecDF4, GroupAlone2], (instregex "CXLFTR$")>; 1107def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXLGTR$")>; 1108 1109// Convert to fixed / logical 1110def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], 1111 (instregex "C(F|G)DTR(A)?$")>; 1112def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], 1113 (instregex "C(F|G)XTR(A)?$")>; 1114def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>; 1115def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>; 1116 1117// Convert from / to signed / unsigned packed 1118def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>; 1119def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone2], (instregex "CX(S|U)TR$")>; 1120def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>; 1121def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone2], (instregex "C(S|U)XTR$")>; 1122 1123// Convert from / to zoned 1124def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>; 1125def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXZT$")>; 1126def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>; 1127def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>; 1128 1129// Convert from / to packed 1130def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>; 1131def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXPT$")>; 1132def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>; 1133def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>; 1134 1135// Perform floating-point operation 1136def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>; 1137 1138//===----------------------------------------------------------------------===// 1139// DFP: Unary arithmetic 1140//===----------------------------------------------------------------------===// 1141 1142// Load FP integer 1143def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>; 1144def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>; 1145 1146// Extract biased exponent 1147def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>; 1148def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>; 1149 1150// Extract significance 1151def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>; 1152def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>; 1153 1154//===----------------------------------------------------------------------===// 1155// DFP: Binary arithmetic 1156//===----------------------------------------------------------------------===// 1157 1158// Addition 1159def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>; 1160def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>; 1161 1162// Subtraction 1163def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>; 1164def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>; 1165 1166// Multiply 1167def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>; 1168def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>; 1169 1170// Division 1171def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>; 1172def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>; 1173 1174// Quantize 1175def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>; 1176def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>; 1177 1178// Reround 1179def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>; 1180def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone2], (instregex "RRXTR$")>; 1181 1182// Shift significand left/right 1183def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>; 1184def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>; 1185 1186// Insert biased exponent 1187def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>; 1188def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "IEXTR$")>; 1189 1190//===----------------------------------------------------------------------===// 1191// DFP: Comparisons 1192//===----------------------------------------------------------------------===// 1193 1194// Compare 1195def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>; 1196def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>; 1197 1198// Compare biased exponent 1199def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>; 1200def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>; 1201 1202// Test Data Class/Group 1203def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>; 1204def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>; 1205 1206 1207// --------------------------------- Vector --------------------------------- // 1208 1209//===----------------------------------------------------------------------===// 1210// Vector: Move instructions 1211//===----------------------------------------------------------------------===// 1212 1213def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>; 1214def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>; 1215def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>; 1216def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>; 1217 1218//===----------------------------------------------------------------------===// 1219// Vector: Immediate instructions 1220//===----------------------------------------------------------------------===// 1221 1222def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>; 1223def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>; 1224def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>; 1225def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>; 1226def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>; 1227def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>; 1228 1229//===----------------------------------------------------------------------===// 1230// Vector: Loads 1231//===----------------------------------------------------------------------===// 1232 1233def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(Align)?$")>; 1234def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(L|BB)$")>; 1235def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>; 1236def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H|LF)?$")>; 1237def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>; 1238def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 1239 (instregex "VLE(B|F|G|H)$")>; 1240def : InstRW<[WLat5LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked], 1241 (instregex "VGE(F|G)$")>; 1242def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone], 1243 (instregex "VLM(Align)?$")>; 1244def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLRL(R)?$")>; 1245 1246//===----------------------------------------------------------------------===// 1247// Vector: Stores 1248//===----------------------------------------------------------------------===// 1249 1250def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|32|64)?$")>; 1251def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>; 1252def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>; 1253def : InstRW<[WLat1, LSU2, FXb3, GroupAlone2], (instregex "VSTM(Align)?$")>; 1254def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>; 1255def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTRL(R)?$")>; 1256 1257//===----------------------------------------------------------------------===// 1258// Vector: Byte swaps 1259//===----------------------------------------------------------------------===// 1260 1261def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLBR(H|F|G|Q)?$")>; 1262def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLER(H|F|G)?$")>; 1263def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 1264 (instregex "VLEBR(H|F|G)$")>; 1265def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEBRZ(H|F|G|E)?$")>; 1266def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLBRREP(H|F|G)?$")>; 1267def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTBR(H|F|G|Q)?$")>; 1268def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTER(H|F|G)?$")>; 1269def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTEBRH$")>; 1270def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTEBR(F|G)$")>; 1271 1272//===----------------------------------------------------------------------===// 1273// Vector: Selects and permutes 1274//===----------------------------------------------------------------------===// 1275 1276def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>; 1277def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>; 1278def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>; 1279def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>; 1280def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VBPERM$")>; 1281def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>; 1282def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>; 1283 1284//===----------------------------------------------------------------------===// 1285// Vector: Widening and narrowing 1286//===----------------------------------------------------------------------===// 1287 1288def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>; 1289def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>; 1290def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>; 1291def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>; 1292def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>; 1293def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>; 1294def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>; 1295def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>; 1296def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>; 1297def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>; 1298 1299//===----------------------------------------------------------------------===// 1300// Vector: Integer arithmetic 1301//===----------------------------------------------------------------------===// 1302 1303def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>; 1304def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>; 1305def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>; 1306def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>; 1307def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O|N|X)?$")>; 1308def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO(C)?$")>; 1309def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>; 1310def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>; 1311def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>; 1312def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>; 1313def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>; 1314def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>; 1315def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>; 1316def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>; 1317def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>; 1318def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>; 1319def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>; 1320def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>; 1321def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>; 1322def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>; 1323def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>; 1324def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>; 1325def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>; 1326def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>; 1327def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>; 1328def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>; 1329def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>; 1330def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>; 1331def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>; 1332def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>; 1333def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>; 1334def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>; 1335def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>; 1336def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VMSL(G)?$")>; 1337 1338def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT(B|F|G|H)?$")>; 1339 1340def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>; 1341def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>; 1342def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>; 1343def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>; 1344def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>; 1345def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>; 1346def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>; 1347def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>; 1348def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>; 1349 1350def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>; 1351def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLB$")>; 1352def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>; 1353def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>; 1354def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLD$")>; 1355def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSRD$")>; 1356 1357def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>; 1358def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>; 1359def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>; 1360 1361def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>; 1362def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>; 1363def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>; 1364 1365//===----------------------------------------------------------------------===// 1366// Vector: Integer comparison 1367//===----------------------------------------------------------------------===// 1368 1369def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>; 1370def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>; 1371def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>; 1372def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>; 1373def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>; 1374def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>; 1375def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>; 1376def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>; 1377def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>; 1378 1379//===----------------------------------------------------------------------===// 1380// Vector: Floating-point arithmetic 1381//===----------------------------------------------------------------------===// 1382 1383// Conversion and rounding 1384def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCFP(S|L)$")>; 1385def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCD(L)?G$")>; 1386def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCD(L)?GB$")>; 1387def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WCD(L)?GB$")>; 1388def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VCE(L)?FB$")>; 1389def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WCE(L)?FB$")>; 1390def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(S|L)FP$")>; 1391def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?GD$")>; 1392def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?GDB$")>; 1393def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WC(L)?GDB$")>; 1394def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VC(L)?FEB$")>; 1395def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WC(L)?FEB$")>; 1396def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VL(DE|ED)$")>; 1397def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VL(DE|ED)B$")>; 1398def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>; 1399def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFL(L|R)$")>; 1400def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFL(LS|RD)$")>; 1401def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFL(LS|RD)$")>; 1402def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFLLD$")>; 1403def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFLRX$")>; 1404def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFI(DB)?$")>; 1405def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFIDB$")>; 1406def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFISB$")>; 1407def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFISB$")>; 1408def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFIXB$")>; 1409 1410// Sign operations 1411def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>; 1412def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>; 1413def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSOSB$")>; 1414def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFPSOXB$")>; 1415def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>; 1416def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)SB$")>; 1417def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFL(C|N|P)XB$")>; 1418 1419// Minimum / maximum 1420def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)$")>; 1421def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)DB$")>; 1422def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)DB$")>; 1423def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)SB$")>; 1424def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)SB$")>; 1425def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WF(MAX|MIN)XB$")>; 1426 1427// Test data class 1428def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>; 1429def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>; 1430def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCISB$")>; 1431def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFTCIXB$")>; 1432 1433// Add / subtract 1434def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)$")>; 1435def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)DB$")>; 1436def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(A|S)DB$")>; 1437def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(A|S)SB$")>; 1438def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(A|S)SB$")>; 1439def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WF(A|S)XB$")>; 1440 1441// Multiply / multiply-and-add/subtract 1442def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFM(DB)?$")>; 1443def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WFM(D|S)B$")>; 1444def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VFMSB$")>; 1445def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WFMXB$")>; 1446def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)$")>; 1447def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>; 1448def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>; 1449def : InstRW<[WLat6, VecBF, NormalGr], (instregex "VF(N)?M(A|S)SB$")>; 1450def : InstRW<[WLat6, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>; 1451def : InstRW<[WLat30, VecDF2, NormalGr], (instregex "WF(N)?M(A|S)XB$")>; 1452 1453// Divide / square root 1454def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>; 1455def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>; 1456def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDSB$")>; 1457def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFDXB$")>; 1458def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>; 1459def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>; 1460def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQSB$")>; 1461def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFSQXB$")>; 1462 1463//===----------------------------------------------------------------------===// 1464// Vector: Floating-point comparison 1465//===----------------------------------------------------------------------===// 1466 1467def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)$")>; 1468def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)DB$")>; 1469def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>; 1470def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)DB$")>; 1471def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)SB$")>; 1472def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SB$")>; 1473def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SB$")>; 1474def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XB$")>; 1475def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XB$")>; 1476def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>; 1477def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFK(E|H|HE)DBS$")>; 1478def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], 1479 (instregex "WF(C|K)(E|H|HE)DBS$")>; 1480def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], 1481 (instregex "VF(C|K)(E|H|HE)SBS$")>; 1482def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SBS$")>; 1483def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SBS$")>; 1484def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XBS$")>; 1485def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XBS$")>; 1486def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>; 1487def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>; 1488def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)SB$")>; 1489def : InstRW<[WLat3, VecDFX, NormalGr], (instregex "WF(C|K)XB$")>; 1490 1491//===----------------------------------------------------------------------===// 1492// Vector: Floating-point insertion and extraction 1493//===----------------------------------------------------------------------===// 1494 1495def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>; 1496def : InstRW<[WLat3, FXb, NormalGr], (instregex "LFER$")>; 1497 1498//===----------------------------------------------------------------------===// 1499// Vector: String instructions 1500//===----------------------------------------------------------------------===// 1501 1502def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>; 1503def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>; 1504def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>; 1505def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>; 1506def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>; 1507def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>; 1508def : InstRW<[WLat4, WLat4, VecStr, NormalGr], 1509 (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>; 1510def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>; 1511def : InstRW<[WLat4, WLat4, VecStr, NormalGr], 1512 (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>; 1513def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>; 1514def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>; 1515def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>; 1516def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>; 1517def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>; 1518def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>; 1519def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRS(B|F|H)?$")>; 1520def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRSZ(B|F|H)$")>; 1521 1522//===----------------------------------------------------------------------===// 1523// Vector: Packed-decimal instructions 1524//===----------------------------------------------------------------------===// 1525 1526def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "VLIP$")>; 1527def : InstRW<[WLat6, VecDFX, LSU, GroupAlone2], (instregex "VPKZ$")>; 1528def : InstRW<[WLat1, VecDFX, FXb, LSU2, GroupAlone2], (instregex "VUPKZ$")>; 1529def : InstRW<[WLat20, WLat20, VecDF2, FXb, GroupAlone], 1530 (instregex "VCVB(G)?(Opt)?$")>; 1531def : InstRW<[WLat15, WLat15, VecDF2, FXb, GroupAlone], 1532 (instregex "VCVD(G)?$")>; 1533def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "V(A|S)P$")>; 1534def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "VM(S)?P$")>; 1535def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "V(D|R)P$")>; 1536def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "VSDP$")>; 1537def : InstRW<[WLat10, WLat10, VecDF2, NormalGr], (instregex "VSRP$")>; 1538def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "VPSOP$")>; 1539def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "V(T|C)P$")>; 1540 1541 1542// -------------------------------- System ---------------------------------- // 1543 1544//===----------------------------------------------------------------------===// 1545// System: Program-Status Word Instructions 1546//===----------------------------------------------------------------------===// 1547 1548def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>; 1549def : InstRW<[WLat20, GroupAlone3], (instregex "LPSW(E)?$")>; 1550def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>; 1551def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>; 1552def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>; 1553def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>; 1554def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>; 1555def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>; 1556 1557//===----------------------------------------------------------------------===// 1558// System: Control Register Instructions 1559//===----------------------------------------------------------------------===// 1560 1561def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>; 1562def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STCT(L|G)$")>; 1563def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>; 1564def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>; 1565def : InstRW<[WLat30, MCD], (instregex "ESEA$")>; 1566 1567//===----------------------------------------------------------------------===// 1568// System: Prefix-Register Instructions 1569//===----------------------------------------------------------------------===// 1570 1571def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>; 1572 1573//===----------------------------------------------------------------------===// 1574// System: Storage-Key and Real Memory Instructions 1575//===----------------------------------------------------------------------===// 1576 1577def : InstRW<[WLat30, MCD], (instregex "ISKE$")>; 1578def : InstRW<[WLat30, MCD], (instregex "IVSK$")>; 1579def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>; 1580def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>; 1581def : InstRW<[WLat30, MCD], (instregex "IRBM$")>; 1582def : InstRW<[WLat30, MCD], (instregex "PFMF$")>; 1583def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>; 1584def : InstRW<[WLat30, MCD], (instregex "PGIN$")>; 1585def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>; 1586 1587//===----------------------------------------------------------------------===// 1588// System: Dynamic-Address-Translation Instructions 1589//===----------------------------------------------------------------------===// 1590 1591def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>; 1592def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>; 1593def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>; 1594def : InstRW<[WLat30, MCD], (instregex "PTLB$")>; 1595def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>; 1596def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>; 1597def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>; 1598def : InstRW<[WLat30, MCD], (instregex "STRAG$")>; 1599def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>; 1600def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>; 1601def : InstRW<[WLat30, MCD], (instregex "TPROT$")>; 1602 1603//===----------------------------------------------------------------------===// 1604// System: Memory-move Instructions 1605//===----------------------------------------------------------------------===// 1606 1607def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>; 1608def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>; 1609def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>; 1610def : InstRW<[WLat30, MCD], (instregex "MVPG$")>; 1611 1612//===----------------------------------------------------------------------===// 1613// System: Address-Space Instructions 1614//===----------------------------------------------------------------------===// 1615 1616def : InstRW<[WLat30, MCD], (instregex "LASP$")>; 1617def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>; 1618def : InstRW<[WLat30, MCD], (instregex "PC$")>; 1619def : InstRW<[WLat30, MCD], (instregex "PR$")>; 1620def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>; 1621def : InstRW<[WLat30, MCD], (instregex "RP$")>; 1622def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>; 1623def : InstRW<[WLat30, MCD], (instregex "TAR$")>; 1624 1625//===----------------------------------------------------------------------===// 1626// System: Linkage-Stack Instructions 1627//===----------------------------------------------------------------------===// 1628 1629def : InstRW<[WLat30, MCD], (instregex "BAKR$")>; 1630def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>; 1631def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>; 1632 1633//===----------------------------------------------------------------------===// 1634// System: Time-Related Instructions 1635//===----------------------------------------------------------------------===// 1636 1637def : InstRW<[WLat30, MCD], (instregex "PTFF$")>; 1638def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>; 1639def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>; 1640def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone2], (instregex "STCK(F)?$")>; 1641def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone3], (instregex "STCKE$")>; 1642def : InstRW<[WLat30, MCD], (instregex "STCKC$")>; 1643def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>; 1644 1645//===----------------------------------------------------------------------===// 1646// System: CPU-Related Instructions 1647//===----------------------------------------------------------------------===// 1648 1649def : InstRW<[WLat30, MCD], (instregex "STAP$")>; 1650def : InstRW<[WLat30, MCD], (instregex "STIDP$")>; 1651def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>; 1652def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>; 1653def : InstRW<[WLat30, MCD], (instregex "ECAG$")>; 1654def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>; 1655def : InstRW<[WLat30, MCD], (instregex "PTF$")>; 1656def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>; 1657 1658//===----------------------------------------------------------------------===// 1659// System: Miscellaneous Instructions 1660//===----------------------------------------------------------------------===// 1661 1662def : InstRW<[WLat30, MCD], (instregex "SVC$")>; 1663def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>; 1664def : InstRW<[WLat30, MCD], (instregex "DIAG$")>; 1665def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>; 1666def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>; 1667def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>; 1668def : InstRW<[WLat30, MCD], (instregex "SIE$")>; 1669 1670//===----------------------------------------------------------------------===// 1671// System: CPU-Measurement Facility Instructions 1672//===----------------------------------------------------------------------===// 1673 1674def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>; 1675def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>; 1676def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>; 1677def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>; 1678def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>; 1679def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>; 1680def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>; 1681 1682//===----------------------------------------------------------------------===// 1683// System: I/O Instructions 1684//===----------------------------------------------------------------------===// 1685 1686def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>; 1687def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>; 1688def : InstRW<[WLat30, MCD], (instregex "RCHP$")>; 1689def : InstRW<[WLat30, MCD], (instregex "SCHM$")>; 1690def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>; 1691def : InstRW<[WLat30, MCD], (instregex "TPI$")>; 1692def : InstRW<[WLat30, MCD], (instregex "SAL$")>; 1693 1694} 1695 1696