1//-- SystemZScheduleZ14.td - SystemZ Scheduling Definitions ----*- tblgen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file defines the machine model for Z14 to support instruction 10// scheduling and other instruction cost heuristics. 11// 12// Pseudos expanded right after isel do not need to be modelled here. 13// 14//===----------------------------------------------------------------------===// 15 16def Z14Model : SchedMachineModel { 17 18 let UnsupportedFeatures = Arch12UnsupportedFeatures.List; 19 20 let IssueWidth = 6; // Number of instructions decoded per cycle. 21 let MicroOpBufferSize = 60; // Issue queues 22 let LoadLatency = 1; // Optimistic load latency. 23 24 let PostRAScheduler = 1; 25 26 // Extra cycles for a mispredicted branch. 27 let MispredictPenalty = 20; 28} 29 30let SchedModel = Z14Model in { 31// These definitions need the SchedModel value. They could be put in a 32// subtarget common include file, but it seems the include system in Tablegen 33// currently (2016) rejects multiple includes of same file. 34 35// Decoder grouping rules 36let NumMicroOps = 1 in { 37 def : WriteRes<NormalGr, []>; 38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; } 39 def : WriteRes<EndGroup, []> { let EndGroup = 1; } 40} 41def : WriteRes<Cracked, []> { 42 let NumMicroOps = 2; 43 let BeginGroup = 1; 44} 45def : WriteRes<GroupAlone, []> { 46 let NumMicroOps = 3; 47 let BeginGroup = 1; 48 let EndGroup = 1; 49} 50def : WriteRes<GroupAlone2, []> { 51 let NumMicroOps = 6; 52 let BeginGroup = 1; 53 let EndGroup = 1; 54} 55def : WriteRes<GroupAlone3, []> { 56 let NumMicroOps = 9; 57 let BeginGroup = 1; 58 let EndGroup = 1; 59} 60 61// Incoming latency removed from the register operand which is used together 62// with a memory operand by the instruction. 63def : ReadAdvance<RegReadAdv, 4>; 64 65// LoadLatency (above) is not used for instructions in this file. This is 66// instead the role of LSULatency, which is the latency value added to the 67// result of loads and instructions with folded memory operands. 68def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; } 69 70let NumMicroOps = 0 in { 71 foreach L = 1-30 in 72 def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; } 73} 74 75// Execution units. 76def Z14_FXaUnit : ProcResource<2>; 77def Z14_FXbUnit : ProcResource<2>; 78def Z14_LSUnit : ProcResource<2>; 79def Z14_VecUnit : ProcResource<2>; 80def Z14_VecFPdUnit : ProcResource<2> { let BufferSize = 1; /* blocking */ } 81def Z14_VBUnit : ProcResource<2>; 82def Z14_MCD : ProcResource<1>; 83 84// Subtarget specific definitions of scheduling resources. 85let NumMicroOps = 0 in { 86 def : WriteRes<FXa, [Z14_FXaUnit]>; 87 def : WriteRes<FXb, [Z14_FXbUnit]>; 88 def : WriteRes<LSU, [Z14_LSUnit]>; 89 def : WriteRes<VecBF, [Z14_VecUnit]>; 90 def : WriteRes<VecDF, [Z14_VecUnit]>; 91 def : WriteRes<VecDFX, [Z14_VecUnit]>; 92 def : WriteRes<VecMul, [Z14_VecUnit]>; 93 def : WriteRes<VecStr, [Z14_VecUnit]>; 94 def : WriteRes<VecXsPm, [Z14_VecUnit]>; 95 foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in { 96 def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z14_FXaUnit]>; 97 def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z14_FXbUnit]>; 98 def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z14_LSUnit]>; 99 def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z14_VecUnit]>; 100 def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z14_VecUnit]>; 101 def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z14_VecUnit]>; 102 def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z14_VecUnit]>; 103 def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z14_VecUnit]>; 104 def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z14_VecUnit]>; 105 }} 106 107 def : WriteRes<VecFPd, [Z14_VecFPdUnit]> { let ReleaseAtCycles = [30]; } 108 109 def : WriteRes<VBU, [Z14_VBUnit]>; // Virtual Branching Unit 110} 111 112def : WriteRes<MCD, [Z14_MCD]> { let NumMicroOps = 3; 113 let BeginGroup = 1; 114 let EndGroup = 1; } 115 116// -------------------------- INSTRUCTIONS ---------------------------------- // 117 118// InstRW constructs have been used in order to preserve the 119// readability of the InstrInfo files. 120 121// For each instruction, as matched by a regexp, provide a list of 122// resources that it needs. These will be combined into a SchedClass. 123 124//===----------------------------------------------------------------------===// 125// Stack allocation 126//===----------------------------------------------------------------------===// 127 128// Pseudo -> LA / LAY 129def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>; 130 131//===----------------------------------------------------------------------===// 132// Branch instructions 133//===----------------------------------------------------------------------===// 134 135// Branch 136def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>; 137def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>; 138def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>; 139def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>; 140def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "BI(C)?(Asm.*)?$")>; 141def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>; 142def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>; 143def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>; 144def : InstRW<[WLat1, FXa2, FXb2, GroupAlone2], 145 (instregex "B(R)?X(H|L).*$")>; 146 147// Compare and branch 148def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>; 149def : InstRW<[WLat1, FXb2, GroupAlone], 150 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>; 151 152//===----------------------------------------------------------------------===// 153// Trap instructions 154//===----------------------------------------------------------------------===// 155 156// Trap 157def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>; 158 159// Compare and trap 160def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>; 161def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>; 162def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>; 163def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>; 164 165//===----------------------------------------------------------------------===// 166// Call and return instructions 167//===----------------------------------------------------------------------===// 168 169// Call 170def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>; 171def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL(_XPLINK64)?$")>; 172def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?(_XPLINK64|_STACKEXT)?$")>; 173def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>; 174 175// Return 176def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return(_XPLINK)?$")>; 177def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn(_XPLINK)?$")>; 178 179//===----------------------------------------------------------------------===// 180// Move instructions 181//===----------------------------------------------------------------------===// 182 183// Moves 184def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>; 185def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>; 186 187// Move character 188def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>; 189def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>; 190 191// Pseudo -> reg move 192def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>; 193def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>; 194def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>; 195def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>; 196 197// Loads 198def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>; 199def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>; 200def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>; 201def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>; 202 203def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>; 204def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>; 205 206def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>; 207def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>; 208def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR$")>; 209 210// Load and zero rightmost byte 211def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>; 212 213// Load and trap 214def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>; 215 216// Load and test 217def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>; 218def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>; 219 220// Stores 221def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>; 222def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>; 223def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>; 224 225// String moves. 226def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>; 227 228//===----------------------------------------------------------------------===// 229// Conditional move instructions 230//===----------------------------------------------------------------------===// 231 232def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>; 233def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>; 234def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>; 235def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 236 (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>; 237def : InstRW<[WLat1, FXb, LSU, NormalGr], 238 (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>; 239 240//===----------------------------------------------------------------------===// 241// Sign extensions 242//===----------------------------------------------------------------------===// 243 244def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>; 245def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>; 246 247def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>; 248def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>; 249 250def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>; 251def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>; 252def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>; 253def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>; 254def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>; 255 256//===----------------------------------------------------------------------===// 257// Zero extensions 258//===----------------------------------------------------------------------===// 259 260def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>; 261def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>; 262def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>; 263def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>; 264def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>; 265def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>; 266def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>; 267def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>; 268 269// Load and zero rightmost byte 270def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>; 271 272// Load and trap 273def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>; 274 275//===----------------------------------------------------------------------===// 276// Truncations 277//===----------------------------------------------------------------------===// 278 279def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 280def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>; 281def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>; 282 283//===----------------------------------------------------------------------===// 284// Multi-register moves 285//===----------------------------------------------------------------------===// 286 287// Load multiple (estimated average of 5 ops) 288def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>; 289 290// Load multiple disjoint 291def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>; 292 293// Store multiple 294def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>; 295 296//===----------------------------------------------------------------------===// 297// Byte swaps 298//===----------------------------------------------------------------------===// 299 300def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>; 301def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>; 302def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>; 303def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>; 304 305//===----------------------------------------------------------------------===// 306// Load address instructions 307//===----------------------------------------------------------------------===// 308 309def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>; 310 311// Load the Global Offset Table address ( -> larl ) 312def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>; 313 314//===----------------------------------------------------------------------===// 315// Absolute and Negation 316//===----------------------------------------------------------------------===// 317 318def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LP(G)?R$")>; 319def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "L(N|P)GFR$")>; 320def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LN(R|GR)$")>; 321def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>; 322def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>; 323 324//===----------------------------------------------------------------------===// 325// Insertion 326//===----------------------------------------------------------------------===// 327 328def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>; 329def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 330 (instregex "IC32(Y)?$")>; 331def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr], 332 (instregex "ICM(H|Y)?$")>; 333def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>; 334def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>; 335def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>; 336def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>; 337def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>; 338def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>; 339def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>; 340 341//===----------------------------------------------------------------------===// 342// Addition 343//===----------------------------------------------------------------------===// 344 345def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 346 (instregex "A(Y)?$")>; 347def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 348 (instregex "AH(Y)?$")>; 349def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>; 350def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>; 351def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 352 (instregex "AG$")>; 353def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>; 354def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>; 355def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>; 356def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>; 357def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>; 358def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 359 (instregex "AL(Y)?$")>; 360def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>; 361def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 362 (instregex "ALG(F)?$")>; 363def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>; 364def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>; 365def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>; 366def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>; 367def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>; 368def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>; 369def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>; 370def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>; 371def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>; 372 373// Logical addition with carry 374def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone], 375 (instregex "ALC(G)?$")>; 376def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>; 377 378// Add with sign extension (16/32 -> 64) 379def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 380 (instregex "AG(F|H)$")>; 381def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>; 382 383//===----------------------------------------------------------------------===// 384// Subtraction 385//===----------------------------------------------------------------------===// 386 387def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 388 (instregex "S(G|Y)?$")>; 389def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 390 (instregex "SH(Y)?$")>; 391def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>; 392def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>; 393def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 394 (instregex "SL(G|GF|Y)?$")>; 395def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>; 396def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>; 397def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>; 398def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>; 399def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>; 400def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>; 401 402// Subtraction with borrow 403def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone], 404 (instregex "SLB(G)?$")>; 405def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>; 406 407// Subtraction with sign extension (16/32 -> 64) 408def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 409 (instregex "SG(F|H)$")>; 410def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>; 411 412//===----------------------------------------------------------------------===// 413// AND 414//===----------------------------------------------------------------------===// 415 416def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 417 (instregex "N(G|Y)?$")>; 418def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>; 419def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>; 420def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>; 421def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>; 422def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>; 423def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>; 424def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>; 425def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>; 426def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>; 427def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>; 428def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>; 429 430//===----------------------------------------------------------------------===// 431// OR 432//===----------------------------------------------------------------------===// 433 434def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 435 (instregex "O(G|Y)?$")>; 436def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>; 437def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>; 438def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>; 439def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>; 440def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>; 441def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>; 442def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>; 443def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>; 444def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>; 445def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>; 446def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>; 447 448//===----------------------------------------------------------------------===// 449// XOR 450//===----------------------------------------------------------------------===// 451 452def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 453 (instregex "X(G|Y)?$")>; 454def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>; 455def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>; 456def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>; 457def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>; 458def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>; 459def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>; 460def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>; 461 462//===----------------------------------------------------------------------===// 463// Multiplication 464//===----------------------------------------------------------------------===// 465 466def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr], 467 (instregex "MS(GF|Y)?$")>; 468def : InstRW<[WLat5, FXa, NormalGr], (instregex "MS(R|FI)$")>; 469def : InstRW<[WLat7LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>; 470def : InstRW<[WLat7, FXa, NormalGr], (instregex "MSGR$")>; 471def : InstRW<[WLat5, FXa, NormalGr], (instregex "MSGF(I|R)$")>; 472def : InstRW<[WLat8LSU, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MLG$")>; 473def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MLGR$")>; 474def : InstRW<[WLat4, FXa, NormalGr], (instregex "MGHI$")>; 475def : InstRW<[WLat4, FXa, NormalGr], (instregex "MHI$")>; 476def : InstRW<[WLat4LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>; 477def : InstRW<[WLat6, FXa2, GroupAlone], (instregex "M(L)?R$")>; 478def : InstRW<[WLat6LSU, RegReadAdv, FXa2, LSU, GroupAlone], 479 (instregex "M(FY|L)?$")>; 480def : InstRW<[WLat8, RegReadAdv, FXa, LSU, NormalGr], (instregex "MGH$")>; 481def : InstRW<[WLat12, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MG$")>; 482def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MGRK$")>; 483def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, FXa, LSU, NormalGr], 484 (instregex "MSC$")>; 485def : InstRW<[WLat8LSU, WLat8LSU, RegReadAdv, FXa, LSU, NormalGr], 486 (instregex "MSGC$")>; 487def : InstRW<[WLat6, WLat6, FXa, NormalGr], (instregex "MSRKC$")>; 488def : InstRW<[WLat8, WLat8, FXa, NormalGr], (instregex "MSGRKC$")>; 489 490//===----------------------------------------------------------------------===// 491// Division and remainder 492//===----------------------------------------------------------------------===// 493 494def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>; 495def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "D$")>; 496def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>; 497def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone2], 498 (instregex "DSG(F)?$")>; 499def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>; 500def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>; 501def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], 502 (instregex "DL(G)?$")>; 503 504//===----------------------------------------------------------------------===// 505// Shifts 506//===----------------------------------------------------------------------===// 507 508def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>; 509def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>; 510def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>; 511def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>; 512def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2], 513 (instregex "S(L|R)D(A|L)$")>; 514 515// Rotate 516def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>; 517 518// Rotate and insert 519def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>; 520def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>; 521def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>; 522def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>; 523 524// Rotate and Select 525def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>; 526 527//===----------------------------------------------------------------------===// 528// Comparison 529//===----------------------------------------------------------------------===// 530 531def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], 532 (instregex "C(G|Y|Mux)?$")>; 533def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>; 534def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>; 535def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>; 536def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>; 537def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>; 538def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>; 539def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>; 540def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>; 541def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], 542 (instregex "CL(Y|Mux)?$")>; 543def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>; 544def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>; 545def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>; 546def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>; 547def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>; 548def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>; 549def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>; 550def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>; 551def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>; 552def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>; 553def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>; 554def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>; 555def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>; 556def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>; 557def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>; 558def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>; 559def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>; 560 561// Compare halfword 562def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>; 563def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>; 564def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>; 565def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>; 566def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>; 567 568// Compare with sign extension (32 -> 64) 569def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>; 570def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>; 571def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>; 572 573// Compare logical character 574def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>; 575def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>; 576def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>; 577 578// Test under mask 579def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>; 580def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>; 581def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>; 582def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>; 583def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>; 584def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>; 585 586// Compare logical characters under mask 587def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], 588 (instregex "CLM(H|Y)?$")>; 589 590//===----------------------------------------------------------------------===// 591// Prefetch and execution hint 592//===----------------------------------------------------------------------===// 593 594def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>; 595def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>; 596def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>; 597def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>; 598 599//===----------------------------------------------------------------------===// 600// Atomic operations 601//===----------------------------------------------------------------------===// 602 603def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>; 604 605def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>; 606def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>; 607def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>; 608def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>; 609def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>; 610 611// Test and set 612def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>; 613 614// Compare and swap 615def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone], 616 (instregex "CS(G|Y)?$")>; 617 618// Compare double and swap 619def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone2], 620 (instregex "CDS(Y)?$")>; 621def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3, 622 GroupAlone3], (instregex "CDSG$")>; 623 624// Compare and swap and store 625def : InstRW<[WLat30, MCD], (instregex "CSST$")>; 626 627// Perform locked operation 628def : InstRW<[WLat30, MCD], (instregex "PLO$")>; 629 630// Load/store pair from/to quadword 631def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>; 632def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>; 633 634// Load pair disjoint 635def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>; 636 637//===----------------------------------------------------------------------===// 638// Translate and convert 639//===----------------------------------------------------------------------===// 640 641def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>; 642def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone2], 643 (instregex "TRT$")>; 644def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>; 645def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>; 646def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>; 647def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>; 648def : InstRW<[WLat30, WLat30, WLat30, MCD], 649 (instregex "CU(12|14|21|24|41|42)(Opt)?$")>; 650def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>; 651 652//===----------------------------------------------------------------------===// 653// Message-security assist 654//===----------------------------------------------------------------------===// 655 656def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], 657 (instregex "KM(C|F|O|CTR|A)?$")>; 658def : InstRW<[WLat30, WLat30, WLat30, MCD], 659 (instregex "(KIMD|KLMD|KMAC)$")>; 660def : InstRW<[WLat30, WLat30, WLat30, MCD], 661 (instregex "(PCC|PPNO|PRNO)$")>; 662 663//===----------------------------------------------------------------------===// 664// Guarded storage 665//===----------------------------------------------------------------------===// 666 667def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LGG$")>; 668def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLGFSG$")>; 669def : InstRW<[WLat30, MCD], (instregex "(L|ST)GSC$")>; 670 671//===----------------------------------------------------------------------===// 672// Decimal arithmetic 673//===----------------------------------------------------------------------===// 674 675def : InstRW<[WLat30, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone2], 676 (instregex "CVBG$")>; 677def : InstRW<[WLat30, RegReadAdv, FXb, VecDF, LSU, GroupAlone2], 678 (instregex "CVB(Y)?$")>; 679def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone3], (instregex "CVDG$")>; 680def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone2], (instregex "CVD(Y)?$")>; 681def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>; 682def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; 683def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>; 684def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>; 685 686def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone2], 687 (instregex "(A|S|ZA)P$")>; 688def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone2], (instregex "(M|D)P$")>; 689def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone3], (instregex "SRP$")>; 690def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>; 691def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>; 692def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>; 693 694//===----------------------------------------------------------------------===// 695// Access registers 696//===----------------------------------------------------------------------===// 697 698// Extract/set/copy access register 699def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>; 700 701// Load address extended 702def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>; 703 704// Load/store access multiple (not modeled precisely) 705def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>; 706def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STAM(Y)?$")>; 707 708//===----------------------------------------------------------------------===// 709// Program mask and addressing mode 710//===----------------------------------------------------------------------===// 711 712// Insert Program Mask 713def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>; 714 715// Set Program Mask 716def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>; 717 718// Branch and link 719def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>; 720 721// Test addressing mode 722def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>; 723 724// Set addressing mode 725def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>; 726 727// Branch (and save) and set mode. 728def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>; 729def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>; 730 731//===----------------------------------------------------------------------===// 732// Transactional execution 733//===----------------------------------------------------------------------===// 734 735// Transaction begin 736def : InstRW<[WLat9, LSU2, FXb5, GroupAlone2], (instregex "TBEGIN(C)?$")>; 737 738// Transaction end 739def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>; 740 741// Transaction abort 742def : InstRW<[WLat30, MCD], (instregex "TABORT$")>; 743 744// Extract Transaction Nesting Depth 745def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>; 746 747// Nontransactional store 748def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>; 749 750//===----------------------------------------------------------------------===// 751// Processor assist 752//===----------------------------------------------------------------------===// 753 754def : InstRW<[WLat1, FXb, GroupAlone], (instregex "PPA$")>; 755 756//===----------------------------------------------------------------------===// 757// Miscellaneous Instructions. 758//===----------------------------------------------------------------------===// 759 760// Find leftmost one 761def : InstRW<[WLat5, WLat5, FXa2, GroupAlone], (instregex "FLOGR$")>; 762 763// Population count 764def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT$")>; 765 766// String instructions 767def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>; 768def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>; 769 770// Various complex instructions 771def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>; 772def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD], 773 (instregex "UPT$")>; 774def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>; 775def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>; 776 777// Execute 778def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>; 779 780//===----------------------------------------------------------------------===// 781// .insn directive instructions 782//===----------------------------------------------------------------------===// 783 784// An "empty" sched-class will be assigned instead of the "invalid sched-class". 785// getNumDecoderSlots() will then return 1 instead of 0. 786def : InstRW<[], (instregex "Insn.*")>; 787 788 789// ----------------------------- Floating point ----------------------------- // 790 791//===----------------------------------------------------------------------===// 792// FP: Move instructions 793//===----------------------------------------------------------------------===// 794 795// Load zero 796def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>; 797def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>; 798 799// Load 800def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>; 801def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>; 802def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>; 803def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>; 804 805// Load and Test 806def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>; 807def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXBR$")>; 808 809// Copy sign 810def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>; 811 812//===----------------------------------------------------------------------===// 813// FP: Load instructions 814//===----------------------------------------------------------------------===// 815 816def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>; 817def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>; 818def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>; 819 820//===----------------------------------------------------------------------===// 821// FP: Store instructions 822//===----------------------------------------------------------------------===// 823 824def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>; 825def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>; 826 827//===----------------------------------------------------------------------===// 828// FP: Conversion instructions 829//===----------------------------------------------------------------------===// 830 831// Load rounded 832def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEDBR(A)?$")>; 833def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>; 834 835// Load lengthened 836def : InstRW<[WLat7LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>; 837def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LDEBR$")>; 838def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>; 839def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>; 840 841// Convert from fixed / logical 842def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>; 843def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)BR(A)?$")>; 844def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>; 845def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)BR$")>; 846 847// Convert to fixed / logical 848def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], 849 (instregex "C(F|G)(E|D)BR(A)?$")>; 850def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], 851 (instregex "C(F|G)XBR(A)?$")>; 852def : InstRW<[WLat10, WLat10, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>; 853def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLFDBR$")>; 854def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>; 855def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>; 856 857//===----------------------------------------------------------------------===// 858// FP: Unary arithmetic 859//===----------------------------------------------------------------------===// 860 861// Load Complement / Negative / Positive 862def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>; 863def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>; 864def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>; 865 866// Square root 867def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>; 868def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>; 869def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>; 870 871// Load FP integer 872def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>; 873def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>; 874 875//===----------------------------------------------------------------------===// 876// FP: Binary arithmetic 877//===----------------------------------------------------------------------===// 878 879// Addition 880def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 881 (instregex "A(E|D)B$")>; 882def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D)BR$")>; 883def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>; 884 885// Subtraction 886def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 887 (instregex "S(E|D)B$")>; 888def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D)BR$")>; 889def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>; 890 891// Multiply 892def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 893 (instregex "M(D|DE|EE)B$")>; 894def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>; 895def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 896 (instregex "MXDB$")>; 897def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDBR$")>; 898def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>; 899 900// Multiply and add / subtract 901def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 902 (instregex "M(A|S)EB$")>; 903def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>; 904def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 905 (instregex "M(A|S)DB$")>; 906def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(A|S)DBR$")>; 907 908// Division 909def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], 910 (instregex "D(E|D)B$")>; 911def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>; 912def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>; 913 914// Divide to integer 915def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>; 916 917//===----------------------------------------------------------------------===// 918// FP: Comparisons 919//===----------------------------------------------------------------------===// 920 921// Compare 922def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 923 (instregex "(K|C)(E|D)B$")>; 924def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>; 925def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>; 926 927// Test Data Class 928def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>; 929def : InstRW<[WLat10, LSU, VecDF4, GroupAlone], (instregex "TCXB$")>; 930 931//===----------------------------------------------------------------------===// 932// FP: Floating-point control register instructions 933//===----------------------------------------------------------------------===// 934 935def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>; 936def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>; 937def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>; 938def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>; 939def : InstRW<[WLat30, MCD], (instregex "SFASR$")>; 940def : InstRW<[WLat30, MCD], (instregex "LFAS$")>; 941def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>; 942 943 944// --------------------- Hexadecimal floating point ------------------------- // 945 946//===----------------------------------------------------------------------===// 947// HFP: Move instructions 948//===----------------------------------------------------------------------===// 949 950// Load and Test 951def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>; 952def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>; 953 954//===----------------------------------------------------------------------===// 955// HFP: Conversion instructions 956//===----------------------------------------------------------------------===// 957 958// Load rounded 959def : InstRW<[WLat7, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>; 960def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEXR$")>; 961def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>; 962 963// Load lengthened 964def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>; 965def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>; 966def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>; 967def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>; 968 969// Convert from fixed 970def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>; 971def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)R$")>; 972 973// Convert to fixed 974def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>; 975def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>; 976 977// Convert BFP to HFP / HFP to BFP. 978def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "THD(E)?R$")>; 979def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "TB(E)?DR$")>; 980 981//===----------------------------------------------------------------------===// 982// HFP: Unary arithmetic 983//===----------------------------------------------------------------------===// 984 985// Load Complement / Negative / Positive 986def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>; 987def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>; 988 989// Halve 990def : InstRW<[WLat7, VecBF, NormalGr], (instregex "H(E|D)R$")>; 991 992// Square root 993def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>; 994def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>; 995def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>; 996 997// Load FP integer 998def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)R$")>; 999def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>; 1000 1001//===----------------------------------------------------------------------===// 1002// HFP: Binary arithmetic 1003//===----------------------------------------------------------------------===// 1004 1005// Addition 1006def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1007 (instregex "A(E|D|U|W)$")>; 1008def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>; 1009def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>; 1010 1011// Subtraction 1012def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1013 (instregex "S(E|D|U|W)$")>; 1014def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>; 1015def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>; 1016 1017// Multiply 1018def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1019 (instregex "M(D|DE|E|EE)$")>; 1020def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>; 1021def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 1022 (instregex "MXD$")>; 1023def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDR$")>; 1024def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>; 1025def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], (instregex "MY$")>; 1026def : InstRW<[WLat7LSU, RegReadAdv, VecBF2, LSU, GroupAlone], 1027 (instregex "MY(H|L)$")>; 1028def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MYR$")>; 1029def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MY(H|L)R$")>; 1030 1031// Multiply and add / subtract 1032def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 1033 (instregex "M(A|S)(E|D)$")>; 1034def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>; 1035def : InstRW<[WLat8LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone], 1036 (instregex "MAY$")>; 1037def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 1038 (instregex "MAY(H|L)$")>; 1039def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MAYR$")>; 1040def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>; 1041 1042// Division 1043def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], (instregex "D(E|D)$")>; 1044def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>; 1045def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>; 1046 1047//===----------------------------------------------------------------------===// 1048// HFP: Comparisons 1049//===----------------------------------------------------------------------===// 1050 1051// Compare 1052def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1053 (instregex "C(E|D)$")>; 1054def : InstRW<[WLat7, VecBF, NormalGr], (instregex "C(E|D)R$")>; 1055def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>; 1056 1057 1058// ------------------------ Decimal floating point -------------------------- // 1059 1060//===----------------------------------------------------------------------===// 1061// DFP: Move instructions 1062//===----------------------------------------------------------------------===// 1063 1064// Load and Test 1065def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>; 1066def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>; 1067 1068//===----------------------------------------------------------------------===// 1069// DFP: Conversion instructions 1070//===----------------------------------------------------------------------===// 1071 1072// Load rounded 1073def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>; 1074def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>; 1075 1076// Load lengthened 1077def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>; 1078def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>; 1079 1080// Convert from fixed / logical 1081def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CD(F|G)TR(A)?$")>; 1082def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)TR(A)?$")>; 1083def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDL(F|G)TR$")>; 1084def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)TR$")>; 1085 1086// Convert to fixed / logical 1087def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], 1088 (instregex "C(F|G)DTR(A)?$")>; 1089def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], 1090 (instregex "C(F|G)XTR(A)?$")>; 1091def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>; 1092def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>; 1093 1094// Convert from / to signed / unsigned packed 1095def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>; 1096def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone2], (instregex "CX(S|U)TR$")>; 1097def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>; 1098def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone2], (instregex "C(S|U)XTR$")>; 1099 1100// Convert from / to zoned 1101def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>; 1102def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXZT$")>; 1103def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>; 1104def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>; 1105 1106// Convert from / to packed 1107def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>; 1108def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXPT$")>; 1109def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>; 1110def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>; 1111 1112// Perform floating-point operation 1113def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>; 1114 1115//===----------------------------------------------------------------------===// 1116// DFP: Unary arithmetic 1117//===----------------------------------------------------------------------===// 1118 1119// Load FP integer 1120def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>; 1121def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>; 1122 1123// Extract biased exponent 1124def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>; 1125def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>; 1126 1127// Extract significance 1128def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>; 1129def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>; 1130 1131//===----------------------------------------------------------------------===// 1132// DFP: Binary arithmetic 1133//===----------------------------------------------------------------------===// 1134 1135// Addition 1136def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>; 1137def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>; 1138 1139// Subtraction 1140def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>; 1141def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>; 1142 1143// Multiply 1144def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>; 1145def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>; 1146 1147// Division 1148def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>; 1149def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>; 1150 1151// Quantize 1152def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>; 1153def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>; 1154 1155// Reround 1156def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>; 1157def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone2], (instregex "RRXTR$")>; 1158 1159// Shift significand left/right 1160def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>; 1161def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>; 1162 1163// Insert biased exponent 1164def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>; 1165def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "IEXTR$")>; 1166 1167//===----------------------------------------------------------------------===// 1168// DFP: Comparisons 1169//===----------------------------------------------------------------------===// 1170 1171// Compare 1172def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>; 1173def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>; 1174 1175// Compare biased exponent 1176def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>; 1177def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>; 1178 1179// Test Data Class/Group 1180def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>; 1181def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>; 1182 1183 1184// --------------------------------- Vector --------------------------------- // 1185 1186//===----------------------------------------------------------------------===// 1187// Vector: Move instructions 1188//===----------------------------------------------------------------------===// 1189 1190def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>; 1191def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>; 1192def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>; 1193def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>; 1194 1195//===----------------------------------------------------------------------===// 1196// Vector: Immediate instructions 1197//===----------------------------------------------------------------------===// 1198 1199def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>; 1200def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>; 1201def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>; 1202def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>; 1203def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>; 1204def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>; 1205 1206//===----------------------------------------------------------------------===// 1207// Vector: Loads 1208//===----------------------------------------------------------------------===// 1209 1210def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(Align)?$")>; 1211def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(L|BB)$")>; 1212def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>; 1213def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H|LF)?$")>; 1214def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>; 1215def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 1216 (instregex "VLE(B|F|G|H)$")>; 1217def : InstRW<[WLat5LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked], 1218 (instregex "VGE(F|G)$")>; 1219def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone], 1220 (instregex "VLM(Align)?$")>; 1221def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLRL(R)?$")>; 1222 1223//===----------------------------------------------------------------------===// 1224// Vector: Stores 1225//===----------------------------------------------------------------------===// 1226 1227def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|32|64)?$")>; 1228def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>; 1229def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>; 1230def : InstRW<[WLat1, LSU2, FXb3, GroupAlone2], (instregex "VSTM(Align)?$")>; 1231def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>; 1232def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTRL(R)?$")>; 1233 1234//===----------------------------------------------------------------------===// 1235// Vector: Selects and permutes 1236//===----------------------------------------------------------------------===// 1237 1238def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>; 1239def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>; 1240def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>; 1241def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>; 1242def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VBPERM$")>; 1243def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>; 1244def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>; 1245 1246//===----------------------------------------------------------------------===// 1247// Vector: Widening and narrowing 1248//===----------------------------------------------------------------------===// 1249 1250def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>; 1251def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>; 1252def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>; 1253def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>; 1254def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>; 1255def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>; 1256def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>; 1257def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>; 1258def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>; 1259def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>; 1260 1261//===----------------------------------------------------------------------===// 1262// Vector: Integer arithmetic 1263//===----------------------------------------------------------------------===// 1264 1265def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>; 1266def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>; 1267def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>; 1268def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>; 1269def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O|N|X)?$")>; 1270def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO(C)?$")>; 1271def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>; 1272def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>; 1273def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>; 1274def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>; 1275def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>; 1276def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>; 1277def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>; 1278def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>; 1279def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>; 1280def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>; 1281def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>; 1282def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>; 1283def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>; 1284def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>; 1285def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>; 1286def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>; 1287def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>; 1288def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>; 1289def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>; 1290def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>; 1291def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>; 1292def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>; 1293def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>; 1294def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>; 1295def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>; 1296def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>; 1297def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>; 1298def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VMSL(G)?$")>; 1299 1300def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT(B|F|G|H)?$")>; 1301 1302def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>; 1303def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>; 1304def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>; 1305def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>; 1306def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>; 1307def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>; 1308def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>; 1309def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>; 1310def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>; 1311 1312def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>; 1313def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLB$")>; 1314def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>; 1315def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>; 1316 1317def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>; 1318def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>; 1319def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>; 1320 1321def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>; 1322def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>; 1323def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>; 1324 1325//===----------------------------------------------------------------------===// 1326// Vector: Integer comparison 1327//===----------------------------------------------------------------------===// 1328 1329def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>; 1330def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>; 1331def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>; 1332def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>; 1333def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>; 1334def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>; 1335def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>; 1336def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>; 1337def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>; 1338 1339//===----------------------------------------------------------------------===// 1340// Vector: Floating-point arithmetic 1341//===----------------------------------------------------------------------===// 1342 1343// Conversion and rounding 1344def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VCD(L)?G$")>; 1345def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VCD(L)?GB$")>; 1346def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WCD(L)?GB$")>; 1347def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VC(L)?GD$")>; 1348def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VC(L)?GDB$")>; 1349def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WC(L)?GDB$")>; 1350def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VL(DE|ED)$")>; 1351def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VL(DE|ED)B$")>; 1352def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>; 1353def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFL(L|R)$")>; 1354def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFL(LS|RD)$")>; 1355def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFL(LS|RD)$")>; 1356def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "WFLLD$")>; 1357def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFLRX$")>; 1358def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFI$")>; 1359def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFIDB$")>; 1360def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFIDB$")>; 1361def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFISB$")>; 1362def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFISB$")>; 1363def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFIXB$")>; 1364 1365// Sign operations 1366def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>; 1367def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>; 1368def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSOSB$")>; 1369def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFPSOXB$")>; 1370def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>; 1371def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)SB$")>; 1372def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFL(C|N|P)XB$")>; 1373 1374// Minimum / maximum 1375def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)$")>; 1376def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)DB$")>; 1377def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)DB$")>; 1378def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)SB$")>; 1379def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)SB$")>; 1380def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WF(MAX|MIN)XB$")>; 1381 1382// Test data class 1383def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>; 1384def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>; 1385def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCISB$")>; 1386def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFTCIXB$")>; 1387 1388// Add / subtract 1389def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)$")>; 1390def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VF(A|S)DB$")>; 1391def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)DB$")>; 1392def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)SB$")>; 1393def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)SB$")>; 1394def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WF(A|S)XB$")>; 1395 1396// Multiply / multiply-and-add/subtract 1397def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM$")>; 1398def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFMDB$")>; 1399def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(D|S)B$")>; 1400def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMSB$")>; 1401def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WFMXB$")>; 1402def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(N)?M(A|S)$")>; 1403def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>; 1404def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>; 1405def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(N)?M(A|S)SB$")>; 1406def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>; 1407def : InstRW<[WLat30, VecDF2, NormalGr], (instregex "WF(N)?M(A|S)XB$")>; 1408 1409// Divide / square root 1410def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>; 1411def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>; 1412def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDSB$")>; 1413def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFDXB$")>; 1414def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>; 1415def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>; 1416def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQSB$")>; 1417def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFSQXB$")>; 1418 1419//===----------------------------------------------------------------------===// 1420// Vector: Floating-point comparison 1421//===----------------------------------------------------------------------===// 1422 1423def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)$")>; 1424def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)DB$")>; 1425def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>; 1426def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)DB$")>; 1427def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)SB$")>; 1428def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SB$")>; 1429def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SB$")>; 1430def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XB$")>; 1431def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XB$")>; 1432def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>; 1433def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFK(E|H|HE)DBS$")>; 1434def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], 1435 (instregex "WF(C|K)(E|H|HE)DBS$")>; 1436def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], 1437 (instregex "VF(C|K)(E|H|HE)SBS$")>; 1438def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SBS$")>; 1439def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SBS$")>; 1440def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XBS$")>; 1441def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XBS$")>; 1442def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>; 1443def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>; 1444def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)SB$")>; 1445def : InstRW<[WLat3, VecDFX, NormalGr], (instregex "WF(C|K)XB$")>; 1446 1447//===----------------------------------------------------------------------===// 1448// Vector: Floating-point insertion and extraction 1449//===----------------------------------------------------------------------===// 1450 1451def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>; 1452def : InstRW<[WLat3, FXb, NormalGr], (instregex "LFER$")>; 1453 1454//===----------------------------------------------------------------------===// 1455// Vector: String instructions 1456//===----------------------------------------------------------------------===// 1457 1458def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>; 1459def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>; 1460def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>; 1461def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>; 1462def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>; 1463def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>; 1464def : InstRW<[WLat4, WLat4, VecStr, NormalGr], 1465 (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>; 1466def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>; 1467def : InstRW<[WLat4, WLat4, VecStr, NormalGr], 1468 (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>; 1469def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>; 1470def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>; 1471def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>; 1472def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>; 1473def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>; 1474def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>; 1475 1476//===----------------------------------------------------------------------===// 1477// Vector: Packed-decimal instructions 1478//===----------------------------------------------------------------------===// 1479 1480def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "VLIP$")>; 1481def : InstRW<[WLat6, VecDFX, LSU, GroupAlone2], (instregex "VPKZ$")>; 1482def : InstRW<[WLat1, VecDFX, FXb, LSU, Cracked], (instregex "VUPKZ$")>; 1483def : InstRW<[WLat20, WLat20, VecDF2, FXb, GroupAlone], (instregex "VCVB(G)?$")>; 1484def : InstRW<[WLat20, WLat20, VecDF2, FXb, GroupAlone], (instregex "VCVD(G)?$")>; 1485def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "V(A|S)P$")>; 1486def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "VM(S)?P$")>; 1487def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "V(D|R)P$")>; 1488def : InstRW<[WLat30, WLat30, MCD], (instregex "VSDP$")>; 1489def : InstRW<[WLat10, WLat10, VecDF2, NormalGr], (instregex "VSRP$")>; 1490def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "VPSOP$")>; 1491def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "V(T|C)P$")>; 1492 1493 1494// -------------------------------- System ---------------------------------- // 1495 1496//===----------------------------------------------------------------------===// 1497// System: Program-Status Word Instructions 1498//===----------------------------------------------------------------------===// 1499 1500def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>; 1501def : InstRW<[WLat20, GroupAlone3], (instregex "LPSW(E)?$")>; 1502def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>; 1503def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>; 1504def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>; 1505def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>; 1506def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>; 1507def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>; 1508 1509//===----------------------------------------------------------------------===// 1510// System: Control Register Instructions 1511//===----------------------------------------------------------------------===// 1512 1513def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>; 1514def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STCT(L|G)$")>; 1515def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>; 1516def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>; 1517def : InstRW<[WLat30, MCD], (instregex "ESEA$")>; 1518 1519//===----------------------------------------------------------------------===// 1520// System: Prefix-Register Instructions 1521//===----------------------------------------------------------------------===// 1522 1523def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>; 1524 1525//===----------------------------------------------------------------------===// 1526// System: Storage-Key and Real Memory Instructions 1527//===----------------------------------------------------------------------===// 1528 1529def : InstRW<[WLat30, MCD], (instregex "ISKE$")>; 1530def : InstRW<[WLat30, MCD], (instregex "IVSK$")>; 1531def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>; 1532def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>; 1533def : InstRW<[WLat30, MCD], (instregex "IRBM$")>; 1534def : InstRW<[WLat30, MCD], (instregex "PFMF$")>; 1535def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>; 1536def : InstRW<[WLat30, MCD], (instregex "PGIN$")>; 1537def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>; 1538 1539//===----------------------------------------------------------------------===// 1540// System: Dynamic-Address-Translation Instructions 1541//===----------------------------------------------------------------------===// 1542 1543def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>; 1544def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>; 1545def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>; 1546def : InstRW<[WLat30, MCD], (instregex "PTLB$")>; 1547def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>; 1548def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>; 1549def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>; 1550def : InstRW<[WLat30, MCD], (instregex "STRAG$")>; 1551def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>; 1552def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>; 1553def : InstRW<[WLat30, MCD], (instregex "TPROT$")>; 1554 1555//===----------------------------------------------------------------------===// 1556// System: Memory-move Instructions 1557//===----------------------------------------------------------------------===// 1558 1559def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>; 1560def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>; 1561def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>; 1562def : InstRW<[WLat30, MCD], (instregex "MVPG$")>; 1563 1564//===----------------------------------------------------------------------===// 1565// System: Address-Space Instructions 1566//===----------------------------------------------------------------------===// 1567 1568def : InstRW<[WLat30, MCD], (instregex "LASP$")>; 1569def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>; 1570def : InstRW<[WLat30, MCD], (instregex "PC$")>; 1571def : InstRW<[WLat30, MCD], (instregex "PR$")>; 1572def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>; 1573def : InstRW<[WLat30, MCD], (instregex "RP$")>; 1574def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>; 1575def : InstRW<[WLat30, MCD], (instregex "TAR$")>; 1576 1577//===----------------------------------------------------------------------===// 1578// System: Linkage-Stack Instructions 1579//===----------------------------------------------------------------------===// 1580 1581def : InstRW<[WLat30, MCD], (instregex "BAKR$")>; 1582def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>; 1583def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>; 1584 1585//===----------------------------------------------------------------------===// 1586// System: Time-Related Instructions 1587//===----------------------------------------------------------------------===// 1588 1589def : InstRW<[WLat30, MCD], (instregex "PTFF$")>; 1590def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>; 1591def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>; 1592def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone2], (instregex "STCK(F)?$")>; 1593def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone3], (instregex "STCKE$")>; 1594def : InstRW<[WLat30, MCD], (instregex "STCKC$")>; 1595def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>; 1596 1597//===----------------------------------------------------------------------===// 1598// System: CPU-Related Instructions 1599//===----------------------------------------------------------------------===// 1600 1601def : InstRW<[WLat30, MCD], (instregex "STAP$")>; 1602def : InstRW<[WLat30, MCD], (instregex "STIDP$")>; 1603def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>; 1604def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>; 1605def : InstRW<[WLat30, MCD], (instregex "ECAG$")>; 1606def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>; 1607def : InstRW<[WLat30, MCD], (instregex "PTF$")>; 1608def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>; 1609 1610//===----------------------------------------------------------------------===// 1611// System: Miscellaneous Instructions 1612//===----------------------------------------------------------------------===// 1613 1614def : InstRW<[WLat30, MCD], (instregex "SVC$")>; 1615def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>; 1616def : InstRW<[WLat30, MCD], (instregex "DIAG$")>; 1617def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>; 1618def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>; 1619def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>; 1620def : InstRW<[WLat30, MCD], (instregex "SIE$")>; 1621 1622//===----------------------------------------------------------------------===// 1623// System: CPU-Measurement Facility Instructions 1624//===----------------------------------------------------------------------===// 1625 1626def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>; 1627def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>; 1628def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>; 1629def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>; 1630def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>; 1631def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>; 1632def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>; 1633 1634//===----------------------------------------------------------------------===// 1635// System: I/O Instructions 1636//===----------------------------------------------------------------------===// 1637 1638def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>; 1639def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>; 1640def : InstRW<[WLat30, MCD], (instregex "RCHP$")>; 1641def : InstRW<[WLat30, MCD], (instregex "SCHM$")>; 1642def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>; 1643def : InstRW<[WLat30, MCD], (instregex "TPI$")>; 1644def : InstRW<[WLat30, MCD], (instregex "SAL$")>; 1645 1646} 1647 1648