1//-- SystemZScheduleZ13.td - SystemZ Scheduling Definitions ----*- tblgen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file defines the machine model for Z13 to support instruction 10// scheduling and other instruction cost heuristics. 11// 12// Pseudos expanded right after isel do not need to be modelled here. 13// 14//===----------------------------------------------------------------------===// 15 16def Z13Model : SchedMachineModel { 17 18 let UnsupportedFeatures = Arch11UnsupportedFeatures.List; 19 20 let IssueWidth = 6; // Number of instructions decoded per cycle. 21 let MicroOpBufferSize = 60; // Issue queues 22 let LoadLatency = 1; // Optimistic load latency. 23 24 let PostRAScheduler = 1; 25 26 // Extra cycles for a mispredicted branch. 27 let MispredictPenalty = 20; 28} 29 30let SchedModel = Z13Model in { 31// These definitions need the SchedModel value. They could be put in a 32// subtarget common include file, but it seems the include system in Tablegen 33// currently (2016) rejects multiple includes of same file. 34 35// Decoder grouping rules 36let NumMicroOps = 1 in { 37 def : WriteRes<NormalGr, []>; 38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; } 39 def : WriteRes<EndGroup, []> { let EndGroup = 1; } 40} 41def : WriteRes<Cracked, []> { 42 let NumMicroOps = 2; 43 let BeginGroup = 1; 44} 45def : WriteRes<GroupAlone, []> { 46 let NumMicroOps = 3; 47 let BeginGroup = 1; 48 let EndGroup = 1; 49} 50def : WriteRes<GroupAlone2, []> { 51 let NumMicroOps = 6; 52 let BeginGroup = 1; 53 let EndGroup = 1; 54} 55def : WriteRes<GroupAlone3, []> { 56 let NumMicroOps = 9; 57 let BeginGroup = 1; 58 let EndGroup = 1; 59} 60 61// Incoming latency removed from the register operand which is used together 62// with a memory operand by the instruction. 63def : ReadAdvance<RegReadAdv, 4>; 64 65// LoadLatency (above) is not used for instructions in this file. This is 66// instead the role of LSULatency, which is the latency value added to the 67// result of loads and instructions with folded memory operands. 68def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; } 69 70let NumMicroOps = 0 in { 71 foreach L = 1-30 in 72 def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; } 73} 74 75// Execution units. 76def Z13_FXaUnit : ProcResource<2>; 77def Z13_FXbUnit : ProcResource<2>; 78def Z13_LSUnit : ProcResource<2>; 79def Z13_VecUnit : ProcResource<2>; 80def Z13_VecFPdUnit : ProcResource<2> { let BufferSize = 1; /* blocking */ } 81def Z13_VBUnit : ProcResource<2>; 82def Z13_MCD : ProcResource<1>; 83 84// Subtarget specific definitions of scheduling resources. 85let NumMicroOps = 0 in { 86 def : WriteRes<FXa, [Z13_FXaUnit]>; 87 def : WriteRes<FXb, [Z13_FXbUnit]>; 88 def : WriteRes<LSU, [Z13_LSUnit]>; 89 def : WriteRes<VecBF, [Z13_VecUnit]>; 90 def : WriteRes<VecDF, [Z13_VecUnit]>; 91 def : WriteRes<VecDFX, [Z13_VecUnit]>; 92 def : WriteRes<VecMul, [Z13_VecUnit]>; 93 def : WriteRes<VecStr, [Z13_VecUnit]>; 94 def : WriteRes<VecXsPm, [Z13_VecUnit]>; 95 foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in { 96 def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z13_FXaUnit]>; 97 def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z13_FXbUnit]>; 98 def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z13_LSUnit]>; 99 def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z13_VecUnit]>; 100 def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z13_VecUnit]>; 101 def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z13_VecUnit]>; 102 def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z13_VecUnit]>; 103 def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z13_VecUnit]>; 104 def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z13_VecUnit]>; 105 }} 106 107 def : WriteRes<VecFPd, [Z13_VecFPdUnit]> { let ReleaseAtCycles = [30]; } 108 109 def : WriteRes<VBU, [Z13_VBUnit]>; // Virtual Branching Unit 110} 111 112def : WriteRes<MCD, [Z13_MCD]> { let NumMicroOps = 3; 113 let BeginGroup = 1; 114 let EndGroup = 1; } 115 116// -------------------------- INSTRUCTIONS ---------------------------------- // 117 118// InstRW constructs have been used in order to preserve the 119// readability of the InstrInfo files. 120 121// For each instruction, as matched by a regexp, provide a list of 122// resources that it needs. These will be combined into a SchedClass. 123 124//===----------------------------------------------------------------------===// 125// Stack allocation 126//===----------------------------------------------------------------------===// 127 128// Pseudo -> LA / LAY 129def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>; 130 131//===----------------------------------------------------------------------===// 132// Branch instructions 133//===----------------------------------------------------------------------===// 134 135// Branch 136def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>; 137def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>; 138def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>; 139def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>; 140def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>; 141def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>; 142def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>; 143def : InstRW<[WLat1, FXa2, FXb2, GroupAlone2], 144 (instregex "B(R)?X(H|L).*$")>; 145 146// Compare and branch 147def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>; 148def : InstRW<[WLat1, FXb2, GroupAlone], 149 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>; 150 151//===----------------------------------------------------------------------===// 152// Trap instructions 153//===----------------------------------------------------------------------===// 154 155// Trap 156def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>; 157 158// Compare and trap 159def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>; 160def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>; 161def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>; 162def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>; 163 164//===----------------------------------------------------------------------===// 165// Call and return instructions 166//===----------------------------------------------------------------------===// 167 168// Call 169def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>; 170def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL(_XPLINK64)?$")>; 171def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?(_XPLINK64|_STACKEXT)?$")>; 172def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>; 173 174// Return 175def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return(_XPLINK)?$")>; 176def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn(_XPLINK)?$")>; 177 178//===----------------------------------------------------------------------===// 179// Move instructions 180//===----------------------------------------------------------------------===// 181 182// Moves 183def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>; 184def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>; 185 186// Move character 187def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>; 188def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>; 189 190// Pseudo -> reg move 191def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>; 192def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>; 193def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>; 194def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>; 195 196// Loads 197def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>; 198def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>; 199def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>; 200def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>; 201 202def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>; 203def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>; 204 205def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>; 206def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>; 207def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR$")>; 208 209// Load and zero rightmost byte 210def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>; 211 212// Load and trap 213def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>; 214 215// Load and test 216def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>; 217def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>; 218 219// Stores 220def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>; 221def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>; 222def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>; 223 224// String moves. 225def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>; 226 227//===----------------------------------------------------------------------===// 228// Conditional move instructions 229//===----------------------------------------------------------------------===// 230 231def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>; 232def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>; 233def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>; 234def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 235 (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>; 236def : InstRW<[WLat1, FXb, LSU, NormalGr], 237 (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>; 238 239//===----------------------------------------------------------------------===// 240// Sign extensions 241//===----------------------------------------------------------------------===// 242 243def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>; 244def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>; 245 246def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>; 247def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>; 248 249def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>; 250def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>; 251def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>; 252def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>; 253def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>; 254 255//===----------------------------------------------------------------------===// 256// Zero extensions 257//===----------------------------------------------------------------------===// 258 259def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>; 260def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>; 261def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>; 262def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>; 263def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>; 264def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>; 265def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>; 266def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>; 267 268// Load and zero rightmost byte 269def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>; 270 271// Load and trap 272def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>; 273 274//===----------------------------------------------------------------------===// 275// Truncations 276//===----------------------------------------------------------------------===// 277 278def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 279def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>; 280def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>; 281 282//===----------------------------------------------------------------------===// 283// Multi-register moves 284//===----------------------------------------------------------------------===// 285 286// Load multiple (estimated average of 5 ops) 287def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>; 288 289// Load multiple disjoint 290def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>; 291 292// Store multiple 293def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>; 294 295//===----------------------------------------------------------------------===// 296// Byte swaps 297//===----------------------------------------------------------------------===// 298 299def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>; 300def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>; 301def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>; 302def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>; 303 304//===----------------------------------------------------------------------===// 305// Load address instructions 306//===----------------------------------------------------------------------===// 307 308def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>; 309 310// Load the Global Offset Table address ( -> larl ) 311def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>; 312 313//===----------------------------------------------------------------------===// 314// Absolute and Negation 315//===----------------------------------------------------------------------===// 316 317def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LP(G)?R$")>; 318def : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "L(N|P)GFR$")>; 319def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LN(R|GR)$")>; 320def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>; 321def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>; 322 323//===----------------------------------------------------------------------===// 324// Insertion 325//===----------------------------------------------------------------------===// 326 327def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>; 328def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 329 (instregex "IC32(Y)?$")>; 330def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr], 331 (instregex "ICM(H|Y)?$")>; 332def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>; 333def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>; 334def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>; 335def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>; 336def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>; 337def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>; 338def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>; 339 340//===----------------------------------------------------------------------===// 341// Addition 342//===----------------------------------------------------------------------===// 343 344def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 345 (instregex "A(Y)?$")>; 346def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 347 (instregex "AH(Y)?$")>; 348def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>; 349def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>; 350def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 351 (instregex "AG$")>; 352def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>; 353def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>; 354def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>; 355def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>; 356def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>; 357def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 358 (instregex "AL(Y)?$")>; 359def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>; 360def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 361 (instregex "ALG(F)?$")>; 362def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>; 363def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>; 364def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>; 365def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>; 366def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>; 367def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>; 368def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>; 369def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>; 370def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>; 371 372// Logical addition with carry 373def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone], 374 (instregex "ALC(G)?$")>; 375def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>; 376 377// Add with sign extension (32 -> 64) 378def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 379 (instregex "AGF$")>; 380def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>; 381 382//===----------------------------------------------------------------------===// 383// Subtraction 384//===----------------------------------------------------------------------===// 385 386def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 387 (instregex "S(G|Y)?$")>; 388def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 389 (instregex "SH(Y)?$")>; 390def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>; 391def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>; 392def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 393 (instregex "SL(G|GF|Y)?$")>; 394def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>; 395def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>; 396def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>; 397def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>; 398def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>; 399def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>; 400 401// Subtraction with borrow 402def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone], 403 (instregex "SLB(G)?$")>; 404def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>; 405 406// Subtraction with sign extension (32 -> 64) 407def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 408 (instregex "SGF$")>; 409def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>; 410 411//===----------------------------------------------------------------------===// 412// AND 413//===----------------------------------------------------------------------===// 414 415def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 416 (instregex "N(G|Y)?$")>; 417def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>; 418def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>; 419def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>; 420def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>; 421def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>; 422def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>; 423def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>; 424def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>; 425def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>; 426def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>; 427def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>; 428 429//===----------------------------------------------------------------------===// 430// OR 431//===----------------------------------------------------------------------===// 432 433def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 434 (instregex "O(G|Y)?$")>; 435def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>; 436def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>; 437def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>; 438def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>; 439def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>; 440def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>; 441def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>; 442def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>; 443def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>; 444def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>; 445def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>; 446 447//===----------------------------------------------------------------------===// 448// XOR 449//===----------------------------------------------------------------------===// 450 451def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 452 (instregex "X(G|Y)?$")>; 453def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>; 454def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>; 455def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>; 456def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>; 457def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>; 458def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>; 459def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>; 460 461//===----------------------------------------------------------------------===// 462// Multiplication 463//===----------------------------------------------------------------------===// 464 465def : InstRW<[WLat6LSU, RegReadAdv, FXa, LSU, NormalGr], 466 (instregex "MS(GF|Y)?$")>; 467def : InstRW<[WLat6, FXa, NormalGr], (instregex "MS(R|FI)$")>; 468def : InstRW<[WLat8LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>; 469def : InstRW<[WLat8, FXa, NormalGr], (instregex "MSGR$")>; 470def : InstRW<[WLat6, FXa, NormalGr], (instregex "MSGF(I|R)$")>; 471def : InstRW<[WLat11LSU, RegReadAdv, FXa2, LSU, GroupAlone], 472 (instregex "MLG$")>; 473def : InstRW<[WLat9, FXa2, GroupAlone], (instregex "MLGR$")>; 474def : InstRW<[WLat5, FXa, NormalGr], (instregex "MGHI$")>; 475def : InstRW<[WLat5, FXa, NormalGr], (instregex "MHI$")>; 476def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>; 477def : InstRW<[WLat7, FXa2, GroupAlone], (instregex "M(L)?R$")>; 478def : InstRW<[WLat7LSU, RegReadAdv, FXa2, LSU, GroupAlone], 479 (instregex "M(FY|L)?$")>; 480 481//===----------------------------------------------------------------------===// 482// Division and remainder 483//===----------------------------------------------------------------------===// 484 485def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>; 486def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "D$")>; 487def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>; 488def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone2], 489 (instregex "DSG(F)?$")>; 490def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>; 491def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>; 492def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "DL(G)?$")>; 493 494//===----------------------------------------------------------------------===// 495// Shifts 496//===----------------------------------------------------------------------===// 497 498def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>; 499def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>; 500def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>; 501def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>; 502def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2], 503 (instregex "S(L|R)D(A|L)$")>; 504 505// Rotate 506def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>; 507 508// Rotate and insert 509def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>; 510def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>; 511def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>; 512def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>; 513 514// Rotate and Select 515def : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>; 516 517//===----------------------------------------------------------------------===// 518// Comparison 519//===----------------------------------------------------------------------===// 520 521def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], 522 (instregex "C(G|Y|Mux)?$")>; 523def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>; 524def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>; 525def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>; 526def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>; 527def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>; 528def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>; 529def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>; 530def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>; 531def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], 532 (instregex "CL(Y|Mux)?$")>; 533def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>; 534def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>; 535def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>; 536def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>; 537def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>; 538def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>; 539def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>; 540def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>; 541def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>; 542def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>; 543def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>; 544def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>; 545def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>; 546def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>; 547def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>; 548def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>; 549def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>; 550 551// Compare halfword 552def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>; 553def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>; 554def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>; 555def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>; 556def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>; 557 558// Compare with sign extension (32 -> 64) 559def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>; 560def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>; 561def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>; 562 563// Compare logical character 564def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>; 565def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>; 566def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>; 567 568// Test under mask 569def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>; 570def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>; 571def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>; 572def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>; 573def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>; 574def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>; 575 576// Compare logical characters under mask 577def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], 578 (instregex "CLM(H|Y)?$")>; 579 580//===----------------------------------------------------------------------===// 581// Prefetch and execution hint 582//===----------------------------------------------------------------------===// 583 584def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>; 585def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>; 586def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>; 587def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>; 588 589//===----------------------------------------------------------------------===// 590// Atomic operations 591//===----------------------------------------------------------------------===// 592 593def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>; 594 595def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>; 596def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>; 597def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>; 598def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>; 599def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>; 600 601// Test and set 602def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>; 603 604// Compare and swap 605def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone], 606 (instregex "CS(G|Y)?$")>; 607 608// Compare double and swap 609def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone2], 610 (instregex "CDS(Y)?$")>; 611def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3, GroupAlone3], 612 (instregex "CDSG$")>; 613 614// Compare and swap and store 615def : InstRW<[WLat30, MCD], (instregex "CSST$")>; 616 617// Perform locked operation 618def : InstRW<[WLat30, MCD], (instregex "PLO$")>; 619 620// Load/store pair from/to quadword 621def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>; 622def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>; 623 624// Load pair disjoint 625def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>; 626 627//===----------------------------------------------------------------------===// 628// Translate and convert 629//===----------------------------------------------------------------------===// 630 631def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>; 632def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone2], 633 (instregex "TRT$")>; 634def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>; 635def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>; 636def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>; 637def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>; 638def : InstRW<[WLat30, WLat30, WLat30, MCD], 639 (instregex "CU(12|14|21|24|41|42)(Opt)?$")>; 640def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>; 641 642//===----------------------------------------------------------------------===// 643// Message-security assist 644//===----------------------------------------------------------------------===// 645 646def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], 647 (instregex "KM(C|F|O|CTR)?$")>; 648def : InstRW<[WLat30, WLat30, WLat30, MCD], 649 (instregex "(KIMD|KLMD|KMAC|PCC|PPNO)$")>; 650 651//===----------------------------------------------------------------------===// 652// Decimal arithmetic 653//===----------------------------------------------------------------------===// 654 655def : InstRW<[WLat30, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone2], 656 (instregex "CVBG$")>; 657def : InstRW<[WLat30, RegReadAdv, FXb, VecDF, LSU, GroupAlone2], 658 (instregex "CVB(Y)?$")>; 659def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone3], (instregex "CVDG$")>; 660def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone2], (instregex "CVD(Y)?$")>; 661def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>; 662def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; 663def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>; 664def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>; 665 666def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone2], 667 (instregex "(A|S|ZA)P$")>; 668def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone2], (instregex "(M|D)P$")>; 669def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone3], (instregex "SRP$")>; 670def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>; 671def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>; 672def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>; 673 674//===----------------------------------------------------------------------===// 675// Access registers 676//===----------------------------------------------------------------------===// 677 678// Extract/set/copy access register 679def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>; 680 681// Load address extended 682def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>; 683 684// Load/store access multiple (not modeled precisely) 685def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>; 686def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STAM(Y)?$")>; 687 688//===----------------------------------------------------------------------===// 689// Program mask and addressing mode 690//===----------------------------------------------------------------------===// 691 692// Insert Program Mask 693def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>; 694 695// Set Program Mask 696def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>; 697 698// Branch and link 699def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>; 700 701// Test addressing mode 702def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>; 703 704// Set addressing mode 705def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>; 706 707// Branch (and save) and set mode. 708def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>; 709def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>; 710 711//===----------------------------------------------------------------------===// 712// Transactional execution 713//===----------------------------------------------------------------------===// 714 715// Transaction begin 716def : InstRW<[WLat9, LSU2, FXb5, GroupAlone2], (instregex "TBEGIN(C)?$")>; 717 718// Transaction end 719def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>; 720 721// Transaction abort 722def : InstRW<[WLat30, MCD], (instregex "TABORT$")>; 723 724// Extract Transaction Nesting Depth 725def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>; 726 727// Nontransactional store 728def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>; 729 730//===----------------------------------------------------------------------===// 731// Processor assist 732//===----------------------------------------------------------------------===// 733 734def : InstRW<[WLat30, MCD], (instregex "PPA$")>; 735 736//===----------------------------------------------------------------------===// 737// Miscellaneous Instructions. 738//===----------------------------------------------------------------------===// 739 740// Find leftmost one 741def : InstRW<[WLat7, WLat7, FXa2, GroupAlone], (instregex "FLOGR$")>; 742 743// Population count 744def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT$")>; 745 746// String instructions 747def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>; 748def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>; 749 750// Various complex instructions 751def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>; 752def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD], 753 (instregex "UPT$")>; 754def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>; 755def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>; 756 757// Execute 758def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>; 759 760//===----------------------------------------------------------------------===// 761// .insn directive instructions 762//===----------------------------------------------------------------------===// 763 764// An "empty" sched-class will be assigned instead of the "invalid sched-class". 765// getNumDecoderSlots() will then return 1 instead of 0. 766def : InstRW<[], (instregex "Insn.*")>; 767 768 769// ----------------------------- Floating point ----------------------------- // 770 771//===----------------------------------------------------------------------===// 772// FP: Move instructions 773//===----------------------------------------------------------------------===// 774 775// Load zero 776def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>; 777def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>; 778 779// Load 780def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>; 781def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>; 782def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>; 783def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>; 784 785// Load and Test 786def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>; 787def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BRCompare$")>; 788def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], 789 (instregex "LTXBR(Compare)?$")>; 790 791// Copy sign 792def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>; 793 794//===----------------------------------------------------------------------===// 795// FP: Load instructions 796//===----------------------------------------------------------------------===// 797 798def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>; 799def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>; 800def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>; 801 802//===----------------------------------------------------------------------===// 803// FP: Store instructions 804//===----------------------------------------------------------------------===// 805 806def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>; 807def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>; 808 809//===----------------------------------------------------------------------===// 810// FP: Conversion instructions 811//===----------------------------------------------------------------------===// 812 813// Load rounded 814def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEDBR(A)?$")>; 815def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>; 816 817// Load lengthened 818def : InstRW<[WLat7LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>; 819def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LDEBR$")>; 820def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>; 821def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>; 822 823// Convert from fixed / logical 824def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>; 825def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)BR(A)?$")>; 826def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>; 827def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)BR$")>; 828 829// Convert to fixed / logical 830def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], 831 (instregex "C(F|G)(E|D)BR(A)?$")>; 832def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], 833 (instregex "C(F|G)XBR(A)?$")>; 834def : InstRW<[WLat10, WLat10, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>; 835def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLFDBR$")>; 836def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>; 837def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>; 838 839//===----------------------------------------------------------------------===// 840// FP: Unary arithmetic 841//===----------------------------------------------------------------------===// 842 843// Load Complement / Negative / Positive 844def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>; 845def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>; 846def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>; 847 848// Square root 849def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>; 850def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>; 851def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>; 852 853// Load FP integer 854def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>; 855def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>; 856 857//===----------------------------------------------------------------------===// 858// FP: Binary arithmetic 859//===----------------------------------------------------------------------===// 860 861// Addition 862def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 863 (instregex "A(E|D)B$")>; 864def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D)BR$")>; 865def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>; 866 867// Subtraction 868def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 869 (instregex "S(E|D)B$")>; 870def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D)BR$")>; 871def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>; 872 873// Multiply 874def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 875 (instregex "M(D|DE|EE)B$")>; 876def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>; 877def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 878 (instregex "MXDB$")>; 879def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDBR$")>; 880def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>; 881 882// Multiply and add / subtract 883def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 884 (instregex "M(A|S)EB$")>; 885def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>; 886def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 887 (instregex "M(A|S)DB$")>; 888def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(A|S)DBR$")>; 889 890// Division 891def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], 892 (instregex "D(E|D)B$")>; 893def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>; 894def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>; 895 896// Divide to integer 897def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>; 898 899//===----------------------------------------------------------------------===// 900// FP: Comparisons 901//===----------------------------------------------------------------------===// 902 903// Compare 904def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 905 (instregex "(K|C)(E|D)B$")>; 906def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>; 907def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>; 908 909// Test Data Class 910def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>; 911def : InstRW<[WLat10, LSU, VecDF4, GroupAlone], (instregex "TCXB$")>; 912 913//===----------------------------------------------------------------------===// 914// FP: Floating-point control register instructions 915//===----------------------------------------------------------------------===// 916 917def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>; 918def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>; 919def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>; 920def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>; 921def : InstRW<[WLat30, MCD], (instregex "SFASR$")>; 922def : InstRW<[WLat30, MCD], (instregex "LFAS$")>; 923def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>; 924 925 926// --------------------- Hexadecimal floating point ------------------------- // 927 928//===----------------------------------------------------------------------===// 929// HFP: Move instructions 930//===----------------------------------------------------------------------===// 931 932// Load and Test 933def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>; 934def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>; 935 936//===----------------------------------------------------------------------===// 937// HFP: Conversion instructions 938//===----------------------------------------------------------------------===// 939 940// Load rounded 941def : InstRW<[WLat7, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>; 942def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEXR$")>; 943def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>; 944 945// Load lengthened 946def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>; 947def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>; 948def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>; 949def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>; 950 951// Convert from fixed 952def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>; 953def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)R$")>; 954 955// Convert to fixed 956def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>; 957def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>; 958 959// Convert BFP to HFP / HFP to BFP. 960def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "THD(E)?R$")>; 961def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "TB(E)?DR$")>; 962 963//===----------------------------------------------------------------------===// 964// HFP: Unary arithmetic 965//===----------------------------------------------------------------------===// 966 967// Load Complement / Negative / Positive 968def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>; 969def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>; 970 971// Halve 972def : InstRW<[WLat7, VecBF, NormalGr], (instregex "H(E|D)R$")>; 973 974// Square root 975def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>; 976def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>; 977def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>; 978 979// Load FP integer 980def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)R$")>; 981def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>; 982 983//===----------------------------------------------------------------------===// 984// HFP: Binary arithmetic 985//===----------------------------------------------------------------------===// 986 987// Addition 988def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 989 (instregex "A(E|D|U|W)$")>; 990def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>; 991def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>; 992 993// Subtraction 994def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 995 (instregex "S(E|D|U|W)$")>; 996def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>; 997def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>; 998 999// Multiply 1000def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1001 (instregex "M(D|DE|E|EE)$")>; 1002def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>; 1003def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 1004 (instregex "MXD$")>; 1005def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDR$")>; 1006def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>; 1007def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 1008 (instregex "MY$")>; 1009def : InstRW<[WLat7LSU, RegReadAdv, VecBF2, LSU, GroupAlone], 1010 (instregex "MY(H|L)$")>; 1011def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MYR$")>; 1012def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MY(H|L)R$")>; 1013 1014// Multiply and add / subtract 1015def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 1016 (instregex "M(A|S)(E|D)$")>; 1017def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>; 1018def : InstRW<[WLat8LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone], 1019 (instregex "MAY$")>; 1020def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 1021 (instregex "MAY(H|L)$")>; 1022def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MAYR$")>; 1023def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>; 1024 1025// Division 1026def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], 1027 (instregex "D(E|D)$")>; 1028def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>; 1029def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>; 1030 1031//===----------------------------------------------------------------------===// 1032// HFP: Comparisons 1033//===----------------------------------------------------------------------===// 1034 1035// Compare 1036def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1037 (instregex "C(E|D)$")>; 1038def : InstRW<[WLat7, VecBF, NormalGr], (instregex "C(E|D)R$")>; 1039def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>; 1040 1041 1042// ------------------------ Decimal floating point -------------------------- // 1043 1044//===----------------------------------------------------------------------===// 1045// DFP: Move instructions 1046//===----------------------------------------------------------------------===// 1047 1048// Load and Test 1049def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>; 1050def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>; 1051 1052//===----------------------------------------------------------------------===// 1053// DFP: Conversion instructions 1054//===----------------------------------------------------------------------===// 1055 1056// Load rounded 1057def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>; 1058def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>; 1059 1060// Load lengthened 1061def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>; 1062def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>; 1063 1064// Convert from fixed / logical 1065def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CD(F|G)TR(A)?$")>; 1066def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)TR(A)?$")>; 1067def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDL(F|G)TR$")>; 1068def : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)TR$")>; 1069 1070// Convert to fixed / logical 1071def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], 1072 (instregex "C(F|G)DTR(A)?$")>; 1073def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], 1074 (instregex "C(F|G)XTR(A)?$")>; 1075def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>; 1076def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>; 1077 1078// Convert from / to signed / unsigned packed 1079def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>; 1080def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone2], (instregex "CX(S|U)TR$")>; 1081def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>; 1082def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone2], (instregex "C(S|U)XTR$")>; 1083 1084// Convert from / to zoned 1085def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>; 1086def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXZT$")>; 1087def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>; 1088def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>; 1089 1090// Convert from / to packed 1091def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>; 1092def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXPT$")>; 1093def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>; 1094def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>; 1095 1096// Perform floating-point operation 1097def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>; 1098 1099//===----------------------------------------------------------------------===// 1100// DFP: Unary arithmetic 1101//===----------------------------------------------------------------------===// 1102 1103// Load FP integer 1104def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>; 1105def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>; 1106 1107// Extract biased exponent 1108def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>; 1109def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>; 1110 1111// Extract significance 1112def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>; 1113def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>; 1114 1115//===----------------------------------------------------------------------===// 1116// DFP: Binary arithmetic 1117//===----------------------------------------------------------------------===// 1118 1119// Addition 1120def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>; 1121def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>; 1122 1123// Subtraction 1124def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>; 1125def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>; 1126 1127// Multiply 1128def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>; 1129def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>; 1130 1131// Division 1132def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>; 1133def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>; 1134 1135// Quantize 1136def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>; 1137def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>; 1138 1139// Reround 1140def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>; 1141def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone2], (instregex "RRXTR$")>; 1142 1143// Shift significand left/right 1144def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>; 1145def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>; 1146 1147// Insert biased exponent 1148def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>; 1149def : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "IEXTR$")>; 1150 1151//===----------------------------------------------------------------------===// 1152// DFP: Comparisons 1153//===----------------------------------------------------------------------===// 1154 1155// Compare 1156def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>; 1157def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>; 1158 1159// Compare biased exponent 1160def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>; 1161def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>; 1162 1163// Test Data Class/Group 1164def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>; 1165def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>; 1166 1167 1168// --------------------------------- Vector --------------------------------- // 1169 1170//===----------------------------------------------------------------------===// 1171// Vector: Move instructions 1172//===----------------------------------------------------------------------===// 1173 1174def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>; 1175def : InstRW<[WLat4, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>; 1176def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>; 1177def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>; 1178 1179//===----------------------------------------------------------------------===// 1180// Vector: Immediate instructions 1181//===----------------------------------------------------------------------===// 1182 1183def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>; 1184def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>; 1185def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>; 1186def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>; 1187def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>; 1188def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>; 1189 1190//===----------------------------------------------------------------------===// 1191// Vector: Loads 1192//===----------------------------------------------------------------------===// 1193 1194def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(Align)?$")>; 1195def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(L|BB)$")>; 1196def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>; 1197def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H)?$")>; 1198def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>; 1199def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 1200 (instregex "VLE(B|F|G|H)$")>; 1201def : InstRW<[WLat6LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked], 1202 (instregex "VGE(F|G)$")>; 1203def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone], 1204 (instregex "VLM(Align)?$")>; 1205 1206//===----------------------------------------------------------------------===// 1207// Vector: Stores 1208//===----------------------------------------------------------------------===// 1209 1210def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|32|64)?$")>; 1211def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>; 1212def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>; 1213def : InstRW<[WLat1, LSU2, FXb3, GroupAlone2], (instregex "VSTM(Align)?$")>; 1214def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>; 1215 1216//===----------------------------------------------------------------------===// 1217// Vector: Selects and permutes 1218//===----------------------------------------------------------------------===// 1219 1220def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>; 1221def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>; 1222def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>; 1223def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>; 1224def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>; 1225def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>; 1226 1227//===----------------------------------------------------------------------===// 1228// Vector: Widening and narrowing 1229//===----------------------------------------------------------------------===// 1230 1231def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>; 1232def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>; 1233def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>; 1234def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>; 1235def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>; 1236def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>; 1237def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>; 1238def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>; 1239def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>; 1240def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>; 1241 1242//===----------------------------------------------------------------------===// 1243// Vector: Integer arithmetic 1244//===----------------------------------------------------------------------===// 1245 1246def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>; 1247def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>; 1248def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>; 1249def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>; 1250def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O)?$")>; 1251def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO$")>; 1252def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>; 1253def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>; 1254def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>; 1255def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>; 1256def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>; 1257def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>; 1258def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>; 1259def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>; 1260def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>; 1261def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>; 1262def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>; 1263def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>; 1264def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>; 1265def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>; 1266def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>; 1267def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>; 1268def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>; 1269def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>; 1270def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>; 1271def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>; 1272def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>; 1273def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>; 1274def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>; 1275def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>; 1276def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>; 1277def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>; 1278def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>; 1279 1280def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT$")>; 1281 1282def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>; 1283def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>; 1284def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>; 1285def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>; 1286def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>; 1287def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>; 1288def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>; 1289def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>; 1290def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>; 1291 1292def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>; 1293def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSLB$")>; 1294def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>; 1295def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSR(A|L)B$")>; 1296 1297def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>; 1298def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>; 1299def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>; 1300 1301def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>; 1302def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>; 1303def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>; 1304 1305//===----------------------------------------------------------------------===// 1306// Vector: Integer comparison 1307//===----------------------------------------------------------------------===// 1308 1309def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>; 1310def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>; 1311def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>; 1312def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>; 1313def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>; 1314def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>; 1315def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>; 1316def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>; 1317def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>; 1318 1319//===----------------------------------------------------------------------===// 1320// Vector: Floating-point arithmetic 1321//===----------------------------------------------------------------------===// 1322 1323// Conversion and rounding 1324def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?G$")>; 1325def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?GB$")>; 1326def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WCD(L)?GB$")>; 1327def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GD$")>; 1328def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GDB$")>; 1329def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WC(L)?GDB$")>; 1330def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)$")>; 1331def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)B$")>; 1332def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>; 1333def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFI$")>; 1334def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFIDB$")>; 1335def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFIDB$")>; 1336 1337// Sign operations 1338def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>; 1339def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>; 1340def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>; 1341 1342// Test data class 1343def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>; 1344def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>; 1345 1346// Add / subtract 1347def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)$")>; 1348def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)DB$")>; 1349def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)DB$")>; 1350 1351// Multiply / multiply-and-add/subtract 1352def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM$")>; 1353def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMDB$")>; 1354def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFMDB$")>; 1355def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)$")>; 1356def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)DB$")>; 1357def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(A|S)DB$")>; 1358 1359// Divide / square root 1360def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>; 1361def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>; 1362def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>; 1363def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>; 1364 1365//===----------------------------------------------------------------------===// 1366// Vector: Floating-point comparison 1367//===----------------------------------------------------------------------===// 1368 1369def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)$")>; 1370def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DB$")>; 1371def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>; 1372def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>; 1373def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DBS$")>; 1374def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>; 1375def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>; 1376 1377//===----------------------------------------------------------------------===// 1378// Vector: Floating-point insertion and extraction 1379//===----------------------------------------------------------------------===// 1380 1381def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>; 1382def : InstRW<[WLat4, FXb, NormalGr], (instregex "LFER$")>; 1383 1384//===----------------------------------------------------------------------===// 1385// Vector: String instructions 1386//===----------------------------------------------------------------------===// 1387 1388def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>; 1389def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>; 1390def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>; 1391def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>; 1392def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>; 1393def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>; 1394def : InstRW<[WLat4, WLat4, VecStr, NormalGr], 1395 (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>; 1396def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>; 1397def : InstRW<[WLat4, WLat4, VecStr, NormalGr], 1398 (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>; 1399def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>; 1400def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>; 1401def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>; 1402def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>; 1403def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>; 1404def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>; 1405 1406 1407// -------------------------------- System ---------------------------------- // 1408 1409//===----------------------------------------------------------------------===// 1410// System: Program-Status Word Instructions 1411//===----------------------------------------------------------------------===// 1412 1413def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>; 1414def : InstRW<[WLat30, MCD], (instregex "LPSW(E)?$")>; 1415def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>; 1416def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>; 1417def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>; 1418def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>; 1419def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>; 1420def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>; 1421 1422//===----------------------------------------------------------------------===// 1423// System: Control Register Instructions 1424//===----------------------------------------------------------------------===// 1425 1426def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>; 1427def : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STCT(L|G)$")>; 1428def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>; 1429def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>; 1430def : InstRW<[WLat30, MCD], (instregex "ESEA$")>; 1431 1432//===----------------------------------------------------------------------===// 1433// System: Prefix-Register Instructions 1434//===----------------------------------------------------------------------===// 1435 1436def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>; 1437 1438//===----------------------------------------------------------------------===// 1439// System: Storage-Key and Real Memory Instructions 1440//===----------------------------------------------------------------------===// 1441 1442def : InstRW<[WLat30, MCD], (instregex "ISKE$")>; 1443def : InstRW<[WLat30, MCD], (instregex "IVSK$")>; 1444def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>; 1445def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>; 1446def : InstRW<[WLat30, MCD], (instregex "PFMF$")>; 1447def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>; 1448def : InstRW<[WLat30, MCD], (instregex "PGIN$")>; 1449def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>; 1450 1451//===----------------------------------------------------------------------===// 1452// System: Dynamic-Address-Translation Instructions 1453//===----------------------------------------------------------------------===// 1454 1455def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>; 1456def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>; 1457def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>; 1458def : InstRW<[WLat30, MCD], (instregex "PTLB$")>; 1459def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>; 1460def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>; 1461def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>; 1462def : InstRW<[WLat30, MCD], (instregex "STRAG$")>; 1463def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>; 1464def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>; 1465def : InstRW<[WLat30, MCD], (instregex "TPROT$")>; 1466 1467//===----------------------------------------------------------------------===// 1468// System: Memory-move Instructions 1469//===----------------------------------------------------------------------===// 1470 1471def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>; 1472def : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>; 1473def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>; 1474def : InstRW<[WLat30, MCD], (instregex "MVPG$")>; 1475 1476//===----------------------------------------------------------------------===// 1477// System: Address-Space Instructions 1478//===----------------------------------------------------------------------===// 1479 1480def : InstRW<[WLat30, MCD], (instregex "LASP$")>; 1481def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>; 1482def : InstRW<[WLat30, MCD], (instregex "PC$")>; 1483def : InstRW<[WLat30, MCD], (instregex "PR$")>; 1484def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>; 1485def : InstRW<[WLat30, MCD], (instregex "RP$")>; 1486def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>; 1487def : InstRW<[WLat30, MCD], (instregex "TAR$")>; 1488 1489//===----------------------------------------------------------------------===// 1490// System: Linkage-Stack Instructions 1491//===----------------------------------------------------------------------===// 1492 1493def : InstRW<[WLat30, MCD], (instregex "BAKR$")>; 1494def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>; 1495def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>; 1496 1497//===----------------------------------------------------------------------===// 1498// System: Time-Related Instructions 1499//===----------------------------------------------------------------------===// 1500 1501def : InstRW<[WLat30, MCD], (instregex "PTFF$")>; 1502def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>; 1503def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>; 1504def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone2], (instregex "STCK(F)?$")>; 1505def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone3], (instregex "STCKE$")>; 1506def : InstRW<[WLat30, MCD], (instregex "STCKC$")>; 1507def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>; 1508 1509//===----------------------------------------------------------------------===// 1510// System: CPU-Related Instructions 1511//===----------------------------------------------------------------------===// 1512 1513def : InstRW<[WLat30, MCD], (instregex "STAP$")>; 1514def : InstRW<[WLat30, MCD], (instregex "STIDP$")>; 1515def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>; 1516def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>; 1517def : InstRW<[WLat30, MCD], (instregex "ECAG$")>; 1518def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>; 1519def : InstRW<[WLat30, MCD], (instregex "PTF$")>; 1520def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>; 1521 1522//===----------------------------------------------------------------------===// 1523// System: Miscellaneous Instructions 1524//===----------------------------------------------------------------------===// 1525 1526def : InstRW<[WLat30, MCD], (instregex "SVC$")>; 1527def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>; 1528def : InstRW<[WLat30, MCD], (instregex "DIAG$")>; 1529def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>; 1530def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>; 1531def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>; 1532def : InstRW<[WLat30, MCD], (instregex "SIE$")>; 1533 1534//===----------------------------------------------------------------------===// 1535// System: CPU-Measurement Facility Instructions 1536//===----------------------------------------------------------------------===// 1537 1538def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>; 1539def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>; 1540def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>; 1541def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>; 1542def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>; 1543def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>; 1544def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>; 1545 1546//===----------------------------------------------------------------------===// 1547// System: I/O Instructions 1548//===----------------------------------------------------------------------===// 1549 1550def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>; 1551def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>; 1552def : InstRW<[WLat30, MCD], (instregex "RCHP$")>; 1553def : InstRW<[WLat30, MCD], (instregex "SCHM$")>; 1554def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>; 1555def : InstRW<[WLat30, MCD], (instregex "TPI$")>; 1556def : InstRW<[WLat30, MCD], (instregex "SAL$")>; 1557 1558} 1559 1560