xref: /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZScheduleZ13.td (revision 0b57cec536236d46e3dba9bd041533462f33dbb7) 
1*0b57cec5SDimitry Andric//-- SystemZScheduleZ13.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
2*0b57cec5SDimitry Andric//
3*0b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*0b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information.
5*0b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*0b57cec5SDimitry Andric//
7*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
8*0b57cec5SDimitry Andric//
9*0b57cec5SDimitry Andric// This file defines the machine model for Z13 to support instruction
10*0b57cec5SDimitry Andric// scheduling and other instruction cost heuristics.
11*0b57cec5SDimitry Andric//
12*0b57cec5SDimitry Andric// Pseudos expanded right after isel do not need to be modelled here.
13*0b57cec5SDimitry Andric//
14*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
15*0b57cec5SDimitry Andric
16*0b57cec5SDimitry Andricdef Z13Model : SchedMachineModel {
17*0b57cec5SDimitry Andric
18*0b57cec5SDimitry Andric    let UnsupportedFeatures = Arch11UnsupportedFeatures.List;
19*0b57cec5SDimitry Andric
20*0b57cec5SDimitry Andric    let IssueWidth = 6;             // Number of instructions decoded per cycle.
21*0b57cec5SDimitry Andric    let MicroOpBufferSize = 60;     // Issue queues
22*0b57cec5SDimitry Andric    let LoadLatency = 1;            // Optimistic load latency.
23*0b57cec5SDimitry Andric
24*0b57cec5SDimitry Andric    let PostRAScheduler = 1;
25*0b57cec5SDimitry Andric
26*0b57cec5SDimitry Andric    // Extra cycles for a mispredicted branch.
27*0b57cec5SDimitry Andric    let MispredictPenalty = 20;
28*0b57cec5SDimitry Andric}
29*0b57cec5SDimitry Andric
30*0b57cec5SDimitry Andriclet SchedModel = Z13Model in  {
31*0b57cec5SDimitry Andric// These definitions need the SchedModel value. They could be put in a
32*0b57cec5SDimitry Andric// subtarget common include file, but it seems the include system in Tablegen
33*0b57cec5SDimitry Andric// currently (2016) rejects multiple includes of same file.
34*0b57cec5SDimitry Andric
35*0b57cec5SDimitry Andric// Decoder grouping rules
36*0b57cec5SDimitry Andriclet NumMicroOps = 1 in {
37*0b57cec5SDimitry Andric  def : WriteRes<NormalGr, []>;
38*0b57cec5SDimitry Andric  def : WriteRes<BeginGroup, []> { let BeginGroup  = 1; }
39*0b57cec5SDimitry Andric  def : WriteRes<EndGroup, []>   { let EndGroup    = 1; }
40*0b57cec5SDimitry Andric}
41*0b57cec5SDimitry Andricdef : WriteRes<Cracked, []> {
42*0b57cec5SDimitry Andric  let NumMicroOps = 2;
43*0b57cec5SDimitry Andric  let BeginGroup  = 1;
44*0b57cec5SDimitry Andric}
45*0b57cec5SDimitry Andricdef : WriteRes<GroupAlone, []> {
46*0b57cec5SDimitry Andric  let NumMicroOps = 3;
47*0b57cec5SDimitry Andric  let BeginGroup  = 1;
48*0b57cec5SDimitry Andric  let EndGroup    = 1;
49*0b57cec5SDimitry Andric}
50*0b57cec5SDimitry Andricdef : WriteRes<GroupAlone2, []> {
51*0b57cec5SDimitry Andric  let NumMicroOps = 6;
52*0b57cec5SDimitry Andric  let BeginGroup  = 1;
53*0b57cec5SDimitry Andric  let EndGroup    = 1;
54*0b57cec5SDimitry Andric}
55*0b57cec5SDimitry Andricdef : WriteRes<GroupAlone3, []> {
56*0b57cec5SDimitry Andric  let NumMicroOps = 9;
57*0b57cec5SDimitry Andric  let BeginGroup  = 1;
58*0b57cec5SDimitry Andric  let EndGroup    = 1;
59*0b57cec5SDimitry Andric}
60*0b57cec5SDimitry Andric
61*0b57cec5SDimitry Andric// Incoming latency removed from the register operand which is used together
62*0b57cec5SDimitry Andric// with a memory operand by the instruction.
63*0b57cec5SDimitry Andricdef : ReadAdvance<RegReadAdv, 4>;
64*0b57cec5SDimitry Andric
65*0b57cec5SDimitry Andric// LoadLatency (above) is not used for instructions in this file. This is
66*0b57cec5SDimitry Andric// instead the role of LSULatency, which is the latency value added to the
67*0b57cec5SDimitry Andric// result of loads and instructions with folded memory operands.
68*0b57cec5SDimitry Andricdef : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; }
69*0b57cec5SDimitry Andric
70*0b57cec5SDimitry Andriclet NumMicroOps = 0 in {
71*0b57cec5SDimitry Andric  foreach L = 1-30 in
72*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; }
73*0b57cec5SDimitry Andric}
74*0b57cec5SDimitry Andric
75*0b57cec5SDimitry Andric// Execution units.
76*0b57cec5SDimitry Andricdef Z13_FXaUnit     : ProcResource<2>;
77*0b57cec5SDimitry Andricdef Z13_FXbUnit     : ProcResource<2>;
78*0b57cec5SDimitry Andricdef Z13_LSUnit      : ProcResource<2>;
79*0b57cec5SDimitry Andricdef Z13_VecUnit     : ProcResource<2>;
80*0b57cec5SDimitry Andricdef Z13_VecFPdUnit  : ProcResource<2> { let BufferSize = 1; /* blocking */ }
81*0b57cec5SDimitry Andricdef Z13_VBUnit      : ProcResource<2>;
82*0b57cec5SDimitry Andricdef Z13_MCD         : ProcResource<1>;
83*0b57cec5SDimitry Andric
84*0b57cec5SDimitry Andric// Subtarget specific definitions of scheduling resources.
85*0b57cec5SDimitry Andriclet NumMicroOps = 0 in {
86*0b57cec5SDimitry Andric  def : WriteRes<FXa, [Z13_FXaUnit]>;
87*0b57cec5SDimitry Andric  def : WriteRes<FXb, [Z13_FXbUnit]>;
88*0b57cec5SDimitry Andric  def : WriteRes<LSU, [Z13_LSUnit]>;
89*0b57cec5SDimitry Andric  def : WriteRes<VecBF,  [Z13_VecUnit]>;
90*0b57cec5SDimitry Andric  def : WriteRes<VecDF,  [Z13_VecUnit]>;
91*0b57cec5SDimitry Andric  def : WriteRes<VecDFX, [Z13_VecUnit]>;
92*0b57cec5SDimitry Andric  def : WriteRes<VecMul,  [Z13_VecUnit]>;
93*0b57cec5SDimitry Andric  def : WriteRes<VecStr,  [Z13_VecUnit]>;
94*0b57cec5SDimitry Andric  def : WriteRes<VecXsPm, [Z13_VecUnit]>;
95*0b57cec5SDimitry Andric  foreach Num = 2-5 in { let ResourceCycles = [Num] in {
96*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z13_FXaUnit]>;
97*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z13_FXbUnit]>;
98*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z13_LSUnit]>;
99*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z13_VecUnit]>;
100*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z13_VecUnit]>;
101*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z13_VecUnit]>;
102*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z13_VecUnit]>;
103*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z13_VecUnit]>;
104*0b57cec5SDimitry Andric    def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z13_VecUnit]>;
105*0b57cec5SDimitry Andric  }}
106*0b57cec5SDimitry Andric
107*0b57cec5SDimitry Andric  def : WriteRes<VecFPd,  [Z13_VecFPdUnit]> { let ResourceCycles = [30]; }
108*0b57cec5SDimitry Andric
109*0b57cec5SDimitry Andric  def : WriteRes<VBU,     [Z13_VBUnit]>; // Virtual Branching Unit
110*0b57cec5SDimitry Andric}
111*0b57cec5SDimitry Andric
112*0b57cec5SDimitry Andricdef : WriteRes<MCD, [Z13_MCD]> { let NumMicroOps = 3;
113*0b57cec5SDimitry Andric                                 let BeginGroup  = 1;
114*0b57cec5SDimitry Andric                                 let EndGroup    = 1; }
115*0b57cec5SDimitry Andric
116*0b57cec5SDimitry Andric// -------------------------- INSTRUCTIONS ---------------------------------- //
117*0b57cec5SDimitry Andric
118*0b57cec5SDimitry Andric// InstRW constructs have been used in order to preserve the
119*0b57cec5SDimitry Andric// readability of the InstrInfo files.
120*0b57cec5SDimitry Andric
121*0b57cec5SDimitry Andric// For each instruction, as matched by a regexp, provide a list of
122*0b57cec5SDimitry Andric// resources that it needs. These will be combined into a SchedClass.
123*0b57cec5SDimitry Andric
124*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
125*0b57cec5SDimitry Andric// Stack allocation
126*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
127*0b57cec5SDimitry Andric
128*0b57cec5SDimitry Andric// Pseudo -> LA / LAY
129*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>;
130*0b57cec5SDimitry Andric
131*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
132*0b57cec5SDimitry Andric// Branch instructions
133*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
134*0b57cec5SDimitry Andric
135*0b57cec5SDimitry Andric// Branch
136*0b57cec5SDimitry Andricdef : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;
137*0b57cec5SDimitry Andricdef : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>;
138*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>;
139*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>;
140*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>;
141*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>;
142*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>;
143*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa2, FXb2, GroupAlone2],
144*0b57cec5SDimitry Andric             (instregex "B(R)?X(H|L).*$")>;
145*0b57cec5SDimitry Andric
146*0b57cec5SDimitry Andric// Compare and branch
147*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;
148*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb2, GroupAlone],
149*0b57cec5SDimitry Andric             (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;
150*0b57cec5SDimitry Andric
151*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
152*0b57cec5SDimitry Andric// Trap instructions
153*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
154*0b57cec5SDimitry Andric
155*0b57cec5SDimitry Andric// Trap
156*0b57cec5SDimitry Andricdef : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>;
157*0b57cec5SDimitry Andric
158*0b57cec5SDimitry Andric// Compare and trap
159*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>;
160*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>;
161*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>;
162*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>;
163*0b57cec5SDimitry Andric
164*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
165*0b57cec5SDimitry Andric// Call and return instructions
166*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
167*0b57cec5SDimitry Andric
168*0b57cec5SDimitry Andric// Call
169*0b57cec5SDimitry Andricdef : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>;
170*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL$")>;
171*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?$")>;
172*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;
173*0b57cec5SDimitry Andric
174*0b57cec5SDimitry Andric// Return
175*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, EndGroup], (instregex "Return$")>;
176*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn$")>;
177*0b57cec5SDimitry Andric
178*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
179*0b57cec5SDimitry Andric// Move instructions
180*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
181*0b57cec5SDimitry Andric
182*0b57cec5SDimitry Andric// Moves
183*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>;
184*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>;
185*0b57cec5SDimitry Andric
186*0b57cec5SDimitry Andric// Move character
187*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
188*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>;
189*0b57cec5SDimitry Andric
190*0b57cec5SDimitry Andric// Pseudo -> reg move
191*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>;
192*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>;
193*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>;
194*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>;
195*0b57cec5SDimitry Andric
196*0b57cec5SDimitry Andric// Loads
197*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>;
198*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>;
199*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>;
200*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
201*0b57cec5SDimitry Andric
202*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>;
203*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>;
204*0b57cec5SDimitry Andric
205*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>;
206*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>;
207*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LR(Mux)?$")>;
208*0b57cec5SDimitry Andric
209*0b57cec5SDimitry Andric// Load and zero rightmost byte
210*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>;
211*0b57cec5SDimitry Andric
212*0b57cec5SDimitry Andric// Load and trap
213*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>;
214*0b57cec5SDimitry Andric
215*0b57cec5SDimitry Andric// Load and test
216*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>;
217*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>;
218*0b57cec5SDimitry Andric
219*0b57cec5SDimitry Andric// Stores
220*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>;
221*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>;
222*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>;
223*0b57cec5SDimitry Andric
224*0b57cec5SDimitry Andric// String moves.
225*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>;
226*0b57cec5SDimitry Andric
227*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
228*0b57cec5SDimitry Andric// Conditional move instructions
229*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
230*0b57cec5SDimitry Andric
231*0b57cec5SDimitry Andricdef : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>;
232*0b57cec5SDimitry Andricdef : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>;
233*0b57cec5SDimitry Andricdef : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>;
234*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
235*0b57cec5SDimitry Andric             (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>;
236*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr],
237*0b57cec5SDimitry Andric             (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>;
238*0b57cec5SDimitry Andric
239*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
240*0b57cec5SDimitry Andric// Sign extensions
241*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
242*0b57cec5SDimitry Andric
243*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>;
244*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>;
245*0b57cec5SDimitry Andric
246*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>;
247*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>;
248*0b57cec5SDimitry Andric
249*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>;
250*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>;
251*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>;
252*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>;
253*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>;
254*0b57cec5SDimitry Andric
255*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
256*0b57cec5SDimitry Andric// Zero extensions
257*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
258*0b57cec5SDimitry Andric
259*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>;
260*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>;
261*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>;
262*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>;
263*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>;
264*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>;
265*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>;
266*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;
267*0b57cec5SDimitry Andric
268*0b57cec5SDimitry Andric// Load and zero rightmost byte
269*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>;
270*0b57cec5SDimitry Andric
271*0b57cec5SDimitry Andric// Load and trap
272*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>;
273*0b57cec5SDimitry Andric
274*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
275*0b57cec5SDimitry Andric// Truncations
276*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
277*0b57cec5SDimitry Andric
278*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>;
279*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
280*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>;
281*0b57cec5SDimitry Andric
282*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
283*0b57cec5SDimitry Andric// Multi-register moves
284*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
285*0b57cec5SDimitry Andric
286*0b57cec5SDimitry Andric// Load multiple (estimated average of 5 ops)
287*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>;
288*0b57cec5SDimitry Andric
289*0b57cec5SDimitry Andric// Load multiple disjoint
290*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>;
291*0b57cec5SDimitry Andric
292*0b57cec5SDimitry Andric// Store multiple
293*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;
294*0b57cec5SDimitry Andric
295*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
296*0b57cec5SDimitry Andric// Byte swaps
297*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
298*0b57cec5SDimitry Andric
299*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>;
300*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>;
301*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>;
302*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "MVCIN$")>;
303*0b57cec5SDimitry Andric
304*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
305*0b57cec5SDimitry Andric// Load address instructions
306*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
307*0b57cec5SDimitry Andric
308*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>;
309*0b57cec5SDimitry Andric
310*0b57cec5SDimitry Andric// Load the Global Offset Table address ( -> larl )
311*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>;
312*0b57cec5SDimitry Andric
313*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
314*0b57cec5SDimitry Andric// Absolute and Negation
315*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
316*0b57cec5SDimitry Andric
317*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LP(G)?R$")>;
318*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "L(N|P)GFR$")>;
319*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LN(R|GR)$")>;
320*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>;
321*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>;
322*0b57cec5SDimitry Andric
323*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
324*0b57cec5SDimitry Andric// Insertion
325*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
326*0b57cec5SDimitry Andric
327*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>;
328*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
329*0b57cec5SDimitry Andric             (instregex "IC32(Y)?$")>;
330*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr],
331*0b57cec5SDimitry Andric             (instregex "ICM(H|Y)?$")>;
332*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>;
333*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>;
334*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>;
335*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>;
336*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>;
337*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>;
338*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>;
339*0b57cec5SDimitry Andric
340*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
341*0b57cec5SDimitry Andric// Addition
342*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
343*0b57cec5SDimitry Andric
344*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
345*0b57cec5SDimitry Andric             (instregex "A(Y)?$")>;
346*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
347*0b57cec5SDimitry Andric             (instregex "AH(Y)?$")>;
348*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>;
349*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>;
350*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
351*0b57cec5SDimitry Andric             (instregex "AG$")>;
352*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>;
353*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>;
354*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>;
355*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>;
356*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>;
357*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
358*0b57cec5SDimitry Andric             (instregex "AL(Y)?$")>;
359*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>;
360*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
361*0b57cec5SDimitry Andric             (instregex "ALG(F)?$")>;
362*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>;
363*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>;
364*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>;
365*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>;
366*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>;
367*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>;
368*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>;
369*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>;
370*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>;
371*0b57cec5SDimitry Andric
372*0b57cec5SDimitry Andric// Logical addition with carry
373*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
374*0b57cec5SDimitry Andric             (instregex "ALC(G)?$")>;
375*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>;
376*0b57cec5SDimitry Andric
377*0b57cec5SDimitry Andric// Add with sign extension (32 -> 64)
378*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
379*0b57cec5SDimitry Andric             (instregex "AGF$")>;
380*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>;
381*0b57cec5SDimitry Andric
382*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
383*0b57cec5SDimitry Andric// Subtraction
384*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
385*0b57cec5SDimitry Andric
386*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
387*0b57cec5SDimitry Andric             (instregex "S(G|Y)?$")>;
388*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
389*0b57cec5SDimitry Andric             (instregex "SH(Y)?$")>;
390*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>;
391*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>;
392*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
393*0b57cec5SDimitry Andric             (instregex "SL(G|GF|Y)?$")>;
394*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>;
395*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>;
396*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>;
397*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>;
398*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>;
399*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>;
400*0b57cec5SDimitry Andric
401*0b57cec5SDimitry Andric// Subtraction with borrow
402*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
403*0b57cec5SDimitry Andric             (instregex "SLB(G)?$")>;
404*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>;
405*0b57cec5SDimitry Andric
406*0b57cec5SDimitry Andric// Subtraction with sign extension (32 -> 64)
407*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
408*0b57cec5SDimitry Andric             (instregex "SGF$")>;
409*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>;
410*0b57cec5SDimitry Andric
411*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
412*0b57cec5SDimitry Andric// AND
413*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
414*0b57cec5SDimitry Andric
415*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
416*0b57cec5SDimitry Andric             (instregex "N(G|Y)?$")>;
417*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>;
418*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>;
419*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>;
420*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>;
421*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>;
422*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>;
423*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>;
424*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>;
425*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>;
426*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>;
427*0b57cec5SDimitry Andricdef : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>;
428*0b57cec5SDimitry Andric
429*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
430*0b57cec5SDimitry Andric// OR
431*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
432*0b57cec5SDimitry Andric
433*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
434*0b57cec5SDimitry Andric             (instregex "O(G|Y)?$")>;
435*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>;
436*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>;
437*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>;
438*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>;
439*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>;
440*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>;
441*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>;
442*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>;
443*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>;
444*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>;
445*0b57cec5SDimitry Andricdef : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>;
446*0b57cec5SDimitry Andric
447*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
448*0b57cec5SDimitry Andric// XOR
449*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
450*0b57cec5SDimitry Andric
451*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
452*0b57cec5SDimitry Andric             (instregex "X(G|Y)?$")>;
453*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>;
454*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>;
455*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>;
456*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>;
457*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>;
458*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>;
459*0b57cec5SDimitry Andricdef : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>;
460*0b57cec5SDimitry Andric
461*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
462*0b57cec5SDimitry Andric// Multiplication
463*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
464*0b57cec5SDimitry Andric
465*0b57cec5SDimitry Andricdef : InstRW<[WLat6LSU, RegReadAdv, FXa, LSU, NormalGr],
466*0b57cec5SDimitry Andric             (instregex "MS(GF|Y)?$")>;
467*0b57cec5SDimitry Andricdef : InstRW<[WLat6, FXa, NormalGr], (instregex "MS(R|FI)$")>;
468*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>;
469*0b57cec5SDimitry Andricdef : InstRW<[WLat8, FXa, NormalGr], (instregex "MSGR$")>;
470*0b57cec5SDimitry Andricdef : InstRW<[WLat6, FXa, NormalGr], (instregex "MSGF(I|R)$")>;
471*0b57cec5SDimitry Andricdef : InstRW<[WLat11LSU, RegReadAdv, FXa2, LSU, GroupAlone],
472*0b57cec5SDimitry Andric             (instregex "MLG$")>;
473*0b57cec5SDimitry Andricdef : InstRW<[WLat9, FXa2, GroupAlone], (instregex "MLGR$")>;
474*0b57cec5SDimitry Andricdef : InstRW<[WLat5, FXa, NormalGr], (instregex "MGHI$")>;
475*0b57cec5SDimitry Andricdef : InstRW<[WLat5, FXa, NormalGr], (instregex "MHI$")>;
476*0b57cec5SDimitry Andricdef : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>;
477*0b57cec5SDimitry Andricdef : InstRW<[WLat7, FXa2, GroupAlone], (instregex "M(L)?R$")>;
478*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, FXa2, LSU, GroupAlone],
479*0b57cec5SDimitry Andric             (instregex "M(FY|L)?$")>;
480*0b57cec5SDimitry Andric
481*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
482*0b57cec5SDimitry Andric// Division and remainder
483*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
484*0b57cec5SDimitry Andric
485*0b57cec5SDimitry Andricdef : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>;
486*0b57cec5SDimitry Andricdef : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "D$")>;
487*0b57cec5SDimitry Andricdef : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>;
488*0b57cec5SDimitry Andricdef : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone2],
489*0b57cec5SDimitry Andric             (instregex "DSG(F)?$")>;
490*0b57cec5SDimitry Andricdef : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>;
491*0b57cec5SDimitry Andricdef : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>;
492*0b57cec5SDimitry Andricdef : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone2], (instregex "DL(G)?$")>;
493*0b57cec5SDimitry Andric
494*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
495*0b57cec5SDimitry Andric// Shifts
496*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
497*0b57cec5SDimitry Andric
498*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>;
499*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>;
500*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>;
501*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>;
502*0b57cec5SDimitry Andricdef : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone2],
503*0b57cec5SDimitry Andric             (instregex "S(L|R)D(A|L)$")>;
504*0b57cec5SDimitry Andric
505*0b57cec5SDimitry Andric// Rotate
506*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
507*0b57cec5SDimitry Andric
508*0b57cec5SDimitry Andric// Rotate and insert
509*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
510*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
511*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
512*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
513*0b57cec5SDimitry Andric
514*0b57cec5SDimitry Andric// Rotate and Select
515*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>;
516*0b57cec5SDimitry Andric
517*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
518*0b57cec5SDimitry Andric// Comparison
519*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
520*0b57cec5SDimitry Andric
521*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
522*0b57cec5SDimitry Andric             (instregex "C(G|Y|Mux)?$")>;
523*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>;
524*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>;
525*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>;
526*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>;
527*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>;
528*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>;
529*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>;
530*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>;
531*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
532*0b57cec5SDimitry Andric             (instregex "CL(Y|Mux)?$")>;
533*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>;
534*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>;
535*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>;
536*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>;
537*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>;
538*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>;
539*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>;
540*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>;
541*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>;
542*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>;
543*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>;
544*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>;
545*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>;
546*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>;
547*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>;
548*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>;
549*0b57cec5SDimitry Andricdef : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>;
550*0b57cec5SDimitry Andric
551*0b57cec5SDimitry Andric// Compare halfword
552*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>;
553*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>;
554*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;
555*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>;
556*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>;
557*0b57cec5SDimitry Andric
558*0b57cec5SDimitry Andric// Compare with sign extension (32 -> 64)
559*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>;
560*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>;
561*0b57cec5SDimitry Andricdef : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>;
562*0b57cec5SDimitry Andric
563*0b57cec5SDimitry Andric// Compare logical character
564*0b57cec5SDimitry Andricdef : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>;
565*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>;
566*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>;
567*0b57cec5SDimitry Andric
568*0b57cec5SDimitry Andric// Test under mask
569*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>;
570*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>;
571*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>;
572*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>;
573*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>;
574*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>;
575*0b57cec5SDimitry Andric
576*0b57cec5SDimitry Andric// Compare logical characters under mask
577*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr],
578*0b57cec5SDimitry Andric             (instregex "CLM(H|Y)?$")>;
579*0b57cec5SDimitry Andric
580*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
581*0b57cec5SDimitry Andric// Prefetch and execution hint
582*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
583*0b57cec5SDimitry Andric
584*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>;
585*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>;
586*0b57cec5SDimitry Andricdef : InstRW<[FXb, EndGroup], (instregex "BPRP$")>;
587*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>;
588*0b57cec5SDimitry Andric
589*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
590*0b57cec5SDimitry Andric// Atomic operations
591*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
592*0b57cec5SDimitry Andric
593*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>;
594*0b57cec5SDimitry Andric
595*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>;
596*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>;
597*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>;
598*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>;
599*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>;
600*0b57cec5SDimitry Andric
601*0b57cec5SDimitry Andric// Test and set
602*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>;
603*0b57cec5SDimitry Andric
604*0b57cec5SDimitry Andric// Compare and swap
605*0b57cec5SDimitry Andricdef : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone],
606*0b57cec5SDimitry Andric             (instregex "CS(G|Y)?$")>;
607*0b57cec5SDimitry Andric
608*0b57cec5SDimitry Andric// Compare double and swap
609*0b57cec5SDimitry Andricdef : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone2],
610*0b57cec5SDimitry Andric             (instregex "CDS(Y)?$")>;
611*0b57cec5SDimitry Andricdef : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3, GroupAlone3],
612*0b57cec5SDimitry Andric             (instregex "CDSG$")>;
613*0b57cec5SDimitry Andric
614*0b57cec5SDimitry Andric// Compare and swap and store
615*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "CSST$")>;
616*0b57cec5SDimitry Andric
617*0b57cec5SDimitry Andric// Perform locked operation
618*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PLO$")>;
619*0b57cec5SDimitry Andric
620*0b57cec5SDimitry Andric// Load/store pair from/to quadword
621*0b57cec5SDimitry Andricdef : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>;
622*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>;
623*0b57cec5SDimitry Andric
624*0b57cec5SDimitry Andric// Load pair disjoint
625*0b57cec5SDimitry Andricdef : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>;
626*0b57cec5SDimitry Andric
627*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
628*0b57cec5SDimitry Andric// Translate and convert
629*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
630*0b57cec5SDimitry Andric
631*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>;
632*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone2],
633*0b57cec5SDimitry Andric             (instregex "TRT$")>;
634*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>;
635*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>;
636*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>;
637*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>;
638*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD],
639*0b57cec5SDimitry Andric             (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
640*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
641*0b57cec5SDimitry Andric
642*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
643*0b57cec5SDimitry Andric// Message-security assist
644*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
645*0b57cec5SDimitry Andric
646*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD],
647*0b57cec5SDimitry Andric             (instregex "KM(C|F|O|CTR)?$")>;
648*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD],
649*0b57cec5SDimitry Andric             (instregex "(KIMD|KLMD|KMAC|PCC|PPNO)$")>;
650*0b57cec5SDimitry Andric
651*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
652*0b57cec5SDimitry Andric// Decimal arithmetic
653*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
654*0b57cec5SDimitry Andric
655*0b57cec5SDimitry Andricdef : InstRW<[WLat30, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone2],
656*0b57cec5SDimitry Andric             (instregex "CVBG$")>;
657*0b57cec5SDimitry Andricdef : InstRW<[WLat30, RegReadAdv, FXb, VecDF, LSU, GroupAlone2],
658*0b57cec5SDimitry Andric             (instregex "CVB(Y)?$")>;
659*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone3], (instregex "CVDG$")>;
660*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone2], (instregex "CVD(Y)?$")>;
661*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>;
662*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
663*0b57cec5SDimitry Andricdef : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>;
664*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>;
665*0b57cec5SDimitry Andric
666*0b57cec5SDimitry Andricdef : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone2],
667*0b57cec5SDimitry Andric             (instregex "(A|S|ZA)P$")>;
668*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone2], (instregex "(M|D)P$")>;
669*0b57cec5SDimitry Andricdef : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone3], (instregex "SRP$")>;
670*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>;
671*0b57cec5SDimitry Andricdef : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>;
672*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>;
673*0b57cec5SDimitry Andric
674*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
675*0b57cec5SDimitry Andric// Access registers
676*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
677*0b57cec5SDimitry Andric
678*0b57cec5SDimitry Andric// Extract/set/copy access register
679*0b57cec5SDimitry Andricdef : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>;
680*0b57cec5SDimitry Andric
681*0b57cec5SDimitry Andric// Load address extended
682*0b57cec5SDimitry Andricdef : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>;
683*0b57cec5SDimitry Andric
684*0b57cec5SDimitry Andric// Load/store access multiple (not modeled precisely)
685*0b57cec5SDimitry Andricdef : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>;
686*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STAM(Y)?$")>;
687*0b57cec5SDimitry Andric
688*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
689*0b57cec5SDimitry Andric// Program mask and addressing mode
690*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
691*0b57cec5SDimitry Andric
692*0b57cec5SDimitry Andric// Insert Program Mask
693*0b57cec5SDimitry Andricdef : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>;
694*0b57cec5SDimitry Andric
695*0b57cec5SDimitry Andric// Set Program Mask
696*0b57cec5SDimitry Andricdef : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>;
697*0b57cec5SDimitry Andric
698*0b57cec5SDimitry Andric// Branch and link
699*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>;
700*0b57cec5SDimitry Andric
701*0b57cec5SDimitry Andric// Test addressing mode
702*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>;
703*0b57cec5SDimitry Andric
704*0b57cec5SDimitry Andric// Set addressing mode
705*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>;
706*0b57cec5SDimitry Andric
707*0b57cec5SDimitry Andric// Branch (and save) and set mode.
708*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>;
709*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>;
710*0b57cec5SDimitry Andric
711*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
712*0b57cec5SDimitry Andric// Transactional execution
713*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
714*0b57cec5SDimitry Andric
715*0b57cec5SDimitry Andric// Transaction begin
716*0b57cec5SDimitry Andricdef : InstRW<[WLat9, LSU2, FXb5, GroupAlone2], (instregex "TBEGIN(C)?$")>;
717*0b57cec5SDimitry Andric
718*0b57cec5SDimitry Andric// Transaction end
719*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>;
720*0b57cec5SDimitry Andric
721*0b57cec5SDimitry Andric// Transaction abort
722*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "TABORT$")>;
723*0b57cec5SDimitry Andric
724*0b57cec5SDimitry Andric// Extract Transaction Nesting Depth
725*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>;
726*0b57cec5SDimitry Andric
727*0b57cec5SDimitry Andric// Nontransactional store
728*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>;
729*0b57cec5SDimitry Andric
730*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
731*0b57cec5SDimitry Andric// Processor assist
732*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
733*0b57cec5SDimitry Andric
734*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PPA$")>;
735*0b57cec5SDimitry Andric
736*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
737*0b57cec5SDimitry Andric// Miscellaneous Instructions.
738*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
739*0b57cec5SDimitry Andric
740*0b57cec5SDimitry Andric// Find leftmost one
741*0b57cec5SDimitry Andricdef : InstRW<[WLat7, WLat7, FXa2, GroupAlone], (instregex "FLOGR$")>;
742*0b57cec5SDimitry Andric
743*0b57cec5SDimitry Andric// Population count
744*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT$")>;
745*0b57cec5SDimitry Andric
746*0b57cec5SDimitry Andric// String instructions
747*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>;
748*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>;
749*0b57cec5SDimitry Andric
750*0b57cec5SDimitry Andric// Various complex instructions
751*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>;
752*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD],
753*0b57cec5SDimitry Andric             (instregex "UPT$")>;
754*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>;
755*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>;
756*0b57cec5SDimitry Andric
757*0b57cec5SDimitry Andric// Execute
758*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>;
759*0b57cec5SDimitry Andric
760*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
761*0b57cec5SDimitry Andric// .insn directive instructions
762*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
763*0b57cec5SDimitry Andric
764*0b57cec5SDimitry Andric// An "empty" sched-class will be assigned instead of the "invalid sched-class".
765*0b57cec5SDimitry Andric// getNumDecoderSlots() will then return 1 instead of 0.
766*0b57cec5SDimitry Andricdef : InstRW<[], (instregex "Insn.*")>;
767*0b57cec5SDimitry Andric
768*0b57cec5SDimitry Andric
769*0b57cec5SDimitry Andric// ----------------------------- Floating point ----------------------------- //
770*0b57cec5SDimitry Andric
771*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
772*0b57cec5SDimitry Andric// FP: Move instructions
773*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
774*0b57cec5SDimitry Andric
775*0b57cec5SDimitry Andric// Load zero
776*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>;
777*0b57cec5SDimitry Andricdef : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>;
778*0b57cec5SDimitry Andric
779*0b57cec5SDimitry Andric// Load
780*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>;
781*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
782*0b57cec5SDimitry Andricdef : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>;
783*0b57cec5SDimitry Andricdef : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>;
784*0b57cec5SDimitry Andric
785*0b57cec5SDimitry Andric// Load and Test
786*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>;
787*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BRCompare$")>;
788*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone],
789*0b57cec5SDimitry Andric             (instregex "LTXBR(Compare)?$")>;
790*0b57cec5SDimitry Andric
791*0b57cec5SDimitry Andric// Copy sign
792*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>;
793*0b57cec5SDimitry Andric
794*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
795*0b57cec5SDimitry Andric// FP: Load instructions
796*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
797*0b57cec5SDimitry Andric
798*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>;
799*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>;
800*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>;
801*0b57cec5SDimitry Andric
802*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
803*0b57cec5SDimitry Andric// FP: Store instructions
804*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
805*0b57cec5SDimitry Andric
806*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>;
807*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>;
808*0b57cec5SDimitry Andric
809*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
810*0b57cec5SDimitry Andric// FP: Conversion instructions
811*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
812*0b57cec5SDimitry Andric
813*0b57cec5SDimitry Andric// Load rounded
814*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEDBR(A)?$")>;
815*0b57cec5SDimitry Andricdef : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>;
816*0b57cec5SDimitry Andric
817*0b57cec5SDimitry Andric// Load lengthened
818*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>;
819*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "LDEBR$")>;
820*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>;
821*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>;
822*0b57cec5SDimitry Andric
823*0b57cec5SDimitry Andric// Convert from fixed / logical
824*0b57cec5SDimitry Andricdef : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>;
825*0b57cec5SDimitry Andricdef : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)BR(A)?$")>;
826*0b57cec5SDimitry Andricdef : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>;
827*0b57cec5SDimitry Andricdef : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)BR$")>;
828*0b57cec5SDimitry Andric
829*0b57cec5SDimitry Andric// Convert to fixed / logical
830*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked],
831*0b57cec5SDimitry Andric             (instregex "C(F|G)(E|D)BR(A)?$")>;
832*0b57cec5SDimitry Andricdef : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked],
833*0b57cec5SDimitry Andric             (instregex "C(F|G)XBR(A)?$")>;
834*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>;
835*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLFDBR$")>;
836*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>;
837*0b57cec5SDimitry Andricdef : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>;
838*0b57cec5SDimitry Andric
839*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
840*0b57cec5SDimitry Andric// FP: Unary arithmetic
841*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
842*0b57cec5SDimitry Andric
843*0b57cec5SDimitry Andric// Load Complement / Negative / Positive
844*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>;
845*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>;
846*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>;
847*0b57cec5SDimitry Andric
848*0b57cec5SDimitry Andric// Square root
849*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>;
850*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>;
851*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>;
852*0b57cec5SDimitry Andric
853*0b57cec5SDimitry Andric// Load FP integer
854*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>;
855*0b57cec5SDimitry Andricdef : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>;
856*0b57cec5SDimitry Andric
857*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
858*0b57cec5SDimitry Andric// FP: Binary arithmetic
859*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
860*0b57cec5SDimitry Andric
861*0b57cec5SDimitry Andric// Addition
862*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
863*0b57cec5SDimitry Andric             (instregex "A(E|D)B$")>;
864*0b57cec5SDimitry Andricdef : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D)BR$")>;
865*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>;
866*0b57cec5SDimitry Andric
867*0b57cec5SDimitry Andric// Subtraction
868*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
869*0b57cec5SDimitry Andric             (instregex "S(E|D)B$")>;
870*0b57cec5SDimitry Andricdef : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D)BR$")>;
871*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>;
872*0b57cec5SDimitry Andric
873*0b57cec5SDimitry Andric// Multiply
874*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
875*0b57cec5SDimitry Andric             (instregex "M(D|DE|EE)B$")>;
876*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>;
877*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
878*0b57cec5SDimitry Andric             (instregex "MXDB$")>;
879*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDBR$")>;
880*0b57cec5SDimitry Andricdef : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>;
881*0b57cec5SDimitry Andric
882*0b57cec5SDimitry Andric// Multiply and add / subtract
883*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
884*0b57cec5SDimitry Andric             (instregex "M(A|S)EB$")>;
885*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>;
886*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
887*0b57cec5SDimitry Andric             (instregex "M(A|S)DB$")>;
888*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(A|S)DBR$")>;
889*0b57cec5SDimitry Andric
890*0b57cec5SDimitry Andric// Division
891*0b57cec5SDimitry Andricdef : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
892*0b57cec5SDimitry Andric             (instregex "D(E|D)B$")>;
893*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>;
894*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>;
895*0b57cec5SDimitry Andric
896*0b57cec5SDimitry Andric// Divide to integer
897*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>;
898*0b57cec5SDimitry Andric
899*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
900*0b57cec5SDimitry Andric// FP: Comparisons
901*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
902*0b57cec5SDimitry Andric
903*0b57cec5SDimitry Andric// Compare
904*0b57cec5SDimitry Andricdef : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
905*0b57cec5SDimitry Andric             (instregex "(K|C)(E|D)B$")>;
906*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>;
907*0b57cec5SDimitry Andricdef : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>;
908*0b57cec5SDimitry Andric
909*0b57cec5SDimitry Andric// Test Data Class
910*0b57cec5SDimitry Andricdef : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>;
911*0b57cec5SDimitry Andricdef : InstRW<[WLat10, LSU, VecDF4, GroupAlone], (instregex "TCXB$")>;
912*0b57cec5SDimitry Andric
913*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
914*0b57cec5SDimitry Andric// FP: Floating-point control register instructions
915*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
916*0b57cec5SDimitry Andric
917*0b57cec5SDimitry Andricdef : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>;
918*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>;
919*0b57cec5SDimitry Andricdef : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>;
920*0b57cec5SDimitry Andricdef : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>;
921*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SFASR$")>;
922*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "LFAS$")>;
923*0b57cec5SDimitry Andricdef : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>;
924*0b57cec5SDimitry Andric
925*0b57cec5SDimitry Andric
926*0b57cec5SDimitry Andric// --------------------- Hexadecimal floating point ------------------------- //
927*0b57cec5SDimitry Andric
928*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
929*0b57cec5SDimitry Andric// HFP: Move instructions
930*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
931*0b57cec5SDimitry Andric
932*0b57cec5SDimitry Andric// Load and Test
933*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>;
934*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>;
935*0b57cec5SDimitry Andric
936*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
937*0b57cec5SDimitry Andric// HFP: Conversion instructions
938*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
939*0b57cec5SDimitry Andric
940*0b57cec5SDimitry Andric// Load rounded
941*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>;
942*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEXR$")>;
943*0b57cec5SDimitry Andricdef : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>;
944*0b57cec5SDimitry Andric
945*0b57cec5SDimitry Andric// Load lengthened
946*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>;
947*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>;
948*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>;
949*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>;
950*0b57cec5SDimitry Andric
951*0b57cec5SDimitry Andric// Convert from fixed
952*0b57cec5SDimitry Andricdef : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>;
953*0b57cec5SDimitry Andricdef : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)R$")>;
954*0b57cec5SDimitry Andric
955*0b57cec5SDimitry Andric// Convert to fixed
956*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>;
957*0b57cec5SDimitry Andricdef : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>;
958*0b57cec5SDimitry Andric
959*0b57cec5SDimitry Andric// Convert BFP to HFP / HFP to BFP.
960*0b57cec5SDimitry Andricdef : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "THD(E)?R$")>;
961*0b57cec5SDimitry Andricdef : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "TB(E)?DR$")>;
962*0b57cec5SDimitry Andric
963*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
964*0b57cec5SDimitry Andric// HFP: Unary arithmetic
965*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
966*0b57cec5SDimitry Andric
967*0b57cec5SDimitry Andric// Load Complement / Negative / Positive
968*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>;
969*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>;
970*0b57cec5SDimitry Andric
971*0b57cec5SDimitry Andric// Halve
972*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "H(E|D)R$")>;
973*0b57cec5SDimitry Andric
974*0b57cec5SDimitry Andric// Square root
975*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>;
976*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>;
977*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>;
978*0b57cec5SDimitry Andric
979*0b57cec5SDimitry Andric// Load FP integer
980*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)R$")>;
981*0b57cec5SDimitry Andricdef : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>;
982*0b57cec5SDimitry Andric
983*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
984*0b57cec5SDimitry Andric// HFP: Binary arithmetic
985*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
986*0b57cec5SDimitry Andric
987*0b57cec5SDimitry Andric// Addition
988*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
989*0b57cec5SDimitry Andric             (instregex "A(E|D|U|W)$")>;
990*0b57cec5SDimitry Andricdef : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>;
991*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>;
992*0b57cec5SDimitry Andric
993*0b57cec5SDimitry Andric// Subtraction
994*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
995*0b57cec5SDimitry Andric             (instregex "S(E|D|U|W)$")>;
996*0b57cec5SDimitry Andricdef : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>;
997*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>;
998*0b57cec5SDimitry Andric
999*0b57cec5SDimitry Andric// Multiply
1000*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1001*0b57cec5SDimitry Andric             (instregex "M(D|DE|E|EE)$")>;
1002*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>;
1003*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
1004*0b57cec5SDimitry Andric             (instregex "MXD$")>;
1005*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDR$")>;
1006*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>;
1007*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
1008*0b57cec5SDimitry Andric             (instregex "MY$")>;
1009*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, VecBF2, LSU, GroupAlone],
1010*0b57cec5SDimitry Andric             (instregex "MY(H|L)$")>;
1011*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MYR$")>;
1012*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MY(H|L)R$")>;
1013*0b57cec5SDimitry Andric
1014*0b57cec5SDimitry Andric// Multiply and add / subtract
1015*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
1016*0b57cec5SDimitry Andric             (instregex "M(A|S)(E|D)$")>;
1017*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>;
1018*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone],
1019*0b57cec5SDimitry Andric             (instregex "MAY$")>;
1020*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
1021*0b57cec5SDimitry Andric             (instregex "MAY(H|L)$")>;
1022*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MAYR$")>;
1023*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>;
1024*0b57cec5SDimitry Andric
1025*0b57cec5SDimitry Andric// Division
1026*0b57cec5SDimitry Andricdef : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
1027*0b57cec5SDimitry Andric             (instregex "D(E|D)$")>;
1028*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>;
1029*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>;
1030*0b57cec5SDimitry Andric
1031*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1032*0b57cec5SDimitry Andric// HFP: Comparisons
1033*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1034*0b57cec5SDimitry Andric
1035*0b57cec5SDimitry Andric// Compare
1036*0b57cec5SDimitry Andricdef : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
1037*0b57cec5SDimitry Andric             (instregex "C(E|D)$")>;
1038*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "C(E|D)R$")>;
1039*0b57cec5SDimitry Andricdef : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>;
1040*0b57cec5SDimitry Andric
1041*0b57cec5SDimitry Andric
1042*0b57cec5SDimitry Andric// ------------------------ Decimal floating point -------------------------- //
1043*0b57cec5SDimitry Andric
1044*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1045*0b57cec5SDimitry Andric// DFP: Move instructions
1046*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1047*0b57cec5SDimitry Andric
1048*0b57cec5SDimitry Andric// Load and Test
1049*0b57cec5SDimitry Andricdef : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>;
1050*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>;
1051*0b57cec5SDimitry Andric
1052*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1053*0b57cec5SDimitry Andric// DFP: Conversion instructions
1054*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1055*0b57cec5SDimitry Andric
1056*0b57cec5SDimitry Andric// Load rounded
1057*0b57cec5SDimitry Andricdef : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>;
1058*0b57cec5SDimitry Andricdef : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>;
1059*0b57cec5SDimitry Andric
1060*0b57cec5SDimitry Andric// Load lengthened
1061*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>;
1062*0b57cec5SDimitry Andricdef : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>;
1063*0b57cec5SDimitry Andric
1064*0b57cec5SDimitry Andric// Convert from fixed / logical
1065*0b57cec5SDimitry Andricdef : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CD(F|G)TR(A)?$")>;
1066*0b57cec5SDimitry Andricdef : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CX(F|G)TR(A)?$")>;
1067*0b57cec5SDimitry Andricdef : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDL(F|G)TR$")>;
1068*0b57cec5SDimitry Andricdef : InstRW<[WLat30, FXb, VecDF4, GroupAlone2], (instregex "CXL(F|G)TR$")>;
1069*0b57cec5SDimitry Andric
1070*0b57cec5SDimitry Andric// Convert to fixed / logical
1071*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked],
1072*0b57cec5SDimitry Andric             (instregex "C(F|G)DTR(A)?$")>;
1073*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked],
1074*0b57cec5SDimitry Andric             (instregex "C(F|G)XTR(A)?$")>;
1075*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>;
1076*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>;
1077*0b57cec5SDimitry Andric
1078*0b57cec5SDimitry Andric// Convert from / to signed / unsigned packed
1079*0b57cec5SDimitry Andricdef : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>;
1080*0b57cec5SDimitry Andricdef : InstRW<[WLat12, FXb2, VecDF4, GroupAlone2], (instregex "CX(S|U)TR$")>;
1081*0b57cec5SDimitry Andricdef : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>;
1082*0b57cec5SDimitry Andricdef : InstRW<[WLat15, FXb2, VecDF4, GroupAlone2], (instregex "C(S|U)XTR$")>;
1083*0b57cec5SDimitry Andric
1084*0b57cec5SDimitry Andric// Convert from / to zoned
1085*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>;
1086*0b57cec5SDimitry Andricdef : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXZT$")>;
1087*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>;
1088*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>;
1089*0b57cec5SDimitry Andric
1090*0b57cec5SDimitry Andric// Convert from / to packed
1091*0b57cec5SDimitry Andricdef : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>;
1092*0b57cec5SDimitry Andricdef : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone3], (instregex "CXPT$")>;
1093*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>;
1094*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>;
1095*0b57cec5SDimitry Andric
1096*0b57cec5SDimitry Andric// Perform floating-point operation
1097*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>;
1098*0b57cec5SDimitry Andric
1099*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1100*0b57cec5SDimitry Andric// DFP: Unary arithmetic
1101*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1102*0b57cec5SDimitry Andric
1103*0b57cec5SDimitry Andric// Load FP integer
1104*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>;
1105*0b57cec5SDimitry Andricdef : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>;
1106*0b57cec5SDimitry Andric
1107*0b57cec5SDimitry Andric// Extract biased exponent
1108*0b57cec5SDimitry Andricdef : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>;
1109*0b57cec5SDimitry Andricdef : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>;
1110*0b57cec5SDimitry Andric
1111*0b57cec5SDimitry Andric// Extract significance
1112*0b57cec5SDimitry Andricdef : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>;
1113*0b57cec5SDimitry Andricdef : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>;
1114*0b57cec5SDimitry Andric
1115*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1116*0b57cec5SDimitry Andric// DFP: Binary arithmetic
1117*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1118*0b57cec5SDimitry Andric
1119*0b57cec5SDimitry Andric// Addition
1120*0b57cec5SDimitry Andricdef : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>;
1121*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>;
1122*0b57cec5SDimitry Andric
1123*0b57cec5SDimitry Andric// Subtraction
1124*0b57cec5SDimitry Andricdef : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>;
1125*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>;
1126*0b57cec5SDimitry Andric
1127*0b57cec5SDimitry Andric// Multiply
1128*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>;
1129*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>;
1130*0b57cec5SDimitry Andric
1131*0b57cec5SDimitry Andric// Division
1132*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>;
1133*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>;
1134*0b57cec5SDimitry Andric
1135*0b57cec5SDimitry Andric// Quantize
1136*0b57cec5SDimitry Andricdef : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>;
1137*0b57cec5SDimitry Andricdef : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>;
1138*0b57cec5SDimitry Andric
1139*0b57cec5SDimitry Andric// Reround
1140*0b57cec5SDimitry Andricdef : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>;
1141*0b57cec5SDimitry Andricdef : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone2], (instregex "RRXTR$")>;
1142*0b57cec5SDimitry Andric
1143*0b57cec5SDimitry Andric// Shift significand left/right
1144*0b57cec5SDimitry Andricdef : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>;
1145*0b57cec5SDimitry Andricdef : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
1146*0b57cec5SDimitry Andric
1147*0b57cec5SDimitry Andric// Insert biased exponent
1148*0b57cec5SDimitry Andricdef : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>;
1149*0b57cec5SDimitry Andricdef : InstRW<[WLat11, FXb, VecDF4, GroupAlone2], (instregex "IEXTR$")>;
1150*0b57cec5SDimitry Andric
1151*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1152*0b57cec5SDimitry Andric// DFP: Comparisons
1153*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1154*0b57cec5SDimitry Andric
1155*0b57cec5SDimitry Andric// Compare
1156*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>;
1157*0b57cec5SDimitry Andricdef : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>;
1158*0b57cec5SDimitry Andric
1159*0b57cec5SDimitry Andric// Compare biased exponent
1160*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>;
1161*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>;
1162*0b57cec5SDimitry Andric
1163*0b57cec5SDimitry Andric// Test Data Class/Group
1164*0b57cec5SDimitry Andricdef : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>;
1165*0b57cec5SDimitry Andricdef : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
1166*0b57cec5SDimitry Andric
1167*0b57cec5SDimitry Andric
1168*0b57cec5SDimitry Andric// --------------------------------- Vector --------------------------------- //
1169*0b57cec5SDimitry Andric
1170*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1171*0b57cec5SDimitry Andric// Vector: Move instructions
1172*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1173*0b57cec5SDimitry Andric
1174*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
1175*0b57cec5SDimitry Andricdef : InstRW<[WLat4, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
1176*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
1177*0b57cec5SDimitry Andricdef : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
1178*0b57cec5SDimitry Andric
1179*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1180*0b57cec5SDimitry Andric// Vector: Immediate instructions
1181*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1182*0b57cec5SDimitry Andric
1183*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
1184*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;
1185*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>;
1186*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>;
1187*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>;
1188*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>;
1189*0b57cec5SDimitry Andric
1190*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1191*0b57cec5SDimitry Andric// Vector: Loads
1192*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1193*0b57cec5SDimitry Andric
1194*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(Align)?$")>;
1195*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(L|BB)$")>;
1196*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>;
1197*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H)?$")>;
1198*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>;
1199*0b57cec5SDimitry Andricdef : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
1200*0b57cec5SDimitry Andric             (instregex "VLE(B|F|G|H)$")>;
1201*0b57cec5SDimitry Andricdef : InstRW<[WLat6LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked],
1202*0b57cec5SDimitry Andric             (instregex "VGE(F|G)$")>;
1203*0b57cec5SDimitry Andricdef : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone],
1204*0b57cec5SDimitry Andric             (instregex "VLM(Align)?$")>;
1205*0b57cec5SDimitry Andric
1206*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1207*0b57cec5SDimitry Andric// Vector: Stores
1208*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1209*0b57cec5SDimitry Andric
1210*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(Align|L|32|64)?$")>;
1211*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>;
1212*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>;
1213*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU2, FXb3, GroupAlone2], (instregex "VSTM(Align)?$")>;
1214*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>;
1215*0b57cec5SDimitry Andric
1216*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1217*0b57cec5SDimitry Andric// Vector: Selects and permutes
1218*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1219*0b57cec5SDimitry Andric
1220*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>;
1221*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>;
1222*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>;
1223*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>;
1224*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>;
1225*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>;
1226*0b57cec5SDimitry Andric
1227*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1228*0b57cec5SDimitry Andric// Vector: Widening and narrowing
1229*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1230*0b57cec5SDimitry Andric
1231*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>;
1232*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>;
1233*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>;
1234*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>;
1235*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>;
1236*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>;
1237*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>;
1238*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>;
1239*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>;
1240*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>;
1241*0b57cec5SDimitry Andric
1242*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1243*0b57cec5SDimitry Andric// Vector: Integer arithmetic
1244*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1245*0b57cec5SDimitry Andric
1246*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>;
1247*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>;
1248*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>;
1249*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>;
1250*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O)?$")>;
1251*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO$")>;
1252*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>;
1253*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>;
1254*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>;
1255*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>;
1256*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>;
1257*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>;
1258*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>;
1259*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>;
1260*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>;
1261*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>;
1262*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>;
1263*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>;
1264*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>;
1265*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>;
1266*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>;
1267*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>;
1268*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>;
1269*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>;
1270*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>;
1271*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>;
1272*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>;
1273*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>;
1274*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>;
1275*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>;
1276*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>;
1277*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>;
1278*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>;
1279*0b57cec5SDimitry Andric
1280*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT$")>;
1281*0b57cec5SDimitry Andric
1282*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>;
1283*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>;
1284*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>;
1285*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>;
1286*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>;
1287*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>;
1288*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>;
1289*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>;
1290*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>;
1291*0b57cec5SDimitry Andric
1292*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>;
1293*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSLB$")>;
1294*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
1295*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSR(A|L)B$")>;
1296*0b57cec5SDimitry Andric
1297*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>;
1298*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>;
1299*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>;
1300*0b57cec5SDimitry Andric
1301*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>;
1302*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>;
1303*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>;
1304*0b57cec5SDimitry Andric
1305*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1306*0b57cec5SDimitry Andric// Vector: Integer comparison
1307*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1308*0b57cec5SDimitry Andric
1309*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>;
1310*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>;
1311*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1312*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
1313*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>;
1314*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>;
1315*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>;
1316*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>;
1317*0b57cec5SDimitry Andricdef : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
1318*0b57cec5SDimitry Andric
1319*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1320*0b57cec5SDimitry Andric// Vector: Floating-point arithmetic
1321*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1322*0b57cec5SDimitry Andric
1323*0b57cec5SDimitry Andric// Conversion and rounding
1324*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?G$")>;
1325*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?GB$")>;
1326*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "WCD(L)?GB$")>;
1327*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GD$")>;
1328*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GDB$")>;
1329*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "WC(L)?GDB$")>;
1330*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)$")>;
1331*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)B$")>;
1332*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>;
1333*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFI$")>;
1334*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFIDB$")>;
1335*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFIDB$")>;
1336*0b57cec5SDimitry Andric
1337*0b57cec5SDimitry Andric// Sign operations
1338*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>;
1339*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>;
1340*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>;
1341*0b57cec5SDimitry Andric
1342*0b57cec5SDimitry Andric// Test data class
1343*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>;
1344*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>;
1345*0b57cec5SDimitry Andric
1346*0b57cec5SDimitry Andric// Add / subtract
1347*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)$")>;
1348*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)DB$")>;
1349*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)DB$")>;
1350*0b57cec5SDimitry Andric
1351*0b57cec5SDimitry Andric// Multiply / multiply-and-add/subtract
1352*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM$")>;
1353*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMDB$")>;
1354*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFMDB$")>;
1355*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)$")>;
1356*0b57cec5SDimitry Andricdef : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)DB$")>;
1357*0b57cec5SDimitry Andricdef : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(A|S)DB$")>;
1358*0b57cec5SDimitry Andric
1359*0b57cec5SDimitry Andric// Divide / square root
1360*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>;
1361*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>;
1362*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>;
1363*0b57cec5SDimitry Andricdef : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>;
1364*0b57cec5SDimitry Andric
1365*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1366*0b57cec5SDimitry Andric// Vector: Floating-point comparison
1367*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1368*0b57cec5SDimitry Andric
1369*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)$")>;
1370*0b57cec5SDimitry Andricdef : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DB$")>;
1371*0b57cec5SDimitry Andricdef : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>;
1372*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>;
1373*0b57cec5SDimitry Andricdef : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DBS$")>;
1374*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>;
1375*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>;
1376*0b57cec5SDimitry Andric
1377*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1378*0b57cec5SDimitry Andric// Vector: Floating-point insertion and extraction
1379*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1380*0b57cec5SDimitry Andric
1381*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>;
1382*0b57cec5SDimitry Andricdef : InstRW<[WLat4, FXb, NormalGr], (instregex "LFER$")>;
1383*0b57cec5SDimitry Andric
1384*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1385*0b57cec5SDimitry Andric// Vector: String instructions
1386*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1387*0b57cec5SDimitry Andric
1388*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>;
1389*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>;
1390*0b57cec5SDimitry Andricdef : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>;
1391*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>;
1392*0b57cec5SDimitry Andricdef : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>;
1393*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>;
1394*0b57cec5SDimitry Andricdef : InstRW<[WLat4, WLat4, VecStr, NormalGr],
1395*0b57cec5SDimitry Andric             (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>;
1396*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>;
1397*0b57cec5SDimitry Andricdef : InstRW<[WLat4, WLat4, VecStr, NormalGr],
1398*0b57cec5SDimitry Andric             (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>;
1399*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>;
1400*0b57cec5SDimitry Andricdef : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>;
1401*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>;
1402*0b57cec5SDimitry Andricdef : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>;
1403*0b57cec5SDimitry Andricdef : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>;
1404*0b57cec5SDimitry Andricdef : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>;
1405*0b57cec5SDimitry Andric
1406*0b57cec5SDimitry Andric
1407*0b57cec5SDimitry Andric// -------------------------------- System ---------------------------------- //
1408*0b57cec5SDimitry Andric
1409*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1410*0b57cec5SDimitry Andric// System: Program-Status Word Instructions
1411*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1412*0b57cec5SDimitry Andric
1413*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>;
1414*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "LPSW(E)?$")>;
1415*0b57cec5SDimitry Andricdef : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>;
1416*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>;
1417*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>;
1418*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;
1419*0b57cec5SDimitry Andricdef : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>;
1420*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>;
1421*0b57cec5SDimitry Andric
1422*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1423*0b57cec5SDimitry Andric// System: Control Register Instructions
1424*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1425*0b57cec5SDimitry Andric
1426*0b57cec5SDimitry Andricdef : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>;
1427*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU5, FXb, GroupAlone2], (instregex "STCT(L|G)$")>;
1428*0b57cec5SDimitry Andricdef : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>;
1429*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>;
1430*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "ESEA$")>;
1431*0b57cec5SDimitry Andric
1432*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1433*0b57cec5SDimitry Andric// System: Prefix-Register Instructions
1434*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1435*0b57cec5SDimitry Andric
1436*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>;
1437*0b57cec5SDimitry Andric
1438*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1439*0b57cec5SDimitry Andric// System: Storage-Key and Real Memory Instructions
1440*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1441*0b57cec5SDimitry Andric
1442*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "ISKE$")>;
1443*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "IVSK$")>;
1444*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>;
1445*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>;
1446*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PFMF$")>;
1447*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>;
1448*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PGIN$")>;
1449*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PGOUT$")>;
1450*0b57cec5SDimitry Andric
1451*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1452*0b57cec5SDimitry Andric// System: Dynamic-Address-Translation Instructions
1453*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1454*0b57cec5SDimitry Andric
1455*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>;
1456*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>;
1457*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>;
1458*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PTLB$")>;
1459*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>;
1460*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>;
1461*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>;
1462*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "STRAG$")>;
1463*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>;
1464*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>;
1465*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "TPROT$")>;
1466*0b57cec5SDimitry Andric
1467*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1468*0b57cec5SDimitry Andric// System: Memory-move Instructions
1469*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1470*0b57cec5SDimitry Andric
1471*0b57cec5SDimitry Andricdef : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone2], (instregex "MVC(K|P|S)$")>;
1472*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXa, LSU5, GroupAlone2], (instregex "MVC(S|D)K$")>;
1473*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "MVCOS$")>;
1474*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "MVPG$")>;
1475*0b57cec5SDimitry Andric
1476*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1477*0b57cec5SDimitry Andric// System: Address-Space Instructions
1478*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1479*0b57cec5SDimitry Andric
1480*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "LASP$")>;
1481*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>;
1482*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PC$")>;
1483*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PR$")>;
1484*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>;
1485*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "RP$")>;
1486*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>;
1487*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "TAR$")>;
1488*0b57cec5SDimitry Andric
1489*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1490*0b57cec5SDimitry Andric// System: Linkage-Stack Instructions
1491*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1492*0b57cec5SDimitry Andric
1493*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "BAKR$")>;
1494*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>;
1495*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>;
1496*0b57cec5SDimitry Andric
1497*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1498*0b57cec5SDimitry Andric// System: Time-Related Instructions
1499*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1500*0b57cec5SDimitry Andric
1501*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PTFF$")>;
1502*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>;
1503*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>;
1504*0b57cec5SDimitry Andricdef : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone2], (instregex "STCK(F)?$")>;
1505*0b57cec5SDimitry Andricdef : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone3], (instregex "STCKE$")>;
1506*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "STCKC$")>;
1507*0b57cec5SDimitry Andricdef : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>;
1508*0b57cec5SDimitry Andric
1509*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1510*0b57cec5SDimitry Andric// System: CPU-Related Instructions
1511*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1512*0b57cec5SDimitry Andric
1513*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "STAP$")>;
1514*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "STIDP$")>;
1515*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>;
1516*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>;
1517*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "ECAG$")>;
1518*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>;
1519*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PTF$")>;
1520*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "PCKMO$")>;
1521*0b57cec5SDimitry Andric
1522*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1523*0b57cec5SDimitry Andric// System: Miscellaneous Instructions
1524*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1525*0b57cec5SDimitry Andric
1526*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SVC$")>;
1527*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>;
1528*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "DIAG$")>;
1529*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>;
1530*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>;
1531*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>;
1532*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SIE$")>;
1533*0b57cec5SDimitry Andric
1534*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1535*0b57cec5SDimitry Andric// System: CPU-Measurement Facility Instructions
1536*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1537*0b57cec5SDimitry Andric
1538*0b57cec5SDimitry Andricdef : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>;
1539*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>;
1540*0b57cec5SDimitry Andricdef : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>;
1541*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "LCCTL$")>;
1542*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>;
1543*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>;
1544*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>;
1545*0b57cec5SDimitry Andric
1546*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1547*0b57cec5SDimitry Andric// System: I/O Instructions
1548*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===//
1549*0b57cec5SDimitry Andric
1550*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>;
1551*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
1552*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
1553*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
1554*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
1555*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "TPI$")>;
1556*0b57cec5SDimitry Andricdef : InstRW<[WLat30, MCD], (instregex "SAL$")>;
1557*0b57cec5SDimitry Andric
1558*0b57cec5SDimitry Andric}
1559*0b57cec5SDimitry Andric
1560