1 //===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H 10 #define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H 11 12 #include "SystemZ.h" 13 #include "llvm/CodeGen/TargetRegisterInfo.h" 14 15 #define GET_REGINFO_HEADER 16 #include "SystemZGenRegisterInfo.inc" 17 18 namespace llvm { 19 20 class LiveIntervals; 21 22 namespace SystemZ { 23 // Return the subreg to use for referring to the even and odd registers 24 // in a GR128 pair. Is32Bit says whether we want a GR32 or GR64. 25 inline unsigned even128(bool Is32bit) { 26 return Is32bit ? subreg_hl32 : subreg_h64; 27 } 28 inline unsigned odd128(bool Is32bit) { 29 return Is32bit ? subreg_l32 : subreg_l64; 30 } 31 } // end namespace SystemZ 32 33 struct SystemZRegisterInfo : public SystemZGenRegisterInfo { 34 public: 35 SystemZRegisterInfo(); 36 37 /// getPointerRegClass - Return the register class to use to hold pointers. 38 /// This is currently only used by LOAD_STACK_GUARD, which requires a non-%r0 39 /// register, hence ADDR64. 40 const TargetRegisterClass * 41 getPointerRegClass(const MachineFunction &MF, 42 unsigned Kind=0) const override { 43 return &SystemZ::ADDR64BitRegClass; 44 } 45 46 /// getCrossCopyRegClass - Returns a legal register class to copy a register 47 /// in the specified class to or from. Returns NULL if it is possible to copy 48 /// between a two registers of the specified class. 49 const TargetRegisterClass * 50 getCrossCopyRegClass(const TargetRegisterClass *RC) const override; 51 52 bool getRegAllocationHints(unsigned VirtReg, 53 ArrayRef<MCPhysReg> Order, 54 SmallVectorImpl<MCPhysReg> &Hints, 55 const MachineFunction &MF, 56 const VirtRegMap *VRM, 57 const LiveRegMatrix *Matrix) const override; 58 59 // Override TargetRegisterInfo.h. 60 bool requiresRegisterScavenging(const MachineFunction &MF) const override { 61 return true; 62 } 63 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override { 64 return true; 65 } 66 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override { 67 return true; 68 } 69 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; 70 const uint32_t *getCallPreservedMask(const MachineFunction &MF, 71 CallingConv::ID CC) const override; 72 BitVector getReservedRegs(const MachineFunction &MF) const override; 73 void eliminateFrameIndex(MachineBasicBlock::iterator MI, 74 int SPAdj, unsigned FIOperandNum, 75 RegScavenger *RS) const override; 76 77 /// SrcRC and DstRC will be morphed into NewRC if this returns true. 78 bool shouldCoalesce(MachineInstr *MI, 79 const TargetRegisterClass *SrcRC, 80 unsigned SubReg, 81 const TargetRegisterClass *DstRC, 82 unsigned DstSubReg, 83 const TargetRegisterClass *NewRC, 84 LiveIntervals &LIS) const override; 85 86 Register getFrameRegister(const MachineFunction &MF) const override; 87 }; 88 89 } // end namespace llvm 90 91 #endif 92