1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZProbedAlloca : SDTypeProfile<1, 2, 44 [SDTCisSameAs<0, 1>, 45 SDTCisSameAs<0, 2>, 46 SDTCisPtrTy<0>]>; 47def SDT_ZGR128Binary : SDTypeProfile<1, 2, 48 [SDTCisVT<0, untyped>, 49 SDTCisInt<1>, 50 SDTCisInt<2>]>; 51def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 52 [SDTCisInt<0>, 53 SDTCisVT<1, i32>, 54 SDTCisSameAs<0, 2>, 55 SDTCisSameAs<0, 3>]>; 56def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 57 [SDTCisInt<0>, 58 SDTCisVT<1, i32>, 59 SDTCisSameAs<0, 2>, 60 SDTCisSameAs<0, 3>, 61 SDTCisVT<1, i32>]>; 62def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 63 [SDTCisVT<0, i32>, 64 SDTCisPtrTy<1>, 65 SDTCisVT<2, i32>, 66 SDTCisVT<3, i32>, 67 SDTCisVT<4, i32>, 68 SDTCisVT<5, i32>]>; 69def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 70 [SDTCisVT<0, i32>, 71 SDTCisVT<1, i32>, 72 SDTCisPtrTy<2>, 73 SDTCisVT<3, i32>, 74 SDTCisVT<4, i32>, 75 SDTCisVT<5, i32>, 76 SDTCisVT<6, i32>, 77 SDTCisVT<7, i32>]>; 78def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 79 [SDTCisInt<0>, 80 SDTCisVT<1, i32>, 81 SDTCisPtrTy<2>, 82 SDTCisSameAs<0, 3>, 83 SDTCisSameAs<0, 4>]>; 84def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 85 [SDTCisVT<0, untyped>, 86 SDTCisPtrTy<1>]>; 87def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 88 [SDTCisVT<0, untyped>, 89 SDTCisPtrTy<1>]>; 90def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 91 [SDTCisVT<0, untyped>, 92 SDTCisVT<1, i32>, 93 SDTCisPtrTy<2>, 94 SDTCisVT<3, untyped>, 95 SDTCisVT<4, untyped>]>; 96def SDT_ZMemMemLength : SDTypeProfile<0, 3, 97 [SDTCisPtrTy<0>, 98 SDTCisPtrTy<1>, 99 SDTCisVT<2, i64>]>; 100def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 101 [SDTCisVT<0, i32>, 102 SDTCisPtrTy<1>, 103 SDTCisPtrTy<2>, 104 SDTCisVT<3, i64>]>; 105def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 106 [SDTCisPtrTy<0>, 107 SDTCisPtrTy<1>, 108 SDTCisVT<2, i64>, 109 SDTCisVT<3, i64>]>; 110def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4, 111 [SDTCisVT<0, i32>, 112 SDTCisPtrTy<1>, 113 SDTCisPtrTy<2>, 114 SDTCisVT<3, i64>, 115 SDTCisVT<4, i64>]>; 116def SDT_ZString : SDTypeProfile<1, 3, 117 [SDTCisPtrTy<0>, 118 SDTCisPtrTy<1>, 119 SDTCisPtrTy<2>, 120 SDTCisVT<3, i32>]>; 121def SDT_ZStringCC : SDTypeProfile<2, 3, 122 [SDTCisPtrTy<0>, 123 SDTCisVT<1, i32>, 124 SDTCisPtrTy<2>, 125 SDTCisPtrTy<3>, 126 SDTCisVT<4, i32>]>; 127def SDT_ZIPM : SDTypeProfile<1, 1, 128 [SDTCisVT<0, i32>, 129 SDTCisVT<1, i32>]>; 130def SDT_ZPrefetch : SDTypeProfile<0, 2, 131 [SDTCisVT<0, i32>, 132 SDTCisPtrTy<1>]>; 133def SDT_ZTBegin : SDTypeProfile<1, 2, 134 [SDTCisVT<0, i32>, 135 SDTCisPtrTy<1>, 136 SDTCisVT<2, i32>]>; 137def SDT_ZTEnd : SDTypeProfile<1, 0, 138 [SDTCisVT<0, i32>]>; 139def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 140 [SDTCisVec<0>, 141 SDTCisSameAs<0, 1>, 142 SDTCisVT<3, i32>]>; 143def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 144 [SDTCisVec<1>, 145 SDTCisVT<2, i32>]>; 146def SDT_ZReplicate : SDTypeProfile<1, 1, 147 [SDTCisVec<0>]>; 148def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 149 [SDTCisVec<0>, 150 SDTCisVec<1>]>; 151def SDT_ZVecUnary : SDTypeProfile<1, 1, 152 [SDTCisVec<0>, 153 SDTCisSameAs<0, 1>]>; 154def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 155 [SDTCisVec<0>, 156 SDTCisVT<1, i32>, 157 SDTCisSameAs<0, 2>]>; 158def SDT_ZVecBinary : SDTypeProfile<1, 2, 159 [SDTCisVec<0>, 160 SDTCisSameAs<0, 1>, 161 SDTCisSameAs<0, 2>]>; 162def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 163 [SDTCisVec<0>, 164 SDTCisVT<1, i32>, 165 SDTCisSameAs<0, 2>, 166 SDTCisSameAs<0, 2>]>; 167def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 168 [SDTCisVec<0>, 169 SDTCisSameAs<0, 1>, 170 SDTCisVT<2, i32>]>; 171def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 172 [SDTCisVec<0>, 173 SDTCisVec<1>, 174 SDTCisSameAs<1, 2>]>; 175def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 176 [SDTCisVec<0>, 177 SDTCisVT<1, i32>, 178 SDTCisVec<2>, 179 SDTCisSameAs<2, 3>]>; 180def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 181 [SDTCisVec<0>, 182 SDTCisVT<1, i32>, 183 SDTCisVec<2>, 184 SDTCisVT<3, i32>]>; 185def SDT_ZRotateMask : SDTypeProfile<1, 2, 186 [SDTCisVec<0>, 187 SDTCisVT<1, i32>, 188 SDTCisVT<2, i32>]>; 189def SDT_ZJoinDwords : SDTypeProfile<1, 2, 190 [SDTCisVT<0, v2i64>, 191 SDTCisVT<1, i64>, 192 SDTCisVT<2, i64>]>; 193def SDT_ZVecTernary : SDTypeProfile<1, 3, 194 [SDTCisVec<0>, 195 SDTCisSameAs<0, 1>, 196 SDTCisSameAs<0, 2>, 197 SDTCisSameAs<0, 3>]>; 198def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3, 199 [SDTCisVec<0>, 200 SDTCisVT<1, i32>, 201 SDTCisVec<2>, 202 SDTCisSameAs<2, 3>, 203 SDTCisSameAs<0, 4>]>; 204def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 205 [SDTCisVec<0>, 206 SDTCisSameAs<0, 1>, 207 SDTCisSameAs<0, 2>, 208 SDTCisVT<3, i32>]>; 209def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 210 [SDTCisVec<0>, 211 SDTCisVT<1, i32>, 212 SDTCisSameAs<0, 2>, 213 SDTCisSameAs<0, 3>, 214 SDTCisVT<4, i32>]>; 215def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 216 [SDTCisVec<0>, 217 SDTCisSameAs<0, 1>, 218 SDTCisSameAs<0, 2>, 219 SDTCisSameAs<0, 3>, 220 SDTCisVT<4, i32>]>; 221def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 222 [SDTCisVec<0>, 223 SDTCisVT<1, i32>, 224 SDTCisSameAs<0, 2>, 225 SDTCisSameAs<0, 3>, 226 SDTCisSameAs<0, 4>, 227 SDTCisVT<5, i32>]>; 228def SDT_ZTest : SDTypeProfile<1, 2, 229 [SDTCisVT<0, i32>, 230 SDTCisVT<2, i64>]>; 231 232//===----------------------------------------------------------------------===// 233// Node definitions 234//===----------------------------------------------------------------------===// 235 236// These are target-independent nodes, but have target-specific formats. 237def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 238 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 239def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 240 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 241 SDNPOutGlue]>; 242def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 243 244// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 245def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 246 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 247def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 248 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 249 SDNPVariadic]>; 250def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 251 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 252 SDNPVariadic]>; 253def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 254 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 255 SDNPVariadic]>; 256def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 257 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 258 SDNPVariadic]>; 259def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 260def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 261 SDT_ZWrapOffset, []>; 262def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 263def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 264def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 265def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp, 266 [SDNPHasChain]>; 267def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp, 268 [SDNPHasChain]>; 269def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 270def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 271 [SDNPHasChain]>; 272def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 273 SDT_ZSelectCCMask>; 274def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 275def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 276def z_probed_alloca : SDNode<"SystemZISD::PROBED_ALLOCA", SDT_ZProbedAlloca, 277 [SDNPHasChain]>; 278def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 279def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 280def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 281def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 282def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 283def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 284def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 285def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 286def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 287def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 288def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 289 290def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 291 [SDNPHasChain, SDNPSideEffect]>; 292 293def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 294 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 295def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 296 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 297def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad, 298 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 299def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore, 300 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 301 302def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 303 304// Defined because the index is an i32 rather than a pointer. 305def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 306 SDT_ZInsertVectorElt>; 307def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 308 SDT_ZExtractVectorElt>; 309def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 310def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 311def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 312def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 313def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 314def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 315def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 316def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 317def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 318 SDT_ZVecTernaryInt>; 319def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 320def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 321def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 322def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 323def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 324def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 325def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 326def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 327def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 328 SDT_ZVecBinaryInt>; 329def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 330 SDT_ZVecBinaryInt>; 331def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 332 SDT_ZVecBinaryInt>; 333def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 334def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 335def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 336def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 337def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 338def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 339def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 340def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 341def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE", 342 SDT_ZVecBinaryConv, [SDNPHasChain]>; 343def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES", 344 SDT_ZVecBinaryConv, [SDNPHasChain]>; 345def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 346def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH", 347 SDT_ZVecBinaryConv, [SDNPHasChain]>; 348def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS", 349 SDT_ZVecBinaryConv, [SDNPHasChain]>; 350def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 351def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE", 352 SDT_ZVecBinaryConv, [SDNPHasChain]>; 353def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES", 354 SDT_ZVecBinaryConv, [SDNPHasChain]>; 355def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 356def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 357def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 358def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 359def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND", 360 SDT_ZVecUnaryConv, [SDNPHasChain]>; 361def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 362def z_strict_vround : SDNode<"SystemZISD::STRICT_VROUND", 363 SDT_ZVecUnaryConv, [SDNPHasChain]>; 364def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 365def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 366def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 367def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 368def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 369def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 370def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 371def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 372def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 373 SDT_ZVecQuaternaryIntCC>; 374def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 375 SDT_ZVecQuaternaryIntCC>; 376def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC", 377 SDT_ZVecTernaryConvCC>; 378def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC", 379 SDT_ZVecTernaryConvCC>; 380def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 381 382class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 383 : SDNode<"SystemZISD::"#name, profile, 384 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 385 386def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 387def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 388def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 389def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 390def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 391def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 392def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 393def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 394def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 395def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 396def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 397 398def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 399 SDT_ZAtomicCmpSwap, 400 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 401 SDNPMemOperand]>; 402def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 403 SDT_ZAtomicCmpSwapW, 404 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 405 SDNPMemOperand]>; 406 407def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 408 SDT_ZAtomicLoad128, 409 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 410def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 411 SDT_ZAtomicStore128, 412 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 413def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 414 SDT_ZAtomicCmpSwap128, 415 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 416 SDNPMemOperand]>; 417 418def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 419 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 420def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 421 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 422def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 423 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 424def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 425 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 426def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 427 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 428def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 429 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 430def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 431 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 432def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 433 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 434def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 435 [SDNPHasChain, SDNPMayLoad]>; 436def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC, 437 [SDNPHasChain, SDNPMayLoad]>; 438def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 439 [SDNPHasChain, SDNPMayLoad]>; 440def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 441 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 442def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 443 [SDNPHasChain, SDNPMayLoad]>; 444def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 445 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 446 SDNPMemOperand]>; 447 448def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 449 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 450def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 451 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 452def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 453 [SDNPHasChain, SDNPSideEffect]>; 454 455def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 456def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 457def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 458 459//===----------------------------------------------------------------------===// 460// Pattern fragments 461//===----------------------------------------------------------------------===// 462 463def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 464 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 465}]>; 466def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 467 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 468}]>; 469def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 470 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 471}]>; 472 473def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 474 (z_storebswap node:$src, node:$addr), [{ 475 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 476}]>; 477def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 478 (z_storebswap node:$src, node:$addr), [{ 479 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 480}]>; 481def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 482 (z_storebswap node:$src, node:$addr), [{ 483 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 484}]>; 485 486// Fragments including CC as an implicit source. 487def z_br_ccmask 488 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 489 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 490def z_select_ccmask 491 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 492 (z_select_ccmask_1 node:$true, node:$false, 493 node:$valid, node:$mask, CC)>; 494def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 495def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 496 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 497def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 498 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 499 500// Signed and unsigned comparisons. 501def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 502 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 503 return Type != SystemZICMP::UnsignedOnly; 504}]>; 505def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 506 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 507 return Type != SystemZICMP::SignedOnly; 508}]>; 509 510// Register- and memory-based TEST UNDER MASK. 511def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>; 512def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 513 514// Register sign-extend operations. Sub-32-bit values are represented as i32s. 515def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 516def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 517def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 518 519// Match extensions of an i32 to an i64, followed by an in-register sign 520// extension from a sub-i32 value. 521def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 522def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 523 524// Register zero-extend operations. Sub-32-bit values are represented as i32s. 525def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 526def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 527def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 528 529// Extending loads in which the extension type can be signed. 530def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 531 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 532 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 533}]>; 534def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 535 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 536}]>; 537def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 538 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 539}]>; 540def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 541 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 542}]>; 543 544// Extending loads in which the extension type can be unsigned. 545def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 546 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 547 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 548}]>; 549def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 550 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 551}]>; 552def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 553 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 554}]>; 555def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 556 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 557}]>; 558 559// Extending loads in which the extension type doesn't matter. 560def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 561 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 562}]>; 563def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 564 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 565}]>; 566def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 567 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 568}]>; 569def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 570 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 571}]>; 572 573// Aligned loads. 574class AlignedLoad<SDPatternOperator load> 575 : PatFrag<(ops node:$addr), (load node:$addr), [{ 576 auto *Load = cast<LoadSDNode>(N); 577 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 578}]>; 579def aligned_load : AlignedLoad<load>; 580def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 581def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 582def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 583def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 584 585// Aligned stores. 586class AlignedStore<SDPatternOperator store> 587 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 588 auto *Store = cast<StoreSDNode>(N); 589 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 590}]>; 591def aligned_store : AlignedStore<store>; 592def aligned_truncstorei16 : AlignedStore<truncstorei16>; 593def aligned_truncstorei32 : AlignedStore<truncstorei32>; 594 595// Non-volatile loads. Used for instructions that might access the storage 596// location multiple times. 597class NonvolatileLoad<SDPatternOperator load> 598 : PatFrag<(ops node:$addr), (load node:$addr), [{ 599 auto *Load = cast<LoadSDNode>(N); 600 return !Load->isVolatile(); 601}]>; 602def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 603def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 604def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 605 606// Non-volatile stores. 607class NonvolatileStore<SDPatternOperator store> 608 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 609 auto *Store = cast<StoreSDNode>(N); 610 return !Store->isVolatile(); 611}]>; 612def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 613def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 614def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 615 616// A store of a load that can be implemented using MVC. 617def mvc_store : PatFrag<(ops node:$value, node:$addr), 618 (unindexedstore node:$value, node:$addr), 619 [{ return storeLoadCanUseMVC(N); }]>; 620 621// Binary read-modify-write operations on memory in which the other 622// operand is also memory and for which block operations like NC can 623// be used. There are two patterns for each operator, depending on 624// which operand contains the "other" load. 625multiclass block_op<SDPatternOperator operator> { 626 def "1" : PatFrag<(ops node:$value, node:$addr), 627 (unindexedstore (operator node:$value, 628 (unindexedload node:$addr)), 629 node:$addr), 630 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 631 def "2" : PatFrag<(ops node:$value, node:$addr), 632 (unindexedstore (operator (unindexedload node:$addr), 633 node:$value), 634 node:$addr), 635 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 636} 637defm block_and : block_op<and>; 638defm block_or : block_op<or>; 639defm block_xor : block_op<xor>; 640 641// Insertions. 642def inserti8 : PatFrag<(ops node:$src1, node:$src2), 643 (or (and node:$src1, -256), node:$src2)>; 644def insertll : PatFrag<(ops node:$src1, node:$src2), 645 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 646def insertlh : PatFrag<(ops node:$src1, node:$src2), 647 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 648def inserthl : PatFrag<(ops node:$src1, node:$src2), 649 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 650def inserthh : PatFrag<(ops node:$src1, node:$src2), 651 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 652def insertlf : PatFrag<(ops node:$src1, node:$src2), 653 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 654def inserthf : PatFrag<(ops node:$src1, node:$src2), 655 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 656 657// ORs that can be treated as insertions. 658def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 659 (or node:$src1, node:$src2), [{ 660 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 661 return CurDAG->MaskedValueIsZero(N->getOperand(0), 662 APInt::getLowBitsSet(BitWidth, 8)); 663}]>; 664 665// ORs that can be treated as reversed insertions. 666def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 667 (or node:$src1, node:$src2), [{ 668 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 669 return CurDAG->MaskedValueIsZero(N->getOperand(1), 670 APInt::getLowBitsSet(BitWidth, 8)); 671}]>; 672 673// Negative integer absolute. 674def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 675 676// Integer absolute, matching the canonical form generated by DAGCombiner. 677def z_iabs32 : PatFrag<(ops node:$src), 678 (xor (add node:$src, (sra node:$src, (i32 31))), 679 (sra node:$src, (i32 31)))>; 680def z_iabs64 : PatFrag<(ops node:$src), 681 (xor (add node:$src, (sra node:$src, (i32 63))), 682 (sra node:$src, (i32 63)))>; 683def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 684def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 685 686// Integer multiply-and-add 687def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 688 (add (mul node:$src1, node:$src2), node:$src3)>; 689 690// Alternatives to match operations with or without an overflow CC result. 691def z_sadd : PatFrags<(ops node:$src1, node:$src2), 692 [(z_saddo node:$src1, node:$src2), 693 (add node:$src1, node:$src2)]>; 694def z_uadd : PatFrags<(ops node:$src1, node:$src2), 695 [(z_uaddo node:$src1, node:$src2), 696 (add node:$src1, node:$src2)]>; 697def z_ssub : PatFrags<(ops node:$src1, node:$src2), 698 [(z_ssubo node:$src1, node:$src2), 699 (sub node:$src1, node:$src2)]>; 700def z_usub : PatFrags<(ops node:$src1, node:$src2), 701 [(z_usubo node:$src1, node:$src2), 702 (sub node:$src1, node:$src2)]>; 703 704// Combined logical operations. 705def andc : PatFrag<(ops node:$src1, node:$src2), 706 (and node:$src1, (not node:$src2))>; 707def orc : PatFrag<(ops node:$src1, node:$src2), 708 (or node:$src1, (not node:$src2))>; 709def nand : PatFrag<(ops node:$src1, node:$src2), 710 (not (and node:$src1, node:$src2))>; 711def nor : PatFrag<(ops node:$src1, node:$src2), 712 (not (or node:$src1, node:$src2))>; 713def nxor : PatFrag<(ops node:$src1, node:$src2), 714 (not (xor node:$src1, node:$src2))>; 715 716// Fused multiply-subtract, using the natural operand order. 717def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 718 (any_fma node:$src1, node:$src2, (fneg node:$src3))>; 719 720// Fused multiply-add and multiply-subtract, but with the order of the 721// operands matching SystemZ's MA and MS instructions. 722def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 723 (any_fma node:$src2, node:$src3, node:$src1)>; 724def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 725 (any_fma node:$src2, node:$src3, (fneg node:$src1))>; 726 727// Negative fused multiply-add and multiply-subtract. 728def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 729 (fneg (any_fma node:$src1, node:$src2, node:$src3))>; 730def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 731 (fneg (any_fms node:$src1, node:$src2, node:$src3))>; 732 733// Floating-point negative absolute. 734def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 735 736// Strict floating-point fragments. 737def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs), 738 [(z_strict_fcmp node:$lhs, node:$rhs), 739 (z_fcmp node:$lhs, node:$rhs)]>; 740def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs), 741 [(z_strict_vfcmpe node:$lhs, node:$rhs), 742 (z_vfcmpe node:$lhs, node:$rhs)]>; 743def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs), 744 [(z_strict_vfcmph node:$lhs, node:$rhs), 745 (z_vfcmph node:$lhs, node:$rhs)]>; 746def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs), 747 [(z_strict_vfcmphe node:$lhs, node:$rhs), 748 (z_vfcmphe node:$lhs, node:$rhs)]>; 749def z_any_vextend : PatFrags<(ops node:$src), 750 [(z_strict_vextend node:$src), 751 (z_vextend node:$src)]>; 752def z_any_vround : PatFrags<(ops node:$src), 753 [(z_strict_vround node:$src), 754 (z_vround node:$src)]>; 755 756// Create a unary operator that loads from memory and then performs 757// the given operation on it. 758class loadu<SDPatternOperator operator, SDPatternOperator load = load> 759 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 760 761// Create a store operator that performs the given unary operation 762// on the value before storing it. 763class storeu<SDPatternOperator operator, SDPatternOperator store = store> 764 : PatFrag<(ops node:$value, node:$addr), 765 (store (operator node:$value), node:$addr)>; 766 767// Create a store operator that performs the given inherent operation 768// and stores the resulting value. 769class storei<SDPatternOperator operator, SDPatternOperator store = store> 770 : PatFrag<(ops node:$addr), 771 (store (operator), node:$addr)>; 772 773// Create a shift operator that optionally ignores an AND of the 774// shift count with an immediate if the bottom 6 bits are all set. 775def imm32bottom6set : PatLeaf<(i32 imm), [{ 776 return (N->getZExtValue() & 0x3f) == 0x3f; 777}]>; 778class shiftop<SDPatternOperator operator> 779 : PatFrags<(ops node:$val, node:$count), 780 [(operator node:$val, node:$count), 781 (operator node:$val, (and node:$count, imm32bottom6set))]>; 782 783def imm32mod64 : PatLeaf<(i32 imm), [{ 784 return (N->getZExtValue() % 64 == 0); 785}]>; 786 787// Load a scalar and replicate it in all elements of a vector. 788class z_replicate_load<ValueType scalartype, SDPatternOperator load> 789 : PatFrag<(ops node:$addr), 790 (z_replicate (scalartype (load node:$addr)))>; 791def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 792def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 793def z_replicate_loadi32 : z_replicate_load<i32, load>; 794def z_replicate_loadi64 : z_replicate_load<i64, load>; 795def z_replicate_loadf32 : z_replicate_load<f32, load>; 796def z_replicate_loadf64 : z_replicate_load<f64, load>; 797// Byte-swapped replicated vector element loads. 798def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>; 799def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>; 800def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>; 801 802// Load a scalar and insert it into a single element of a vector. 803class z_vle<ValueType scalartype, SDPatternOperator load> 804 : PatFrag<(ops node:$vec, node:$addr, node:$index), 805 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 806 node:$index)>; 807def z_vlei8 : z_vle<i32, anyextloadi8>; 808def z_vlei16 : z_vle<i32, anyextloadi16>; 809def z_vlei32 : z_vle<i32, load>; 810def z_vlei64 : z_vle<i64, load>; 811def z_vlef32 : z_vle<f32, load>; 812def z_vlef64 : z_vle<f64, load>; 813// Byte-swapped vector element loads. 814def z_vlebri16 : z_vle<i32, z_loadbswap16>; 815def z_vlebri32 : z_vle<i32, z_loadbswap32>; 816def z_vlebri64 : z_vle<i64, z_loadbswap64>; 817 818// Load a scalar and insert it into the low element of the high i64 of a 819// zeroed vector. 820class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 821 : PatFrag<(ops node:$addr), 822 (z_vector_insert immAllZerosV, 823 (scalartype (load node:$addr)), (i32 index))>; 824def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 825def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 826def z_vllezi32 : z_vllez<i32, load, 1>; 827def z_vllezi64 : PatFrags<(ops node:$addr), 828 [(z_vector_insert immAllZerosV, 829 (i64 (load node:$addr)), (i32 0)), 830 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 831// We use high merges to form a v4f32 from four f32s. Propagating zero 832// into all elements but index 1 gives this expression. 833def z_vllezf32 : PatFrag<(ops node:$addr), 834 (z_merge_high 835 (v2i64 836 (z_unpackl_high 837 (v4i32 838 (bitconvert 839 (v4f32 (scalar_to_vector 840 (f32 (load node:$addr)))))))), 841 (v2i64 842 (bitconvert (v4f32 immAllZerosV))))>; 843def z_vllezf64 : PatFrag<(ops node:$addr), 844 (z_merge_high 845 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 846 immAllZerosV)>; 847 848// Similarly for the high element of a zeroed vector. 849def z_vllezli32 : z_vllez<i32, load, 0>; 850def z_vllezlf32 : PatFrag<(ops node:$addr), 851 (z_merge_high 852 (v2i64 853 (bitconvert 854 (z_merge_high 855 (v4f32 (scalar_to_vector 856 (f32 (load node:$addr)))), 857 (v4f32 immAllZerosV)))), 858 (v2i64 859 (bitconvert (v4f32 immAllZerosV))))>; 860 861// Byte-swapped variants. 862def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>; 863def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>; 864def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>; 865def z_vllebrzi64 : PatFrags<(ops node:$addr), 866 [(z_vector_insert immAllZerosV, 867 (i64 (z_loadbswap64 node:$addr)), 868 (i32 0)), 869 (z_join_dwords (i64 (z_loadbswap64 node:$addr)), 870 (i64 0))]>; 871 872 873// Store one element of a vector. 874class z_vste<ValueType scalartype, SDPatternOperator store> 875 : PatFrag<(ops node:$vec, node:$addr, node:$index), 876 (store (scalartype (z_vector_extract node:$vec, node:$index)), 877 node:$addr)>; 878def z_vstei8 : z_vste<i32, truncstorei8>; 879def z_vstei16 : z_vste<i32, truncstorei16>; 880def z_vstei32 : z_vste<i32, store>; 881def z_vstei64 : z_vste<i64, store>; 882def z_vstef32 : z_vste<f32, store>; 883def z_vstef64 : z_vste<f64, store>; 884// Byte-swapped vector element stores. 885def z_vstebri16 : z_vste<i32, z_storebswap16>; 886def z_vstebri32 : z_vste<i32, z_storebswap32>; 887def z_vstebri64 : z_vste<i64, z_storebswap64>; 888 889// Arithmetic negation on vectors. 890def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 891 892// Bitwise negation on vectors. 893def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 894 895// Signed "integer greater than zero" on vectors. 896def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 897 898// Signed "integer less than zero" on vectors. 899def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 900 901// Integer absolute on vectors. 902class z_viabs<int shift> 903 : PatFrag<(ops node:$src), 904 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 905 (z_vsra_by_scalar node:$src, (i32 shift)))>; 906def z_viabs8 : z_viabs<7>; 907def z_viabs16 : z_viabs<15>; 908def z_viabs32 : z_viabs<31>; 909def z_viabs64 : z_viabs<63>; 910 911// Sign-extend the i64 elements of a vector. 912class z_vse<int shift> 913 : PatFrag<(ops node:$src), 914 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 915def z_vsei8 : z_vse<56>; 916def z_vsei16 : z_vse<48>; 917def z_vsei32 : z_vse<32>; 918 919// ...and again with the extensions being done on individual i64 scalars. 920class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 921 : PatFrag<(ops node:$src), 922 (z_join_dwords 923 (operator (z_vector_extract node:$src, index1)), 924 (operator (z_vector_extract node:$src, index2)))>; 925def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 926def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 927def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 928