1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZProbedAlloca : SDTypeProfile<1, 2, 44 [SDTCisSameAs<0, 1>, 45 SDTCisSameAs<0, 2>, 46 SDTCisPtrTy<0>]>; 47def SDT_ZGR128Binary : SDTypeProfile<1, 2, 48 [SDTCisVT<0, untyped>, 49 SDTCisInt<1>, 50 SDTCisInt<2>]>; 51def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 52 [SDTCisInt<0>, 53 SDTCisVT<1, i32>, 54 SDTCisSameAs<0, 2>, 55 SDTCisSameAs<0, 3>]>; 56def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 57 [SDTCisInt<0>, 58 SDTCisVT<1, i32>, 59 SDTCisSameAs<0, 2>, 60 SDTCisSameAs<0, 3>, 61 SDTCisVT<1, i32>]>; 62def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 63 [SDTCisVT<0, i32>, 64 SDTCisPtrTy<1>, 65 SDTCisVT<2, i32>, 66 SDTCisVT<3, i32>, 67 SDTCisVT<4, i32>, 68 SDTCisVT<5, i32>]>; 69def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 70 [SDTCisVT<0, i32>, 71 SDTCisVT<1, i32>, 72 SDTCisPtrTy<2>, 73 SDTCisVT<3, i32>, 74 SDTCisVT<4, i32>, 75 SDTCisVT<5, i32>, 76 SDTCisVT<6, i32>, 77 SDTCisVT<7, i32>]>; 78def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 79 [SDTCisInt<0>, 80 SDTCisVT<1, i32>, 81 SDTCisPtrTy<2>, 82 SDTCisSameAs<0, 3>, 83 SDTCisSameAs<0, 4>]>; 84def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 85 [SDTCisVT<0, untyped>, 86 SDTCisPtrTy<1>]>; 87def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 88 [SDTCisVT<0, untyped>, 89 SDTCisPtrTy<1>]>; 90def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 91 [SDTCisVT<0, untyped>, 92 SDTCisVT<1, i32>, 93 SDTCisPtrTy<2>, 94 SDTCisVT<3, untyped>, 95 SDTCisVT<4, untyped>]>; 96def SDT_ZMemMemLength : SDTypeProfile<0, 3, 97 [SDTCisPtrTy<0>, 98 SDTCisPtrTy<1>, 99 SDTCisVT<2, i64>]>; 100def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 101 [SDTCisVT<0, i32>, 102 SDTCisPtrTy<1>, 103 SDTCisPtrTy<2>, 104 SDTCisVT<3, i64>]>; 105def SDT_ZMemsetMVC : SDTypeProfile<0, 3, 106 [SDTCisPtrTy<0>, 107 SDTCisVT<1, i64>, 108 SDTCisVT<2, i32>]>; 109def SDT_ZString : SDTypeProfile<1, 3, 110 [SDTCisPtrTy<0>, 111 SDTCisPtrTy<1>, 112 SDTCisPtrTy<2>, 113 SDTCisVT<3, i32>]>; 114def SDT_ZStringCC : SDTypeProfile<2, 3, 115 [SDTCisPtrTy<0>, 116 SDTCisVT<1, i32>, 117 SDTCisPtrTy<2>, 118 SDTCisPtrTy<3>, 119 SDTCisVT<4, i32>]>; 120def SDT_ZIPM : SDTypeProfile<1, 1, 121 [SDTCisVT<0, i32>, 122 SDTCisVT<1, i32>]>; 123def SDT_ZPrefetch : SDTypeProfile<0, 2, 124 [SDTCisVT<0, i32>, 125 SDTCisPtrTy<1>]>; 126def SDT_ZTBegin : SDTypeProfile<1, 2, 127 [SDTCisVT<0, i32>, 128 SDTCisPtrTy<1>, 129 SDTCisVT<2, i32>]>; 130def SDT_ZTEnd : SDTypeProfile<1, 0, 131 [SDTCisVT<0, i32>]>; 132def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 133 [SDTCisVec<0>, 134 SDTCisSameAs<0, 1>, 135 SDTCisVT<3, i32>]>; 136def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 137 [SDTCisVec<1>, 138 SDTCisVT<2, i32>]>; 139def SDT_ZReplicate : SDTypeProfile<1, 1, 140 [SDTCisVec<0>]>; 141def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 142 [SDTCisVec<0>, 143 SDTCisVec<1>]>; 144def SDT_ZVecUnary : SDTypeProfile<1, 1, 145 [SDTCisVec<0>, 146 SDTCisSameAs<0, 1>]>; 147def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 148 [SDTCisVec<0>, 149 SDTCisVT<1, i32>, 150 SDTCisSameAs<0, 2>]>; 151def SDT_ZVecBinary : SDTypeProfile<1, 2, 152 [SDTCisVec<0>, 153 SDTCisSameAs<0, 1>, 154 SDTCisSameAs<0, 2>]>; 155def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 156 [SDTCisVec<0>, 157 SDTCisVT<1, i32>, 158 SDTCisSameAs<0, 2>, 159 SDTCisSameAs<0, 2>]>; 160def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 161 [SDTCisVec<0>, 162 SDTCisSameAs<0, 1>, 163 SDTCisVT<2, i32>]>; 164def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 165 [SDTCisVec<0>, 166 SDTCisVec<1>, 167 SDTCisSameAs<1, 2>]>; 168def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 169 [SDTCisVec<0>, 170 SDTCisVT<1, i32>, 171 SDTCisVec<2>, 172 SDTCisSameAs<2, 3>]>; 173def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 174 [SDTCisVec<0>, 175 SDTCisVT<1, i32>, 176 SDTCisVec<2>, 177 SDTCisVT<3, i32>]>; 178def SDT_ZRotateMask : SDTypeProfile<1, 2, 179 [SDTCisVec<0>, 180 SDTCisVT<1, i32>, 181 SDTCisVT<2, i32>]>; 182def SDT_ZJoinDwords : SDTypeProfile<1, 2, 183 [SDTCisVT<0, v2i64>, 184 SDTCisVT<1, i64>, 185 SDTCisVT<2, i64>]>; 186def SDT_ZVecTernary : SDTypeProfile<1, 3, 187 [SDTCisVec<0>, 188 SDTCisSameAs<0, 1>, 189 SDTCisSameAs<0, 2>, 190 SDTCisSameAs<0, 3>]>; 191def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3, 192 [SDTCisVec<0>, 193 SDTCisVT<1, i32>, 194 SDTCisVec<2>, 195 SDTCisSameAs<2, 3>, 196 SDTCisSameAs<0, 4>]>; 197def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 198 [SDTCisVec<0>, 199 SDTCisSameAs<0, 1>, 200 SDTCisSameAs<0, 2>, 201 SDTCisVT<3, i32>]>; 202def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 203 [SDTCisVec<0>, 204 SDTCisVT<1, i32>, 205 SDTCisSameAs<0, 2>, 206 SDTCisSameAs<0, 3>, 207 SDTCisVT<4, i32>]>; 208def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 209 [SDTCisVec<0>, 210 SDTCisSameAs<0, 1>, 211 SDTCisSameAs<0, 2>, 212 SDTCisSameAs<0, 3>, 213 SDTCisVT<4, i32>]>; 214def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 215 [SDTCisVec<0>, 216 SDTCisVT<1, i32>, 217 SDTCisSameAs<0, 2>, 218 SDTCisSameAs<0, 3>, 219 SDTCisSameAs<0, 4>, 220 SDTCisVT<5, i32>]>; 221def SDT_ZTest : SDTypeProfile<1, 2, 222 [SDTCisVT<0, i32>, 223 SDTCisVT<2, i64>]>; 224 225//===----------------------------------------------------------------------===// 226// Node definitions 227//===----------------------------------------------------------------------===// 228 229// These are target-independent nodes, but have target-specific formats. 230def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 231 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 232def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 233 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 234 SDNPOutGlue]>; 235def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 236 237// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 238def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 239 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 240def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 241 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 242 SDNPVariadic]>; 243def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 244 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 245 SDNPVariadic]>; 246def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 247 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 248 SDNPVariadic]>; 249def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 250 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 251 SDNPVariadic]>; 252def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 253def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 254 SDT_ZWrapOffset, []>; 255def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 256def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 257def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp, 258 [SDNPHasChain]>; 259def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp, 260 [SDNPHasChain]>; 261def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 262def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 263 [SDNPHasChain]>; 264def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 265 SDT_ZSelectCCMask>; 266def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 267def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 268def z_probed_alloca : SDNode<"SystemZISD::PROBED_ALLOCA", SDT_ZProbedAlloca, 269 [SDNPHasChain]>; 270def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 271def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 272def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 273def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 274def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 275def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 276def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 277def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 278def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 279def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 280def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 281 282def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 283 [SDNPHasChain, SDNPSideEffect]>; 284 285def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 286 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 287def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 288 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 289def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad, 290 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 291def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore, 292 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 293 294def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 295 296// Defined because the index is an i32 rather than a pointer. 297def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 298 SDT_ZInsertVectorElt>; 299def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 300 SDT_ZExtractVectorElt>; 301def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 302def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 303def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 304def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 305def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 306def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 307def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 308def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 309def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 310 SDT_ZVecTernaryInt>; 311def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 312def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 313def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 314def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 315def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 316def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 317def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 318def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 319def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 320 SDT_ZVecBinaryInt>; 321def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 322 SDT_ZVecBinaryInt>; 323def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 324 SDT_ZVecBinaryInt>; 325def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 326def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 327def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 328def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 329def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 330def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 331def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 332def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 333def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE", 334 SDT_ZVecBinaryConv, [SDNPHasChain]>; 335def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES", 336 SDT_ZVecBinaryConv, [SDNPHasChain]>; 337def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 338def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH", 339 SDT_ZVecBinaryConv, [SDNPHasChain]>; 340def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS", 341 SDT_ZVecBinaryConv, [SDNPHasChain]>; 342def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 343def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE", 344 SDT_ZVecBinaryConv, [SDNPHasChain]>; 345def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES", 346 SDT_ZVecBinaryConv, [SDNPHasChain]>; 347def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 348def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 349def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 350def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 351def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND", 352 SDT_ZVecUnaryConv, [SDNPHasChain]>; 353def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 354def z_strict_vround : SDNode<"SystemZISD::STRICT_VROUND", 355 SDT_ZVecUnaryConv, [SDNPHasChain]>; 356def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 357def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 358def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 359def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 360def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 361def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 362def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 363def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 364def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 365 SDT_ZVecQuaternaryIntCC>; 366def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 367 SDT_ZVecQuaternaryIntCC>; 368def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC", 369 SDT_ZVecTernaryConvCC>; 370def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC", 371 SDT_ZVecTernaryConvCC>; 372def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 373 374class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 375 : SDNode<"SystemZISD::"#name, profile, 376 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 377 378def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 379def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 380def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 381def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 382def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 383def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 384def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 385def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 386def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 387def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 388def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 389 390def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 391 SDT_ZAtomicCmpSwap, 392 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 393 SDNPMemOperand]>; 394def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 395 SDT_ZAtomicCmpSwapW, 396 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 397 SDNPMemOperand]>; 398 399def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 400 SDT_ZAtomicLoad128, 401 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 402def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 403 SDT_ZAtomicStore128, 404 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 405def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 406 SDT_ZAtomicCmpSwap128, 407 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 408 SDNPMemOperand]>; 409 410def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 411 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 412def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 413 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 414def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 415 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 416def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 417 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 418def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 419 [SDNPHasChain, SDNPMayLoad]>; 420def z_memset_mvc : SDNode<"SystemZISD::MEMSET_MVC", SDT_ZMemsetMVC, 421 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 422def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 423 [SDNPHasChain, SDNPMayLoad]>; 424def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 425 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 426def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 427 [SDNPHasChain, SDNPMayLoad]>; 428def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 429 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 430 SDNPMemOperand]>; 431 432def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 433 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 434def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 435 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 436def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 437 [SDNPHasChain, SDNPSideEffect]>; 438 439def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 440def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 441def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 442 443//===----------------------------------------------------------------------===// 444// Pattern fragments 445//===----------------------------------------------------------------------===// 446 447def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 448 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 449}]>; 450def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 451 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 452}]>; 453def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 454 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 455}]>; 456 457def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 458 (z_storebswap node:$src, node:$addr), [{ 459 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 460}]>; 461def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 462 (z_storebswap node:$src, node:$addr), [{ 463 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 464}]>; 465def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 466 (z_storebswap node:$src, node:$addr), [{ 467 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 468}]>; 469 470// Fragments including CC as an implicit source. 471def z_br_ccmask 472 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 473 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 474def z_select_ccmask 475 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 476 (z_select_ccmask_1 node:$true, node:$false, 477 node:$valid, node:$mask, CC)>; 478def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 479def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 480 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 481def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 482 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 483 484// Signed and unsigned comparisons. 485def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 486 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 487 return Type != SystemZICMP::UnsignedOnly; 488}]>; 489def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 490 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 491 return Type != SystemZICMP::SignedOnly; 492}]>; 493 494// Register- and memory-based TEST UNDER MASK. 495def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>; 496def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 497 498// Register sign-extend operations. Sub-32-bit values are represented as i32s. 499def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 500def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 501def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 502 503// Match extensions of an i32 to an i64, followed by an in-register sign 504// extension from a sub-i32 value. 505def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 506def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 507 508// Register zero-extend operations. Sub-32-bit values are represented as i32s. 509def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 510def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 511def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 512 513// Extending loads in which the extension type can be signed. 514def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 515 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 516 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 517}]>; 518def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 519 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 520}]>; 521def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 522 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 523}]>; 524def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 525 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 526}]>; 527 528// Extending loads in which the extension type can be unsigned. 529def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 530 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 531 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 532}]>; 533def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 534 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 535}]>; 536def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 537 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 538}]>; 539def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 540 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 541}]>; 542 543// Extending loads in which the extension type doesn't matter. 544def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 545 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 546}]>; 547def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 548 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 549}]>; 550def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 551 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 552}]>; 553def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 554 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 555}]>; 556 557// Aligned loads. 558class AlignedLoad<SDPatternOperator load> 559 : PatFrag<(ops node:$addr), (load node:$addr), 560 [{ return storeLoadIsAligned(N); }]>; 561def aligned_load : AlignedLoad<load>; 562def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 563def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 564def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 565def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 566 567// Aligned stores. 568class AlignedStore<SDPatternOperator store> 569 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), 570 [{ return storeLoadIsAligned(N); }]>; 571def aligned_store : AlignedStore<store>; 572def aligned_truncstorei16 : AlignedStore<truncstorei16>; 573def aligned_truncstorei32 : AlignedStore<truncstorei32>; 574 575// Non-volatile loads. Used for instructions that might access the storage 576// location multiple times. 577class NonvolatileLoad<SDPatternOperator load> 578 : PatFrag<(ops node:$addr), (load node:$addr), [{ 579 auto *Load = cast<LoadSDNode>(N); 580 return !Load->isVolatile(); 581}]>; 582def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 583def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 584def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 585 586// Non-volatile stores. 587class NonvolatileStore<SDPatternOperator store> 588 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 589 auto *Store = cast<StoreSDNode>(N); 590 return !Store->isVolatile(); 591}]>; 592def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 593def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 594def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 595 596// A store of a load that can be implemented using MVC. 597def mvc_store : PatFrag<(ops node:$value, node:$addr), 598 (unindexedstore node:$value, node:$addr), 599 [{ return storeLoadCanUseMVC(N); }]>; 600 601// Binary read-modify-write operations on memory in which the other 602// operand is also memory and for which block operations like NC can 603// be used. There are two patterns for each operator, depending on 604// which operand contains the "other" load. 605multiclass block_op<SDPatternOperator operator> { 606 def "1" : PatFrag<(ops node:$value, node:$addr), 607 (unindexedstore (operator node:$value, 608 (unindexedload node:$addr)), 609 node:$addr), 610 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 611 def "2" : PatFrag<(ops node:$value, node:$addr), 612 (unindexedstore (operator (unindexedload node:$addr), 613 node:$value), 614 node:$addr), 615 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 616} 617defm block_and : block_op<and>; 618defm block_or : block_op<or>; 619defm block_xor : block_op<xor>; 620 621// Insertions. 622def inserti8 : PatFrag<(ops node:$src1, node:$src2), 623 (or (and node:$src1, -256), node:$src2)>; 624def insertll : PatFrag<(ops node:$src1, node:$src2), 625 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 626def insertlh : PatFrag<(ops node:$src1, node:$src2), 627 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 628def inserthl : PatFrag<(ops node:$src1, node:$src2), 629 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 630def inserthh : PatFrag<(ops node:$src1, node:$src2), 631 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 632def insertlf : PatFrag<(ops node:$src1, node:$src2), 633 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 634def inserthf : PatFrag<(ops node:$src1, node:$src2), 635 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 636 637// ORs that can be treated as insertions. 638def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 639 (or node:$src1, node:$src2), [{ 640 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 641 return CurDAG->MaskedValueIsZero(N->getOperand(0), 642 APInt::getLowBitsSet(BitWidth, 8)); 643}]>; 644 645// ORs that can be treated as reversed insertions. 646def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 647 (or node:$src1, node:$src2), [{ 648 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 649 return CurDAG->MaskedValueIsZero(N->getOperand(1), 650 APInt::getLowBitsSet(BitWidth, 8)); 651}]>; 652 653// Negative integer absolute. 654def z_inegabs : PatFrag<(ops node:$src), (ineg (abs node:$src))>; 655 656// Integer multiply-and-add 657def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 658 (add (mul node:$src1, node:$src2), node:$src3)>; 659 660// Alternatives to match operations with or without an overflow CC result. 661def z_sadd : PatFrags<(ops node:$src1, node:$src2), 662 [(z_saddo node:$src1, node:$src2), 663 (add node:$src1, node:$src2)]>; 664def z_uadd : PatFrags<(ops node:$src1, node:$src2), 665 [(z_uaddo node:$src1, node:$src2), 666 (add node:$src1, node:$src2)]>; 667def z_ssub : PatFrags<(ops node:$src1, node:$src2), 668 [(z_ssubo node:$src1, node:$src2), 669 (sub node:$src1, node:$src2)]>; 670def z_usub : PatFrags<(ops node:$src1, node:$src2), 671 [(z_usubo node:$src1, node:$src2), 672 (sub node:$src1, node:$src2)]>; 673 674// Combined logical operations. 675def andc : PatFrag<(ops node:$src1, node:$src2), 676 (and node:$src1, (not node:$src2))>; 677def orc : PatFrag<(ops node:$src1, node:$src2), 678 (or node:$src1, (not node:$src2))>; 679def nand : PatFrag<(ops node:$src1, node:$src2), 680 (not (and node:$src1, node:$src2))>; 681def nor : PatFrag<(ops node:$src1, node:$src2), 682 (not (or node:$src1, node:$src2))>; 683def nxor : PatFrag<(ops node:$src1, node:$src2), 684 (not (xor node:$src1, node:$src2))>; 685 686// Fused multiply-subtract, using the natural operand order. 687def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 688 (any_fma node:$src1, node:$src2, (fneg node:$src3))>; 689 690// Fused multiply-add and multiply-subtract, but with the order of the 691// operands matching SystemZ's MA and MS instructions. 692def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 693 (any_fma node:$src2, node:$src3, node:$src1)>; 694def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 695 (any_fma node:$src2, node:$src3, (fneg node:$src1))>; 696 697// Negative fused multiply-add and multiply-subtract. 698def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 699 (fneg (any_fma node:$src1, node:$src2, node:$src3))>; 700def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 701 (fneg (any_fms node:$src1, node:$src2, node:$src3))>; 702 703// Floating-point negative absolute. 704def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 705 706// Strict floating-point fragments. 707def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs), 708 [(z_strict_fcmp node:$lhs, node:$rhs), 709 (z_fcmp node:$lhs, node:$rhs)]>; 710def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs), 711 [(z_strict_vfcmpe node:$lhs, node:$rhs), 712 (z_vfcmpe node:$lhs, node:$rhs)]>; 713def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs), 714 [(z_strict_vfcmph node:$lhs, node:$rhs), 715 (z_vfcmph node:$lhs, node:$rhs)]>; 716def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs), 717 [(z_strict_vfcmphe node:$lhs, node:$rhs), 718 (z_vfcmphe node:$lhs, node:$rhs)]>; 719def z_any_vextend : PatFrags<(ops node:$src), 720 [(z_strict_vextend node:$src), 721 (z_vextend node:$src)]>; 722def z_any_vround : PatFrags<(ops node:$src), 723 [(z_strict_vround node:$src), 724 (z_vround node:$src)]>; 725 726// Create a unary operator that loads from memory and then performs 727// the given operation on it. 728class loadu<SDPatternOperator operator, SDPatternOperator load = load> 729 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 730 731// Create a store operator that performs the given unary operation 732// on the value before storing it. 733class storeu<SDPatternOperator operator, SDPatternOperator store = store> 734 : PatFrag<(ops node:$value, node:$addr), 735 (store (operator node:$value), node:$addr)>; 736 737// Create a store operator that performs the given inherent operation 738// and stores the resulting value. 739class storei<SDPatternOperator operator, SDPatternOperator store = store> 740 : PatFrag<(ops node:$addr), 741 (store (operator), node:$addr)>; 742 743// Create a shift operator that optionally ignores an AND of the 744// shift count with an immediate if the bottom 6 bits are all set. 745def imm32bottom6set : PatLeaf<(i32 imm), [{ 746 return (N->getZExtValue() & 0x3f) == 0x3f; 747}]>; 748class shiftop<SDPatternOperator operator> 749 : PatFrags<(ops node:$val, node:$count), 750 [(operator node:$val, node:$count), 751 (operator node:$val, (and node:$count, imm32bottom6set))]>; 752 753def imm32mod64 : PatLeaf<(i32 imm), [{ 754 return (N->getZExtValue() % 64 == 0); 755}]>; 756 757// Load a scalar and replicate it in all elements of a vector. 758class z_replicate_load<ValueType scalartype, SDPatternOperator load> 759 : PatFrag<(ops node:$addr), 760 (z_replicate (scalartype (load node:$addr)))>; 761def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 762def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 763def z_replicate_loadi32 : z_replicate_load<i32, load>; 764def z_replicate_loadi64 : z_replicate_load<i64, load>; 765def z_replicate_loadf32 : z_replicate_load<f32, load>; 766def z_replicate_loadf64 : z_replicate_load<f64, load>; 767// Byte-swapped replicated vector element loads. 768def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>; 769def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>; 770def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>; 771 772// Load a scalar and insert it into a single element of a vector. 773class z_vle<ValueType scalartype, SDPatternOperator load> 774 : PatFrag<(ops node:$vec, node:$addr, node:$index), 775 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 776 node:$index)>; 777def z_vlei8 : z_vle<i32, anyextloadi8>; 778def z_vlei16 : z_vle<i32, anyextloadi16>; 779def z_vlei32 : z_vle<i32, load>; 780def z_vlei64 : z_vle<i64, load>; 781def z_vlef32 : z_vle<f32, load>; 782def z_vlef64 : z_vle<f64, load>; 783// Byte-swapped vector element loads. 784def z_vlebri16 : z_vle<i32, z_loadbswap16>; 785def z_vlebri32 : z_vle<i32, z_loadbswap32>; 786def z_vlebri64 : z_vle<i64, z_loadbswap64>; 787 788// Load a scalar and insert it into the low element of the high i64 of a 789// zeroed vector. 790class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 791 : PatFrag<(ops node:$addr), 792 (z_vector_insert immAllZerosV, 793 (scalartype (load node:$addr)), (i32 index))>; 794def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 795def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 796def z_vllezi32 : z_vllez<i32, load, 1>; 797def z_vllezi64 : PatFrags<(ops node:$addr), 798 [(z_vector_insert immAllZerosV, 799 (i64 (load node:$addr)), (i32 0)), 800 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 801// We use high merges to form a v4f32 from four f32s. Propagating zero 802// into all elements but index 1 gives this expression. 803def z_vllezf32 : PatFrag<(ops node:$addr), 804 (z_merge_high 805 (v2i64 806 (z_unpackl_high 807 (v4i32 808 (bitconvert 809 (v4f32 (scalar_to_vector 810 (f32 (load node:$addr)))))))), 811 (v2i64 812 (bitconvert (v4f32 immAllZerosV))))>; 813def z_vllezf64 : PatFrag<(ops node:$addr), 814 (z_merge_high 815 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 816 immAllZerosV)>; 817 818// Similarly for the high element of a zeroed vector. 819def z_vllezli32 : z_vllez<i32, load, 0>; 820def z_vllezlf32 : PatFrag<(ops node:$addr), 821 (z_merge_high 822 (v2i64 823 (bitconvert 824 (z_merge_high 825 (v4f32 (scalar_to_vector 826 (f32 (load node:$addr)))), 827 (v4f32 immAllZerosV)))), 828 (v2i64 829 (bitconvert (v4f32 immAllZerosV))))>; 830 831// Byte-swapped variants. 832def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>; 833def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>; 834def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>; 835def z_vllebrzi64 : PatFrags<(ops node:$addr), 836 [(z_vector_insert immAllZerosV, 837 (i64 (z_loadbswap64 node:$addr)), 838 (i32 0)), 839 (z_join_dwords (i64 (z_loadbswap64 node:$addr)), 840 (i64 0))]>; 841 842 843// Store one element of a vector. 844class z_vste<ValueType scalartype, SDPatternOperator store> 845 : PatFrag<(ops node:$vec, node:$addr, node:$index), 846 (store (scalartype (z_vector_extract node:$vec, node:$index)), 847 node:$addr)>; 848def z_vstei8 : z_vste<i32, truncstorei8>; 849def z_vstei16 : z_vste<i32, truncstorei16>; 850def z_vstei32 : z_vste<i32, store>; 851def z_vstei64 : z_vste<i64, store>; 852def z_vstef32 : z_vste<f32, store>; 853def z_vstef64 : z_vste<f64, store>; 854// Byte-swapped vector element stores. 855def z_vstebri16 : z_vste<i32, z_storebswap16>; 856def z_vstebri32 : z_vste<i32, z_storebswap32>; 857def z_vstebri64 : z_vste<i64, z_storebswap64>; 858 859// Arithmetic negation on vectors. 860def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 861 862// Bitwise negation on vectors. 863def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 864 865// Signed "integer greater than zero" on vectors. 866def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 867 868// Signed "integer less than zero" on vectors. 869def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 870 871// Sign-extend the i64 elements of a vector. 872class z_vse<int shift> 873 : PatFrag<(ops node:$src), 874 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 875def z_vsei8 : z_vse<56>; 876def z_vsei16 : z_vse<48>; 877def z_vsei32 : z_vse<32>; 878 879// ...and again with the extensions being done on individual i64 scalars. 880class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 881 : PatFrag<(ops node:$src), 882 (z_join_dwords 883 (operator (z_vector_extract node:$src, index1)), 884 (operator (z_vector_extract node:$src, index2)))>; 885def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 886def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 887def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 888